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2 .\" Copyright (c) 1995, 1996, 1997, 1998, 2000
3 .\" Justin T. Gibbs. All rights reserved.
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27 .\" $FreeBSD$
28 .\"
29 .Dd July 13, 2008
30 .Dt AHC 4
31 .Os
32 .Sh NAME
33 .Nm ahc
34 .Nd Adaptec VL/EISA/PCI SCSI host adapter driver
35 .Sh SYNOPSIS
36 To compile this driver into the kernel,
37 place the following lines in your
38 kernel configuration file:
39 .Bd -ragged -offset indent
40 .Cd "device scbus"
41 .Cd "device ahc"
42 .Pp
43 For one or more VL/EISA cards:
44 .Cd "device eisa"
45 .Pp
46 For one or more PCI cards:
47 .Cd "device pci"
48 .Pp
49 To allow PCI adapters to use memory mapped I/O if enabled:
50 .Cd options AHC_ALLOW_MEMIO
51 .Pp
52 To configure one or more controllers to assume the target role:
53 .Cd options AHC_TMODE_ENABLE <bitmask of units>
54 .Ed
55 .Pp
56 Alternatively, to load the driver as a
57 module at boot time, place the following lines in
58 .Xr loader.conf 5 :
59 .Bd -literal -offset indent
60 ahc_load="YES"
61 ahc_eisa_load="YES"
62 ahc_isa_load="YES"
63 ahc_pci_load="YES"
64 .Ed
65 .Sh DESCRIPTION
66 This driver provides access to the
67 .Tn SCSI
68 bus(es) connected to the Adaptec AIC77xx and AIC78xx
69 host adapter chips.
70 .Pp
71 Driver features include support for twin and wide busses,
72 fast, ultra or ultra2 synchronous transfers depending on controller type,
73 tagged queueing, SCB paging, and target mode.
74 .Pp
75 Memory mapped I/O can be enabled for PCI devices with the
76 .Dq Dv AHC_ALLOW_MEMIO
77 configuration option.
78 Memory mapped I/O is more efficient than the alternative, programmed I/O.
79 Most PCI BIOSes will map devices so that either technique for communicating
80 with the card is available.
81 In some cases,
82 usually when the PCI device is sitting behind a PCI->PCI bridge,
83 the BIOS may fail to properly initialize the chip for memory mapped I/O.
84 The typical symptom of this problem is a system hang if memory mapped I/O
85 is attempted.
86 Most modern motherboards perform the initialization correctly and work fine
87 with this option enabled.
88 .Pp
89 Individual controllers may be configured to operate in the target role
90 through the
91 .Dq Dv AHC_TMODE_ENABLE
92 configuration option.
93 The value assigned to this option should be a bitmap
94 of all units where target mode is desired.
95 For example, a value of 0x25, would enable target mode on units 0, 2, and 5.
96 A value of 0x8a enables it for units 1, 3, and 7.
97 .Pp
98 Per target configuration performed in the
99 .Tn SCSI-Select
100 menu, accessible at boot
101 in
102 .No non- Ns Tn EISA
103 models,
104 or through an
105 .Tn EISA
106 configuration utility for
107 .Tn EISA
108 models,
109 is honored by this driver.
110 This includes synchronous/asynchronous transfers,
111 maximum synchronous negotiation rate,
112 wide transfers,
113 disconnection,
114 the host adapter's SCSI ID,
115 and,
116 in the case of
117 .Tn EISA
118 Twin Channel controllers,
119 the primary channel selection.
120 For systems that store non-volatile settings in a system specific manner
121 rather than a serial eeprom directly connected to the aic7xxx controller,
122 the
123 .Tn BIOS
124 must be enabled for the driver to access this information.
125 This restriction applies to all
126 .Tn EISA
127 and many motherboard configurations.
128 .Pp
129 Note that I/O addresses are determined automatically by the probe routines,
130 but care should be taken when using a 284x
131 .Pq Tn VESA No local bus controller
132 in an
133 .Tn EISA
134 system.
135 The jumpers setting the I/O area for the 284x should match the
136 .Tn EISA
137 slot into which the card is inserted to prevent conflicts with other
138 .Tn EISA
139 cards.
140 .Pp
141 Performance and feature sets vary throughout the aic7xxx product line.
142 The following table provides a comparison of the different chips supported
143 by the
144 .Nm
145 driver.
146 Note that wide and twin channel features, although always supported
147 by a particular chip, may be disabled in a particular motherboard or card
148 design.
149 .Pp
150 .Bd -ragged -offset indent
151 .Bl -column "aic7770 " "10 " "EISA/VL " "10MHz " "16bit " "SCBs " Features
152 .Em "Chip MIPS Bus MaxSync MaxWidth SCBs Features"
153 aic7770 10 EISA/VL 10MHz 16Bit 4 1
154 aic7850 10 PCI/32 10MHz 8Bit 3
155 aic7860 10 PCI/32 20MHz 8Bit 3
156 aic7870 10 PCI/32 10MHz 16Bit 16
157 aic7880 10 PCI/32 20MHz 16Bit 16
158 aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 8
159 aic7891 20 PCI/64 40MHz 16Bit 16 3 4 5 6 7 8
160 aic7892 20 PCI/64 80MHz 16Bit 16 3 4 5 6 7 8
161 aic7895 15 PCI/32 20MHz 16Bit 16 2 3 4 5
162 aic7895C 15 PCI/32 20MHz 16Bit 16 2 3 4 5 8
163 aic7896 20 PCI/32 40MHz 16Bit 16 2 3 4 5 6 7 8
164 aic7897 20 PCI/64 40MHz 16Bit 16 2 3 4 5 6 7 8
165 aic7899 20 PCI/64 80MHz 16Bit 16 2 3 4 5 6 7 8
166 .El
167 .Pp
168 .Bl -enum -compact
169 .It
170 Multiplexed Twin Channel Device - One controller servicing two busses.
171 .It
172 Multi-function Twin Channel Device - Two controllers on one chip.
173 .It
174 Command Channel Secondary DMA Engine - Allows scatter gather list and
175 SCB prefetch.
176 .It
177 64 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA.
178 .It
179 Block Move Instruction Support - Doubles the speed of certain sequencer
180 operations.
181 .It
182 .Sq Bayonet
183 style Scatter Gather Engine - Improves S/G prefetch performance.
184 .It
185 Queuing Registers - Allows queueing of new transactions without pausing the
186 sequencer.
187 .It
188 Multiple Target IDs - Allows the controller to respond to selection as a
189 target on multiple SCSI IDs.
190 .El
191 .Ed
192 .Sh HARDWARE
193 The
194 .Nm
195 driver supports the following
196 .Tn SCSI
197 host adapter chips and
198 .Tn SCSI
199 controller cards:
200 .Pp
201 .Bl -bullet -compact
202 .It
203 Adaptec
204 .Tn AIC7770
205 host adapter chip
206 .It
207 Adaptec
208 .Tn AIC7850
209 host adapter chip
210 .It
211 Adaptec
212 .Tn AIC7860
213 host adapter chip
214 .It
215 Adaptec
216 .Tn AIC7870
217 host adapter chip
218 .It
219 Adaptec
220 .Tn AIC7880
221 host adapter chip
222 .It
223 Adaptec
224 .Tn AIC7890
225 host adapter chip
226 .It
227 Adaptec
228 .Tn AIC7891
229 host adapter chip
230 .It
231 Adaptec
232 .Tn AIC7892
233 host adapter chip
234 .It
235 Adaptec
236 .Tn AIC7895
237 host adapter chip
238 .It
239 Adaptec
240 .Tn AIC7896
241 host adapter chip
242 .It
243 Adaptec
244 .Tn AIC7897
245 host adapter chip
246 .It
247 Adaptec
248 .Tn AIC7899
249 host adapter chip
250 .It
251 Adaptec
252 .Tn 274X(W)
253 .It
254 Adaptec
255 .Tn 274X(T)
256 .It
257 Adaptec
258 .Tn 284X
259 .It
260 Adaptec
261 .Tn 2910
262 .It
263 Adaptec
264 .Tn 2915
265 .It
266 Adaptec
267 .Tn 2920C
268 .It
269 Adaptec
270 .Tn 2930C
271 .It
272 Adaptec
273 .Tn 2930U2
274 .It
275 Adaptec
276 .Tn 2940
277 .It
278 Adaptec
279 .Tn 2940J
280 .It
281 Adaptec
282 .Tn 2940N
283 .It
284 Adaptec
285 .Tn 2940U
286 .It
287 Adaptec
288 .Tn 2940AU
289 .It
290 Adaptec
291 .Tn 2940UW
292 .It
293 Adaptec
294 .Tn 2940UW Dual
295 .It
296 Adaptec
297 .Tn 2940UW Pro
298 .It
299 Adaptec
300 .Tn 2940U2W
301 .It
302 Adaptec
303 .Tn 2940U2B
304 .It
305 Adaptec
306 .Tn 2950U2W
307 .It
308 Adaptec
309 .Tn 2950U2B
310 .It
311 Adaptec
312 .Tn 19160B
313 .It
314 Adaptec
315 .Tn 29160B
316 .It
317 Adaptec
318 .Tn 29160N
319 .It
320 Adaptec
321 .Tn 3940
322 .It
323 Adaptec
324 .Tn 3940U
325 .It
326 Adaptec
327 .Tn 3940AU
328 .It
329 Adaptec
330 .Tn 3940UW
331 .It
332 Adaptec
333 .Tn 3940AUW
334 .It
335 Adaptec
336 .Tn 3940U2W
337 .It
338 Adaptec
339 .Tn 3950U2
340 .It
341 Adaptec
342 .Tn 3960
343 .It
344 Adaptec
345 .Tn 39160
346 .It
347 Adaptec
348 .Tn 3985
349 .It
350 Adaptec
351 .Tn 4944UW
352 .It
353 NEC PC-9821Xt13 (PC-98)
354 .It
355 NEC RvII26 (PC-98)
356 .It
357 NEC PC-9821X-B02L/B09 (PC-98)
358 .It
359 NEC SV-98/2-B03 (PC-98)
360 .It
361 Many motherboards with on-board
362 .Tn SCSI
363 support
364 .El
365 .Sh SCSI CONTROL BLOCKS (SCBs)
366 Every transaction sent to a device on the SCSI bus is assigned a
367 .Sq SCSI Control Block
368 (SCB).
369 The SCB contains all of the information required by the
370 controller to process a transaction.
371 The chip feature table lists
372 the number of SCBs that can be stored in on-chip memory.
373 All chips
374 with model numbers greater than or equal to 7870 allow for the on chip
375 SCB space to be augmented with external SRAM up to a maximum of 255 SCBs.
376 Very few Adaptec controller configurations have external SRAM.
377 .Pp
378 If external SRAM is not available, SCBs are a limited resource.
379 Using the SCBs in a straight forward manner would only allow the driver to
380 handle as many concurrent transactions as there are physical SCBs.
381 To fully utilize the SCSI bus and the devices on it,
382 requires much more concurrency.
383 The solution to this problem is
384 .Em SCB Paging ,
385 a concept similar to memory paging.
386 SCB paging takes advantage of
387 the fact that devices usually disconnect from the SCSI bus for long
388 periods of time without talking to the controller.
389 The SCBs for disconnected transactions are only of use to the controller
390 when the transfer is resumed.
391 When the host queues another transaction
392 for the controller to execute, the controller firmware will use a
393 free SCB if one is available.
394 Otherwise, the state of the most recently
395 disconnected (and therefore most likely to stay disconnected) SCB is
396 saved, via dma, to host memory, and the local SCB reused to start
397 the new transaction.
398 This allows the controller to queue up to
399 255 transactions regardless of the amount of SCB space.
400 Since the
401 local SCB space serves as a cache for disconnected transactions, the
402 more SCB space available, the less host bus traffic consumed saving
403 and restoring SCB data.
404 .Sh SEE ALSO
405 .Xr aha 4 ,
406 .Xr ahb 4 ,
407 .Xr cd 4 ,
408 .Xr da 4 ,
409 .Xr sa 4 ,
410 .Xr scsi 4
411 .Sh HISTORY
412 The
413 .Nm
414 driver appeared in
415 .Fx 2.0 .
416 .Sh AUTHORS
417 The
418 .Nm
419 driver, the
420 .Tn AIC7xxx
421 sequencer-code assembler,
422 and the firmware running on the aic7xxx chips was written by
423 .An Justin T. Gibbs .
424 .Sh BUGS
425 Some Quantum drives (at least the Empire 2100 and 1080s) will not run on an
426 .Tn AIC7870
427 Rev B in synchronous mode at 10MHz.
428 Controllers with this problem have a
429 42 MHz clock crystal on them and run slightly above 10MHz.
430 This confuses the drive and hangs the bus.
431 Setting a maximum synchronous negotiation rate of 8MHz in the
432 .Tn SCSI-Select
433 utility will allow normal operation.
434 .Pp
435 Although the Ultra2 and Ultra160 products have sufficient instruction
436 ram space to support both the initiator and target roles concurrently,
437 this configuration is disabled in favor of allowing the target role
438 to respond on multiple target ids.
439 A method for configuring dual role mode should be provided.
440 .Pp
441 Tagged Queuing is not supported in target mode.
442 .Pp
443 Reselection in target mode fails to function correctly on all high
444 voltage differential boards as shipped by Adaptec.
445 Information on
446 how to modify HVD board to work correctly in target mode is available
447 from Adaptec.