sys/ia64/include/cpufunc.h

   1 /*-
   2  * Copyright (c) 1998 Doug Rabson
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28
  29 #ifndef _MACHINE_CPUFUNC_H_
  30 #define _MACHINE_CPUFUNC_H_
  31
  32 #ifdef _KERNEL
  33
  34 #include <sys/types.h>
  35 #include <machine/ia64_cpu.h>
  36 #include <machine/vmparam.h>
  37
  38 #ifndef _SYS_CDEFS_H_
  39 #error this file needs sys/cdefs.h as a prerequisite
  40 #endif
  41
  42 struct thread;
  43
  44 #define IA64_FIXED_BREAK        0x84B5D
  45
  46 #ifdef __GNUCLIKE_ASM
  47
  48 static __inline void
  49 breakpoint(void)
  50 {
  51         __asm __volatile("break.m %0" :: "i"(IA64_FIXED_BREAK));
  52 }
  53
  54 #define HAVE_INLINE_FFS
  55 #define ffs(x)  __builtin_ffs(x)
  56
  57 #define __MEMIO_ADDR(x)         (__volatile void*)(IA64_PHYS_TO_RR6(x))
  58 extern __volatile void *ia64_ioport_address(u_int);
  59 #define __PIO_ADDR(x)           ia64_ioport_address(x)
  60
  61 /*
  62  * I/O port reads with ia32 semantics.
  63  */
  64 static __inline uint8_t
  65 inb(unsigned int port)
  66 {
  67         __volatile uint8_t *p;
  68         uint8_t v;
  69         p = __PIO_ADDR(port);
  70         ia64_mf();
  71         v = *p;
  72         ia64_mf_a();
  73         ia64_mf();
  74         return (v);
  75 }
  76
  77 static __inline uint16_t
  78 inw(unsigned int port)
  79 {
  80         __volatile uint16_t *p;
  81         uint16_t v;
  82         p = __PIO_ADDR(port);
  83         ia64_mf();
  84         v = *p;
  85         ia64_mf_a();
  86         ia64_mf();
  87         return (v);
  88 }
  89
  90 static __inline uint32_t
  91 inl(unsigned int port)
  92 {
  93         volatile uint32_t *p;
  94         uint32_t v;
  95         p = __PIO_ADDR(port);
  96         ia64_mf();
  97         v = *p;
  98         ia64_mf_a();
  99         ia64_mf();
 100         return (v);
 101 }
 102
 103 static __inline void
 104 insb(unsigned int port, void *addr, size_t count)
 105 {
 106         uint8_t *buf = addr;
 107         while (count--)
 108                 *buf++ = inb(port);
 109 }
 110
 111 static __inline void
 112 insw(unsigned int port, void *addr, size_t count)
 113 {
 114         uint16_t *buf = addr;
 115         while (count--)
 116                 *buf++ = inw(port);
 117 }
 118
 119 static __inline void
 120 insl(unsigned int port, void *addr, size_t count)
 121 {
 122         uint32_t *buf = addr;
 123         while (count--)
 124                 *buf++ = inl(port);
 125 }
 126
 127 static __inline void
 128 outb(unsigned int port, uint8_t data)
 129 {
 130         volatile uint8_t *p;
 131         p = __PIO_ADDR(port);
 132         ia64_mf();
 133         *p = data;
 134         ia64_mf_a();
 135         ia64_mf();
 136 }
 137
 138 static __inline void
 139 outw(unsigned int port, uint16_t data)
 140 {
 141         volatile uint16_t *p;
 142         p = __PIO_ADDR(port);
 143         ia64_mf();
 144         *p = data;
 145         ia64_mf_a();
 146         ia64_mf();
 147 }
 148
 149 static __inline void
 150 outl(unsigned int port, uint32_t data)
 151 {
 152         volatile uint32_t *p;
 153         p = __PIO_ADDR(port);
 154         ia64_mf();
 155         *p = data;
 156         ia64_mf_a();
 157         ia64_mf();
 158 }
 159
 160 static __inline void
 161 outsb(unsigned int port, const void *addr, size_t count)
 162 {
 163         const uint8_t *buf = addr;
 164         while (count--)
 165                 outb(port, *buf++);
 166 }
 167
 168 static __inline void
 169 outsw(unsigned int port, const void *addr, size_t count)
 170 {
 171         const uint16_t *buf = addr;
 172         while (count--)
 173                 outw(port, *buf++);
 174 }
 175
 176 static __inline void
 177 outsl(unsigned int port, const void *addr, size_t count)
 178 {
 179         const uint32_t *buf = addr;
 180         while (count--)
 181                 outl(port, *buf++);
 182 }
 183
 184 static __inline void
 185 disable_intr(void)
 186 {
 187         __asm __volatile ("rsm psr.i");
 188 }
 189
 190 static __inline void
 191 enable_intr(void)
 192 {
 193         __asm __volatile ("ssm psr.i;; srlz.d");
 194 }
 195
 196 static __inline register_t
 197 intr_disable(void)
 198 {
 199         register_t psr;
 200         __asm __volatile ("mov %0=psr;;" : "=r"(psr));
 201         disable_intr();
 202         return ((psr & IA64_PSR_I) ? 1 : 0);
 203 }
 204
 205 static __inline void
 206 intr_restore(register_t ie)
 207 {
 208         if (ie)
 209                 enable_intr();
 210 }
 211
 212 #endif /* __GNUCLIKE_ASM */
 213
 214 #endif /* _KERNEL */
 215
 216 #endif /* !_MACHINE_CPUFUNC_H_ */