sys/ia64/include/intr.h

   1 /*-
   2  * Copyright (c) 1998 Doug Rabson
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28
  29 #ifndef _MACHINE_INTR_H_
  30 #define _MACHINE_INTR_H_
  31
  32 /*
  33  * Layout of the Processor Interrupt Block.
  34  */
  35 struct ia64_interrupt_block
  36 {
  37         u_int64_t       ib_ipi[0x20000];        /* 1Mb of IPI interrupts */
  38         u_int8_t        ib_reserved1[0xe0000];
  39         u_int8_t        ib_inta;                /* Generate INTA cycle */
  40         u_int8_t        ib_reserved2[7];
  41         u_int8_t        ib_xtp;                 /* XTP cycle */
  42         u_int8_t        ib_reserved3[7];
  43         u_int8_t        ib_reserved4[0x1fff0];
  44 };
  45
  46 extern u_int64_t ia64_lapic_address;
  47
  48 #define IA64_INTERRUPT_BLOCK    \
  49         (struct ia64_interrupt_block *)IA64_PHYS_TO_RR6(ia64_lapic_address)
  50
  51 int ia64_setup_intr(const char *name, int irq, driver_filter_t filter,
  52     driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep);
  53 int ia64_teardown_intr(void *cookie);
  54
  55 #endif /* !_MACHINE_INTR_H_ */