usr.sbin/cxgbtool/reg_defs.c

   1 /*
   2  * $FreeBSD$
   3  */
   4
   5 /* This file is automatically generated --- do not edit */
   6
   7 struct reg_info sge_regs[] = {
   8         { "SG_CONTROL", 0x0, 0 },
   9                 { "CmdQ0_Enable", 0, 1 },
  10                 { "CmdQ1_Enable", 1, 1 },
  11                 { "FL0_Enable", 2, 1 },
  12                 { "FL1_Enable", 3, 1 },
  13                 { "CPL_Enable", 4, 1 },
  14                 { "Response_Queue_Enable", 5, 1 },
  15                 { "CmdQ_Priority", 6, 2 },
  16                 { "Disable_CmdQ0_GTS", 8, 1 },
  17                 { "Disable_CmdQ1_GTS", 9, 1 },
  18                 { "Disable_FL0_GTS", 10, 1 },
  19                 { "Disable_FL1_GTS", 11, 1 },
  20                 { "Enable_Big_Endian", 12, 1 },
  21                 { "FL_Selection_Criteria", 13, 1 },
  22                 { "iSCSI_Coalesce", 14, 1 },
  23                 { "RX_Pkt_Offset", 15, 3 },
  24                 { "VLAN_Xtract", 18, 1 },
  25         { "SG_DOORBELL", 0x4, 0 },
  26                 { "CmdQ0_Enable", 0, 1 },
  27                 { "CmdQ1_Enable", 1, 1 },
  28                 { "FL0_Enable", 2, 1 },
  29                 { "FL1_Enable", 3, 1 },
  30         { "SG_CMD0BASELWR", 0x8, 0 },
  31         { "SG_CMD0BASEUPR", 0xc, 0 },
  32         { "SG_CMD1BASELWR", 0x10, 0 },
  33         { "SG_CMD1BASEUPR", 0x14, 0 },
  34         { "SG_FL0BASELWR", 0x18, 0 },
  35         { "SG_FL0BASEUPR", 0x1c, 0 },
  36         { "SG_FL1BASELWR", 0x20, 0 },
  37         { "SG_FL1BASEUPR", 0x24, 0 },
  38         { "SG_CMD0SIZE", 0x28, 0 },
  39                 { "CmdQ0_Size", 0, 17 },
  40         { "SG_FL0SIZE", 0x2c, 0 },
  41                 { "FL0_Size", 0, 17 },
  42         { "SG_RSPSIZE", 0x30, 0 },
  43                 { "RespQ_Size", 0, 17 },
  44         { "SG_RSPBASELWR", 0x34, 0 },
  45         { "SG_RSPBASEUPR", 0x38, 0 },
  46         { "SG_FLTHRESHOLD", 0x3c, 0 },
  47                 { "FL_Threshold", 0, 16 },
  48         { "SG_RSPQUEUECREDIT", 0x40, 0 },
  49                 { "RespQ_Credit", 0, 17 },
  50         { "SG_DEBUGTXDATAL", 0x44, 0 },
  51         { "SG_SLEEPING", 0x48, 0 },
  52                 { "Sleeping", 0, 16 },
  53         { "SG_INTRTIMER", 0x4c, 0 },
  54                 { "Interrupt_Timer_Count", 0, 24 },
  55         { "SG_CMD0PTR", 0x50, 0 },
  56                 { "CmdQ0_Pointer", 0, 16 },
  57                 { "Current_Generation_Bit", 16, 1 },
  58         { "SG_CMD1PTR", 0x54, 0 },
  59                 { "CmdQ1_Pointer", 0, 16 },
  60                 { "Current_Generation_Bit", 16, 1 },
  61         { "SG_FL0PTR", 0x58, 0 },
  62                 { "FL0_Pointer", 0, 16 },
  63                 { "Current_Generation_Bit", 16, 1 },
  64         { "SG_FL1PTR", 0x5c, 0 },
  65                 { "FL1_Pointer", 0, 16 },
  66                 { "Current_Generation_Bit", 16, 1 },
  67         { "SG_DEBUGTXDATAH", 0x60, 0 },
  68         { "SG_DEBUGRXDATAL", 0x64, 0 },
  69         { "SG_DEBUGRXDATAH", 0x68, 0 },
  70         { "SG_VERSION", 0x6c, 0 },
  71                 { "Day", 0, 5 },
  72                 { "Month", 5, 4 },
  73         { "SG_DEBUGRXSOP", 0x70, 0 },
  74         { "SG_DEBUGTXSOP", 0x74, 0 },
  75         { "SG_LA_RDPTR0", 0x78, 0 },
  76                 { "Logic_Analyzer0_Read_Pointer", 0, 9 },
  77         { "SG_LA_RDDATA0", 0x7c, 0 },
  78         { "SG_LA_WRPTR0", 0x80, 0 },
  79         { "SG_DEBUGRXEOP", 0x84, 0 },
  80         { "SG_DEBUGTXEOP", 0x88, 0 },
  81         { "SG_DEBUGRXSIZE", 0x8c, 0 },
  82         { "SG_DEBUGTXSIZE", 0x90, 0 },
  83         { "SG_NUMBER_LA", 0x94, 0 },
  84         { "SG_LA_RDPTR1", 0x98, 0 },
  85                 { "Logic_Analyzer1_Read_Pointer", 0, 9 },
  86         { "SG_LA_RDDATA1", 0x9c, 0 },
  87         { "SG_LA_WRPTR1", 0xa0, 0 },
  88         { "SG_LA_RDPTR2", 0xa4, 0 },
  89                 { "Logic_Analyzer2_Read_Pointer", 0, 9 },
  90         { "SG_LA_RDDATA2", 0xa8, 0 },
  91         { "SG_LA_WRPTR2", 0xac, 0 },
  92         { "SG_CMD1SIZE", 0xb0, 0 },
  93                 { "CmdQ1_Size", 0, 17 },
  94         { "SG_FL1SIZE", 0xb4, 0 },
  95                 { "FL1_Size", 0, 17 },
  96         { "SG_INT_ENABLE", 0xb8, 0 },
  97                 { "RespQ_Exhausted", 0, 1 },
  98                 { "RespQ_Overflow", 1, 1 },
  99                 { "FL_Exhausted", 2, 1 },
 100                 { "Packet_Too_Big", 3, 1 },
 101                 { "Packet_Mismatch", 4, 1 },
 102         { "SG_INT_CAUSE", 0xbc, 0 },
 103                 { "RespQ_Exhausted", 0, 1 },
 104                 { "RespQ_Overflow", 1, 1 },
 105                 { "FL_Exhausted", 2, 1 },
 106                 { "Packet_Too_Big", 3, 1 },
 107                 { "Packet_Mismatch", 4, 1 },
 108         { "SG_RESPACCUTIMER", 0xc0, 0 },
 109         { NULL }
 110 };
 111
 112 struct reg_info mc3_regs[] = {
 113         { "MC3_CFG", 0x100, 0 },
 114                 { "Clk_Enable", 0, 1 },
 115                 { "Ready", 1, 1 },
 116                 { "Read_to_Write_Delay", 2, 3 },
 117                 { "Write_to_Read_Delay", 5, 3 },
 118                 { "MC3_Bank_Cycle", 8, 4 },
 119                 { "Refresh_Cycle", 12, 4 },
 120                 { "Precharge_Cycle", 16, 2 },
 121                 { "Active_to_Read_Write_Delay", 18, 1 },
 122                 { "Active_to_Precharge_Delay", 19, 3 },
 123                 { "Write_Recovery_Delay", 22, 2 },
 124                 { "Density", 24, 2 },
 125                 { "Organization", 26, 1 },
 126                 { "Banks", 27, 1 },
 127                 { "Unregistered", 28, 1 },
 128                 { "MC3_Width", 29, 2 },
 129                 { "MC3_Slow", 31, 1 },
 130         { "MC3_MODE", 0x104, 0 },
 131                 { "MC3_Mode", 0, 14 },
 132                 { "Busy", 31, 1 },
 133         { "MC3_EXT_MODE", 0x108, 0 },
 134                 { "MC3_Extended_Mode", 0, 14 },
 135                 { "Busy", 31, 1 },
 136         { "MC3_PRECHARG", 0x10c, 0 },
 137                 { "Busy", 31, 1 },
 138         { "MC3_REFRESH", 0x110, 0 },
 139                 { "Refresh_Enable", 0, 1 },
 140                 { "Refresh_Divisor", 1, 14 },
 141                 { "Busy", 31, 1 },
 142         { "MC3_STROBE", 0x114, 0 },
 143                 { "Master_DLL_Reset", 0, 1 },
 144                 { "Master_DLL_Tap_Count", 1, 8 },
 145                 { "Master_DLL_Locked", 9, 1 },
 146                 { "Master_DLL_Max_Tap_Count", 10, 1 },
 147                 { "Master_DLL_Tap_Count_Offset", 11, 6 },
 148                 { "Slave_DLL_Reset", 11, 1 },
 149                 { "Slave_DLL_Delta", 12, 4 },
 150                 { "Slave_Delay_Line_Manual_Tap_Count", 17, 6 },
 151                 { "Slave_Delay_Line_Manual_Tap_Count_Enable", 23, 1 },
 152                 { "Slave_Delay_Line_Tap_Count", 24, 6 },
 153         { "MC3_ECC_CNTL", 0x118, 0 },
 154                 { "ECC_Generation_Enable", 0, 1 },
 155                 { "ECC_Check_Enable", 1, 1 },
 156                 { "Correctable_Error_Count", 2, 8 },
 157                 { "Uncorrectable_Error_Count", 10, 8 },
 158         { "MC3_CE_ADDR", 0x11c, 0 },
 159                 { "MC3_CE_Addr", 4, 28 },
 160         { "MC3_CE_DATA0", 0x120, 0 },
 161         { "MC3_CE_DATA1", 0x124, 0 },
 162         { "MC3_CE_DATA2", 0x128, 0 },
 163         { "MC3_CE_DATA3", 0x12c, 0 },
 164         { "MC3_CE_DATA4", 0x130, 0 },
 165         { "MC3_UE_ADDR", 0x134, 0 },
 166                 { "MC3_UE_Addr", 4, 28 },
 167         { "MC3_UE_DATA0", 0x138, 0 },
 168         { "MC3_UE_DATA1", 0x13c, 0 },
 169         { "MC3_UE_DATA2", 0x140, 0 },
 170         { "MC3_UE_DATA3", 0x144, 0 },
 171         { "MC3_UE_DATA4", 0x148, 0 },
 172         { "MC3_BD_ADDR", 0x14c, 0 },
 173         { "MC3_BD_DATA0", 0x150, 0 },
 174         { "MC3_BD_DATA1", 0x154, 0 },
 175         { "MC3_BD_DATA2", 0x158, 0 },
 176         { "MC3_BD_DATA3", 0x15c, 0 },
 177         { "MC3_BD_DATA4", 0x160, 0 },
 178         { "MC3_BD_OP", 0x164, 0 },
 179                 { "Back_Door_Operation", 0, 1 },
 180                 { "Busy", 31, 1 },
 181         { "MC3_BIST_ADDR_BEG", 0x168, 0 },
 182         { "MC3_BIST_ADDR_END", 0x16c, 0 },
 183         { "MC3_BIST_DATA", 0x170, 0 },
 184         { "MC3_BIST_OP", 0x174, 0 },
 185                 { "Op", 0, 1 },
 186                 { "Data_Pattern", 1, 2 },
 187                 { "Continuous", 3, 1 },
 188                 { "Busy", 31, 1 },
 189         { "MC3_INT_ENABLE", 0x178, 0 },
 190                 { "MC3_Corr_Err", 0, 1 },
 191                 { "MC3_Uncorr_Err", 1, 1 },
 192                 { "MC3_Parity_Err", 2, 8 },
 193                 { "MC3_Addr_Err", 10, 1 },
 194         { "MC3_INT_CAUSE", 0x17c, 0 },
 195                 { "MC3_Corr_Err", 0, 1 },
 196                 { "MC3_Uncorr_Err", 1, 1 },
 197                 { "MC3_Parity_Err", 2, 8 },
 198                 { "MC3_Addr_Err", 10, 1 },
 199         { NULL }
 200 };
 201
 202 struct reg_info mc4_regs[] = {
 203         { "MC4_CFG", 0x180, 0 },
 204                 { "Power_Up", 0, 1 },
 205                 { "Ready", 1, 1 },
 206                 { "Read_to_Write_Delay", 2, 3 },
 207                 { "Write_to_Read_Delay", 5, 3 },
 208                 { "MC4_Bank_Cycle", 8, 3 },
 209                 { "MC4_Narrow", 24, 1 },
 210                 { "MC4_Slow", 25, 1 },
 211                 { "MC4A_Width", 24, 2 },
 212                 { "MC4A_Slow", 26, 1 },
 213         { "MC4_MODE", 0x184, 0 },
 214                 { "MC4_Mode", 0, 15 },
 215                 { "Busy", 31, 1 },
 216         { "MC4_EXT_MODE", 0x188, 0 },
 217                 { "MC4_Extended_Mode", 0, 15 },
 218                 { "Busy", 31, 1 },
 219         { "MC4_REFRESH", 0x190, 0 },
 220                 { "Refresh_Enable", 0, 1 },
 221                 { "Refresh_Divisor", 1, 14 },
 222                 { "Busy", 31, 1 },
 223         { "MC4_STROBE", 0x194, 0 },
 224                 { "Master_DLL_Reset", 0, 1 },
 225                 { "Master_DLL_Tap_Count", 1, 8 },
 226                 { "Master_DLL_Locked", 9, 1 },
 227                 { "Master_DLL_Max_Tap_Count", 10, 1 },
 228                 { "Master_DLL_Tap_Count_Offset", 11, 6 },
 229                 { "Slave_DLL_Reset", 11, 1 },
 230                 { "Slave_DLL_Delta", 12, 4 },
 231                 { "Slave_Delay_Line_Manual_Tap_Count", 17, 6 },
 232                 { "Slave_Delay_Line_Manual_Tap_Count_Enable", 23, 1 },
 233                 { "Slave_Delay_Line_Tap_Count", 24, 6 },
 234         { "MC4_ECC_CNTL", 0x198, 0 },
 235                 { "ECC_Generation_Enable", 0, 1 },
 236                 { "ECC_Check_Enable", 1, 1 },
 237                 { "Correctable_Error_Count", 2, 8 },
 238                 { "Uncorrectable_Error_Count", 10, 8 },
 239         { "MC4_CE_ADDR", 0x19c, 0 },
 240                 { "MC4_CE_Addr", 4, 24 },
 241         { "MC4_CE_DATA0", 0x1a0, 0 },
 242         { "MC4_CE_DATA1", 0x1a4, 0 },
 243         { "MC4_CE_DATA2", 0x1a8, 0 },
 244         { "MC4_CE_DATA3", 0x1ac, 0 },
 245         { "MC4_CE_DATA4", 0x1b0, 0 },
 246         { "MC4_UE_ADDR", 0x1b4, 0 },
 247                 { "MC4_UE_Addr", 4, 24 },
 248         { "MC4_UE_DATA0", 0x1b8, 0 },
 249         { "MC4_UE_DATA1", 0x1bc, 0 },
 250         { "MC4_UE_DATA2", 0x1c0, 0 },
 251         { "MC4_UE_DATA3", 0x1c4, 0 },
 252         { "MC4_UE_DATA4", 0x1c8, 0 },
 253         { "MC4_BD_ADDR", 0x1cc, 0 },
 254                 { "MC4_Back_Door_Addr", 0, 28 },
 255         { "MC4_BD_DATA0", 0x1d0, 0 },
 256         { "MC4_BD_DATA1", 0x1d4, 0 },
 257         { "MC4_BD_DATA2", 0x1d8, 0 },
 258         { "MC4_BD_DATA3", 0x1dc, 0 },
 259         { "MC4_BD_DATA4", 0x1e0, 0 },
 260         { "MC4_BD_OP", 0x1e4, 0 },
 261                 { "Operation", 0, 1 },
 262                 { "Busy", 31, 1 },
 263         { "MC4_BIST_ADDR_BEG", 0x1e8, 0 },
 264         { "MC4_BIST_ADDR_END", 0x1ec, 0 },
 265         { "MC4_BIST_DATA", 0x1f0, 0 },
 266         { "MC4_BIST_OP", 0x1f4, 0 },
 267                 { "Op", 0, 1 },
 268                 { "Data_Pattern", 1, 2 },
 269                 { "Continuous", 3, 1 },
 270                 { "Busy", 31, 1 },
 271         { "MC4_INT_ENABLE", 0x1f8, 0 },
 272                 { "MC4_Corr_Err", 0, 1 },
 273                 { "MC4_Uncorr_Err", 1, 1 },
 274                 { "MC4_Addr_Err", 2, 1 },
 275         { "MC4_INT_CAUSE", 0x1fc, 0 },
 276                 { "MC4_Corr_Err", 0, 1 },
 277                 { "MC4_Uncorr_Err", 1, 1 },
 278                 { "MC4_Addr_Err", 2, 1 },
 279         { NULL }
 280 };
 281
 282 struct reg_info tpi_regs[] = {
 283         { "TPI_ADDR", 0x280, 0 },
 284                 { "TPI_ADDRESS", 0, 24 },
 285         { "TPI_WR_DATA", 0x284, 0 },
 286         { "TPI_RD_DATA", 0x288, 0 },
 287         { "TPI_CSR", 0x28c, 0 },
 288                 { "TPIWR", 0, 1 },
 289                 { "TPIRDY", 1, 1 },
 290                 { "INT_DIR", 31, 1 },
 291         { "TPI_PAR", 0x29c, 0 },
 292                 { "TPIPAR", 0, 7 },
 293         { NULL }
 294 };
 295
 296 struct reg_info tp_regs[] = {
 297         { "TP_IN_CONFIG", 0x300, 0 },
 298                 { "TP_IN_CSPI_Tunnel", 0, 1 },
 299                 { "TP_IN_CSPI_Ethernet", 1, 1 },
 300                 { "TP_IN_CSPI_CPL", 3, 1 },
 301                 { "TP_IN_CSPI_POS", 4, 1 },
 302                 { "TP_IN_CSPI_Check_IP_Csum", 5, 1 },
 303                 { "TP_IN_CSPI_Check_TCP_Csum", 6, 1 },
 304                 { "TP_IN_ESPI_Tunnel", 7, 1 },
 305                 { "TP_IN_ESPI_Ethernet", 8, 1 },
 306                 { "TP_IN_ESPI_CPL", 10, 1 },
 307                 { "TP_IN_ESPI_POS", 11, 1 },
 308                 { "TP_IN_ESPI_Check_IP_Csum", 12, 1 },
 309                 { "TP_IN_ESPI_Check_TCP_Csum", 13, 1 },
 310                 { "Offload_Disable", 14, 1 },
 311         { "TP_OUT_CONFIG", 0x304, 0 },
 312                 { "TP_OUT_C_ETH", 0, 1 },
 313                 { "TP_OUT_CSPI_CPL", 2, 1 },
 314                 { "TP_OUT_CSPI_POS", 3, 1 },
 315                 { "TP_OUT_CSPI_Generate_IP_Csum", 4, 1 },
 316                 { "TP_OUT_CSPI_Generate_TCP_Csum", 5, 1 },
 317                 { "TP_OUT_ESPI_Ethernet", 6, 1 },
 318                 { "TP_OUT_ESPI_TAG_Ethernet", 7, 1 },
 319                 { "TP_OUT_ESPI_CPL", 8, 1 },
 320                 { "TP_OUT_ESPI_POS", 9, 1 },
 321                 { "TP_OUT_ESPI_Generate_IP_Csum", 10, 1 },
 322                 { "TP_OUT_ESPI_Generate_TCP_Csum", 11, 1 },
 323         { "TP_GLOBAL_CONFIG", 0x308, 0 },
 324                 { "IP_TTL", 0, 8 },
 325                 { "TCAM_Server_Region_Usage", 8, 2 },
 326                 { "QOS_Mapping", 10, 1 },
 327                 { "TCP_Csum", 11, 1 },
 328                 { "UDP_Csum", 12, 1 },
 329                 { "IP_Csum", 13, 1 },
 330                 { "IP_ID_Split", 14, 1 },
 331                 { "Path_MTU", 15, 1 },
 332                 { "5Tuple_Lookup", 17, 2 },
 333                 { "IP_Fragment_Drop", 19, 1 },
 334                 { "Ping_Drop", 20, 1 },
 335                 { "Protect_Mode", 21, 1 },
 336                 { "SYN_Cookie_Algorithm", 22, 1 },
 337                 { "Attack_Filter", 23, 1 },
 338                 { "Interface_Type", 24, 1 },
 339                 { "Disable_RX_Flow_Control", 25, 1 },
 340                 { "SYN_Cookie_Parameter", 26, 6 },
 341         { "TP_GLOBAL_RX_CREDITS", 0x30c, 0 },
 342         { "TP_CM_SIZE", 0x310, 0 },
 343         { "TP_CM_MM_BASE", 0x314, 0 },
 344                 { "CM_MemMgr_Base", 0, 28 },
 345         { "TP_CM_TIMER_BASE", 0x318, 0 },
 346                 { "CM_Timer_Base", 0, 28 },
 347         { "TP_PM_SIZE", 0x31c, 0 },
 348         { "TP_PM_TX_BASE", 0x320, 0 },
 349         { "TP_PM_DEFRAG_BASE", 0x324, 0 },
 350         { "TP_PM_RX_BASE", 0x328, 0 },
 351         { "TP_PM_RX_PG_SIZE", 0x32c, 0 },
 352         { "TP_PM_RX_MAX_PGS", 0x330, 0 },
 353         { "TP_PM_TX_PG_SIZE", 0x334, 0 },
 354         { "TP_PM_TX_MAX_PGS", 0x338, 0 },
 355         { "TP_TCP_OPTIONS", 0x340, 0 },
 356                 { "Timestamp", 0, 2 },
 357                 { "Window_Scale", 2, 2 },
 358                 { "SACK", 4, 2 },
 359                 { "ECN", 6, 2 },
 360                 { "SACK_Algorithm", 8, 2 },
 361                 { "MSS", 10, 1 },
 362                 { "Default_Peer_MSS", 16, 16 },
 363         { "TP_DACK_CONFIG", 0x344, 0 },
 364                 { "DACK_Mode", 0, 1 },
 365                 { "DACK_Auto_Mgmt", 1, 1 },
 366                 { "DACK_Auto_Careful", 2, 1 },
 367                 { "DACK_MSS_Selector", 3, 2 },
 368                 { "DACK_Byte_Threshold", 5, 20 },
 369         { "TP_PC_CONFIG", 0x348, 0 },
 370                 { "TP_Access_Latency", 0, 4 },
 371                 { "Held_FIN_Disable", 4, 1 },
 372                 { "DDP_FC_Enable", 5, 1 },
 373                 { "RDMA_Err_Enable", 6, 1 },
 374                 { "Fast_PDU_Delivery", 7, 1 },
 375                 { "Clear_FIN", 8, 1 },
 376                 { "TP_PC_Rev", 30, 2 },
 377         { "TP_BACKOFF0", 0x350, 0 },
 378                 { "Element0", 0, 8 },
 379                 { "Element1", 8, 8 },
 380                 { "Element2", 16, 8 },
 381                 { "Element3", 24, 8 },
 382         { "TP_BACKOFF1", 0x354, 0 },
 383                 { "Element0", 0, 8 },
 384                 { "Element1", 8, 8 },
 385                 { "Element2", 16, 8 },
 386                 { "Element3", 24, 8 },
 387         { "TP_BACKOFF2", 0x358, 0 },
 388                 { "Element0", 0, 8 },
 389                 { "Element1", 8, 8 },
 390                 { "Element2", 16, 8 },
 391                 { "Element3", 24, 8 },
 392         { "TP_BACKOFF3", 0x35c, 0 },
 393                 { "Element0", 0, 8 },
 394                 { "Element1", 8, 8 },
 395                 { "Element2", 16, 8 },
 396                 { "Element3", 24, 8 },
 397         { "TP_PARA_REG0", 0x360, 0 },
 398                 { "Var_Mult", 0, 4 },
 399                 { "Var_Gain", 4, 4 },
 400                 { "SRTT_Gain", 8, 4 },
 401                 { "RTTVar_Init", 12, 4 },
 402                 { "Dup_Thresh", 20, 4 },
 403                 { "Init_Cong_Win", 24, 3 },
 404         { "TP_PARA_REG1", 0x364, 0 },
 405                 { "Initial_Slow_Start_Threshold", 0, 16 },
 406                 { "Receive_Buffer_Size", 16, 16 },
 407         { "TP_PARA_REG2", 0x368, 0 },
 408                 { "RX_Coalesce_Size", 0, 16 },
 409                 { "MAX_RX_Size", 16, 16 },
 410         { "TP_PARA_REG3", 0x36c, 0 },
 411                 { "RX_Coalescing_PSH_Deliver", 0, 1 },
 412                 { "RX_Coalescing_Enable", 1, 1 },
 413                 { "Tahoe_Enable", 2, 1 },
 414                 { "MAX_Reorder_Fragments", 12, 3 },
 415         { "TP_TIMER_RESOLUTION", 0x390, 0 },
 416                 { "Delayed_ACK_Timer_Resolution", 0, 6 },
 417                 { "Generic_Timer_Resolution", 16, 6 },
 418         { "TP_2MSL", 0x394, 0 },
 419                 { "2MSL", 0, 30 },
 420         { "TP_RXT_MIN", 0x398, 0 },
 421                 { "Retransmit_Timer_MIN", 0, 16 },
 422         { "TP_RXT_MAX", 0x39c, 0 },
 423                 { "Retransmit_Timer_MAX", 0, 30 },
 424         { "TP_PERS_MIN", 0x3a0, 0 },
 425                 { "Persist_Timer_MIN", 0, 16 },
 426         { "TP_PERS_MAX", 0x3a4, 0 },
 427                 { "Persist_Timer_MAX", 0, 30 },
 428         { "TP_KEEP_IDLE", 0x3ac, 0 },
 429                 { "Keep_Alive_Idle_Time", 0, 30 },
 430         { "TP_KEEP_INTVL", 0x3b0, 0 },
 431                 { "Keep_Alive_Interval_Time", 0, 30 },
 432         { "TP_INIT_SRTT", 0x3b4, 0 },
 433                 { "Initial_SRTT", 0, 16 },
 434         { "TP_DACK_TIME", 0x3b8, 0 },
 435                 { "Delayed_ACK_Time", 0, 11 },
 436         { "TP_FINWAIT2_TIME", 0x3bc, 0 },
 437                 { "FINWAIT2_TIME", 0, 30 },
 438         { "TP_FAST_FINWAIT2_TIME", 0x3c0, 0 },
 439                 { "Fast_FINWAIT2_Time", 0, 30 },
 440         { "TP_SHIFT_CNT", 0x3c4, 0 },
 441                 { "KeepAlive_MAX", 0, 8 },
 442                 { "WindowProbe_MAX", 8, 8 },
 443                 { "Retransmission_MAX", 16, 8 },
 444                 { "SYN_MAX", 24, 8 },
 445         { "TP_QOS_REG0", 0x3e0, 0 },
 446                 { "L3_Value", 0, 6 },
 447         { "TP_QOS_REG1", 0x3e4, 0 },
 448                 { "L3_Value", 0, 6 },
 449         { "TP_QOS_REG2", 0x3e8, 0 },
 450                 { "L3_Value", 0, 6 },
 451         { "TP_QOS_REG3", 0x3ec, 0 },
 452                 { "L3_Value", 0, 6 },
 453         { "TP_QOS_REG4", 0x3f0, 0 },
 454                 { "L3_Value", 0, 6 },
 455         { "TP_QOS_REG5", 0x3f4, 0 },
 456                 { "L3_Value", 0, 6 },
 457         { "TP_QOS_REG6", 0x3f8, 0 },
 458                 { "L3_Value", 0, 6 },
 459         { "TP_QOS_REG7", 0x3fc, 0 },
 460                 { "L3_Value", 0, 6 },
 461         { "TP_MTU_REG0", 0x404, 0 },
 462         { "TP_MTU_REG1", 0x408, 0 },
 463         { "TP_MTU_REG2", 0x40c, 0 },
 464         { "TP_MTU_REG3", 0x410, 0 },
 465         { "TP_MTU_REG4", 0x414, 0 },
 466         { "TP_MTU_REG5", 0x418, 0 },
 467         { "TP_MTU_REG6", 0x41c, 0 },
 468         { "TP_MTU_REG7", 0x420, 0 },
 469         { "TP_RESET", 0x44c, 0 },
 470                 { "TP_Reset", 0, 1 },
 471                 { "CM_MemMgr_Init", 1, 1 },
 472         { "TP_MIB_INDEX", 0x450, 0 },
 473         { "TP_MIB_DATA", 0x454, 0 },
 474         { "TP_SYNC_TIME_HI", 0x458, 0 },
 475         { "TP_SYNC_TIME_LO", 0x45c, 0 },
 476         { "TP_CM_MM_RX_FLST_BASE", 0x460, 0 },
 477                 { "CM_MemMgr_RX_Free_List_Base", 0, 28 },
 478         { "TP_CM_MM_TX_FLST_BASE", 0x464, 0 },
 479                 { "CM_MemMgr_TX_Free_List_Base", 0, 28 },
 480         { "TP_CM_MM_P_FLST_BASE", 0x468, 0 },
 481                 { "CM_MemMgr_PStruct_Free_List_Base", 0, 28 },
 482         { "TP_CM_MM_MAX_P", 0x46c, 0 },
 483                 { "CM_MemMgr_MAX_PStruct", 0, 28 },
 484         { "TP_INT_ENABLE", 0x470, 0 },
 485                 { "TX_Free_List_Empty", 0, 1 },
 486                 { "RX_Free_List_Empty", 1, 1 },
 487         { "TP_INT_CAUSE", 0x474, 0 },
 488                 { "TX_Free_List_Empty", 0, 1 },
 489                 { "RX_Free_List_Empty", 1, 1 },
 490         { "TP_FLM_FREE_PSTRUCT_CNT", 0x480, 0 },
 491         { "TP_FLM_FREE_RX_PG_CNT", 0x484, 0 },
 492         { "TP_FLM_FREE_TX_PG_CNT", 0x488, 0 },
 493         { "TP_HEAP_PUSH_CNT", 0x48c, 0 },
 494         { "TP_HEAP_POP_CNT", 0x490, 0 },
 495         { "TP_DACK_PUSH_CNT", 0x494, 0 },
 496         { "TP_DACK_POP_CNT", 0x498, 0 },
 497         { "TP_MOD_PUSH_CNT", 0x49c, 0 },
 498         { "TP_MOD_POP_CNT", 0x4a0, 0 },
 499         { "TP_TIMER_SEPARATOR", 0x4a4, 0 },
 500                 { "Disable_Past_Timer_Insertion", 0, 1 },
 501                 { "Modulation_Timer_Separator", 1, 15 },
 502                 { "Global_Timer_Separator", 16, 16 },
 503         { "TP_DEBUG_SEL", 0x4a8, 0 },
 504         { "TP_CM_FC_MODE", 0x4b0, 0 },
 505         { "TP_PC_CONGESTION_CNTL", 0x4b4, 0 },
 506         { "TP_TX_DROP_CONFIG", 0x4b8, 0 },
 507                 { "ENABLE_TX_DROP", 31, 1 },
 508                 { "ENABLE_TX_ERROR", 30, 1 },
 509                 { "DROP_TICKS_CNT", 4, 26 },
 510                 { "NUM_PKTS_DROPPED", 0, 4 },
 511         { "TP_TX_DROP_COUNT", 0x4bc, 0 },
 512         { NULL }
 513 };
 514
 515 struct reg_info rat_regs[] = {
 516         { "RAT_ROUTE_CONTROL", 0x580, 0 },
 517                 { "Use_Route_Table", 0, 1 },
 518                 { "Enable_CSPI", 1, 1 },
 519                 { "Enable_PCIX", 2, 1 },
 520         { "RAT_ROUTE_TABLE_INDEX", 0x584, 0 },
 521                 { "Route_Table_Index", 0, 4 },
 522         { "RAT_ROUTE_TABLE_DATA", 0x588, 0 },
 523         { "RAT_NO_ROUTE", 0x58c, 0 },
 524                 { "CPL_Opcode", 0, 8 },
 525         { "RAT_INTR_ENABLE", 0x590, 0 },
 526                 { "ZeroRouteError", 0, 1 },
 527                 { "CspiFramingError", 1, 1 },
 528                 { "SgeFramingError", 2, 1 },
 529                 { "TpFramingError", 3, 1 },
 530         { "RAT_INTR_CAUSE", 0x594, 0 },
 531                 { "ZeroRouteError", 0, 1 },
 532                 { "CspiFramingError", 1, 1 },
 533                 { "SgeFramingError", 2, 1 },
 534                 { "TpFramingError", 3, 1 },
 535         { NULL }
 536 };
 537
 538 struct reg_info cspi_regs[] = {
 539         { "CSPI_RX_AE_WM", 0x810, 0 },
 540         { "CSPI_RX_AF_WM", 0x814, 0 },
 541         { "CSPI_CALENDAR_LEN", 0x818, 0 },
 542                 { "CalendarLength", 0, 16 },
 543         { "CSPI_FIFO_STATUS_ENABLE", 0x820, 0 },
 544                 { "FifoStatusEnable", 0, 1 },
 545         { "CSPI_MAXBURST1_MAXBURST2", 0x828, 0 },
 546                 { "MaxBurst1", 0, 16 },
 547                 { "MaxBurst2", 16, 16 },
 548         { "CSPI_TRAIN", 0x82c, 0 },
 549                 { "CSPI_TRAIN_ALPHA", 0, 16 },
 550                 { "CSPI_TRAIN_DATA_MAXT", 16, 16 },
 551         { "CSPI_INTR_STATUS", 0x848, 0 },
 552                 { "DIP4Err", 0, 1 },
 553                 { "RXDrop", 1, 1 },
 554                 { "TXDrop", 2, 1 },
 555                 { "RXOverflow", 3, 1 },
 556                 { "RAMParityErr", 4, 1 },
 557         { "CSPI_INTR_ENABLE", 0x84c, 0 },
 558                 { "DIP4Err", 0, 1 },
 559                 { "RXDrop", 1, 1 },
 560                 { "TXDrop", 2, 1 },
 561                 { "RXOverflow", 3, 1 },
 562                 { "RAMParityErr", 4, 1 },
 563         { NULL }
 564 };
 565
 566 struct reg_info espi_regs[] = {
 567         { "ESPI_SCH_TOKEN0", 0x880, 0 },
 568                 { "SchToken0", 0, 16 },
 569         { "ESPI_SCH_TOKEN1", 0x884, 0 },
 570                 { "SchToken1", 0, 16 },
 571         { "ESPI_SCH_TOKEN2", 0x888, 0 },
 572                 { "SchToken2", 0, 16 },
 573         { "ESPI_SCH_TOKEN3", 0x88c, 0 },
 574                 { "SchToken3", 0, 16 },
 575         { "ESPI_RX_FIFO_ALMOST_EMPTY_WATERMARK", 0x890, 0 },
 576                 { "AlmostEmpty", 0, 16 },
 577         { "ESPI_RX_FIFO_ALMOST_FULL_WATERMARK", 0x894, 0 },
 578                 { "AlmostFull", 0, 16 },
 579         { "ESPI_CALENDAR_LENGTH", 0x898, 0 },
 580                 { "CalendarLength", 0, 16 },
 581         { "PORT_CONFIG", 0x89c, 0 },
 582                 { "RX_NPorts", 0, 8 },
 583                 { "TX_NPorts", 8, 8 },
 584         { "ESPI_FIFO_STATUS_ENABLE", 0x8a0, 0 },
 585                 { "RXStatusEnable", 0, 1 },
 586                 { "TXDropEnable", 1, 1 },
 587                 { "RXEndianMode", 2, 1 },
 588                 { "TXEndianMode", 3, 1 },
 589                 { "Intel1010Mode", 4, 1 },
 590         { "ESPI_MAXBURST1_MAXBURST2", 0x8a8, 0 },
 591                 { "MaxBurst1", 0, 16 },
 592                 { "MaxBurst2", 16, 16 },
 593         { "ESPI_TRAIN", 0x8ac, 0 },
 594                 { "MaxTrainAlpha", 0, 16 },
 595                 { "MaxTrainData", 16, 16 },
 596         { "RAM_STATUS", 0x8b0, 0 },
 597                 { "RXFIFOParityError", 0, 10 },
 598                 { "TXFIFOParityError", 10, 10 },
 599                 { "RXFIFOOverflow", 20, 10 },
 600         { "TX_DROP_COUNT0", 0x8b4, 0 },
 601                 { "TXPort0DropCnt", 0, 16 },
 602                 { "TxPort1DropCnt", 16, 16 },
 603         { "TX_DROP_COUNT1", 0x8b8, 0 },
 604                 { "TXPort2DropCnt", 0, 16 },
 605                 { "TxPort3DropCnt", 16, 16 },
 606         { "RX_DROP_COUNT0", 0x8bc, 0 },
 607                 { "RXPort0DropCnt", 0, 16 },
 608                 { "RxPort1DropCnt", 16, 16 },
 609         { "RX_DROP_COUNT1", 0x8c0, 0 },
 610                 { "RXPort2DropCnt", 0, 16 },
 611                 { "RxPort3DropCnt", 16, 16 },
 612         { "DIP4_ERROR_COUNT", 0x8c4, 0 },
 613                 { "Dip4ErrorCnt", 0, 12 },
 614                 { "Dip4ErrorCntShadow", 12, 12 },
 615                 { "TriCN_RX_Train_Err", 24, 1 },
 616                 { "TriCN_RX_Training", 25, 1 },
 617                 { "TriCN_RX_Train_OK", 26, 1 },
 618         { "ESPI_INTR_STATUS", 0x8c8, 0 },
 619                 { "DIP4Err", 0, 1 },
 620                 { "RXDrop", 1, 1 },
 621                 { "TXDrop", 2, 1 },
 622                 { "RXOverflow", 3, 1 },
 623                 { "RAMParityErr", 4, 1 },
 624                 { "DIP2ParityErr", 5, 1 },
 625         { "ESPI_INTR_ENABLE", 0x8cc, 0 },
 626                 { "DIP4Err", 0, 1 },
 627                 { "RXDrop", 1, 1 },
 628                 { "TXDrop", 2, 1 },
 629                 { "RXOverflow", 3, 1 },
 630                 { "RAMParityErr", 4, 1 },
 631                 { "DIP2ParityErr", 5, 1 },
 632         { "RX_DROP_THRESHOLD", 0x8d0, 0 },
 633         { "ESPI_RX_RESET", 0x8ec, 0 },
 634                 { "ESPI_RX_LNK_RST", 0, 1 },
 635                 { "ESPI_RX_CORE_RST", 1, 1 },
 636                 { "RX_CLK_STATUS", 2, 1 },
 637         { "ESPI_MISC_CONTROL", 0x8f0, 0 },
 638                 { "Out_of_Sync_Count", 0, 4 },
 639                 { "DIP2_Count_Mode_Enable", 4, 1 },
 640                 { "DIP2_Parity_Err_Thres", 5, 4 },
 641                 { "DIP4_Thres", 9, 12 },
 642                 { "DIP4_Thres_Enable", 21, 1 },
 643                 { "Force_Disable_Status", 22, 1 },
 644                 { "Dynamic_Deskew", 23, 1 },
 645                 { "Monitored_Port_Num", 25, 2 },
 646                 { "Monitored_Direction", 27, 1 },
 647                 { "Monitored_Interface", 28, 1 },
 648         { "ESPI_DIP2_ERR_COUNT", 0x8f4, 0 },
 649                 { "DIP2_Err_Cnt", 0, 4 },
 650         { "ESPI_CMD_ADDR", 0x8f8, 0 },
 651                 { "Write_Data", 0, 8 },
 652                 { "Register_Offset", 8, 4 },
 653                 { "Channel_Addr", 12, 4 },
 654                 { "Module_Addr", 16, 2 },
 655                 { "Bundle_Addr", 20, 2 },
 656                 { "SPI4_Command", 24, 8 },
 657         { "ESPI_GOSTAT", 0x8fc, 0 },
 658                 { "Read_Data", 0, 8 },
 659                 { "ESPI_Cmd_Busy", 8, 1 },
 660                 { "Error_Ack", 9, 1 },
 661                 { "Unmapped_Err", 10, 1 },
 662                 { "Transaction_Timer", 16, 8 },
 663         { NULL }
 664 };
 665
 666 struct reg_info ulp_regs[] = {
 667         { "ULP_ULIMIT", 0x980, 0 },
 668         { "ULP_TAGMASK", 0x984, 0 },
 669         { "ULP_HREG_INDEX", 0x988, 0 },
 670         { "ULP_HREG_DATA", 0x98c, 0 },
 671         { "ULP_INT_ENABLE", 0x990, 0 },
 672         { "ULP_INT_CAUSE", 0x994, 0 },
 673                 { "Hreg_Par_Err", 0, 1 },
 674                 { "Egrs_Data_Par_Err", 1, 1 },
 675                 { "Ingrs_Data_Par_Err", 2, 1 },
 676                 { "Pm_Intr", 3, 1 },
 677                 { "Pm_E2C_Sync_Err", 4, 1 },
 678                 { "Pm_C2E_Sync_Err", 5, 1 },
 679                 { "Pm_E2C_Empty_Err", 6, 1 },
 680                 { "Pm_C2E_Empty_Err", 7, 1 },
 681                 { "Pm_Par_Err", 8, 16 },
 682                 { "Pm_E2C_Wrt_Full", 24, 1 },
 683                 { "Pm_C2E_Wrt_Full", 25, 1 },
 684         { "ULP_PIO_CTRL", 0x998, 0 },
 685         { NULL }
 686 };
 687
 688 struct reg_info pl_regs[] = {
 689         { "PL_ENABLE", 0xa00, 0 },
 690                 { "PL_Intr_SGE_Err", 0, 1 },
 691                 { "PL_Intr_SGE_Data", 1, 1 },
 692                 { "PL_Intr_MC3", 2, 1 },
 693                 { "PL_Intr_MC4", 3, 1 },
 694                 { "PL_Intr_MC5", 4, 1 },
 695                 { "PL_Intr_RAT", 5, 1 },
 696                 { "PL_Intr_TP", 6, 1 },
 697                 { "PL_Intr_ULP", 7, 1 },
 698                 { "PL_Intr_ESPI", 8, 1 },
 699                 { "PL_Intr_CSPI", 9, 1 },
 700                 { "PL_Intr_PCIX", 10, 1 },
 701                 { "PL_Intr_EXT", 11, 1 },
 702         { "PL_CAUSE", 0xa04, 0 },
 703                 { "PL_Intr_SGE_Err", 0, 1 },
 704                 { "PL_Intr_SGE_Data", 1, 1 },
 705                 { "PL_Intr_MC3", 2, 1 },
 706                 { "PL_Intr_MC4", 3, 1 },
 707                 { "PL_Intr_MC5", 4, 1 },
 708                 { "PL_Intr_RAT", 5, 1 },
 709                 { "PL_Intr_TP", 6, 1 },
 710                 { "PL_Intr_ULP", 7, 1 },
 711                 { "PL_Intr_ESPI", 8, 1 },
 712                 { "PL_Intr_CSPI", 9, 1 },
 713                 { "PL_Intr_PCIX", 10, 1 },
 714                 { "PL_Intr_EXT", 11, 1 },
 715         { NULL }
 716 };
 717
 718 struct reg_info mc5_regs[] = {
 719         { "MC5_CONFIG", 0xc04, 0 },
 720                 { "Mode", 0, 1 },
 721                 { "TCAM_Reset", 1, 1 },
 722                 { "TCAM_Ready", 2, 1 },
 723                 { "DBGI_Enable", 4, 1 },
 724                 { "M_Bus_Enable", 5, 1 },
 725                 { "Parity_Enable", 6, 1 },
 726                 { "SYN_Issue_Mode", 7, 2 },
 727                 { "Build", 16, 1 },
 728                 { "Compression_Enable", 17, 1 },
 729                 { "Num_LIP", 18, 6 },
 730                 { "TCAM_Part_Cnt", 24, 2 },
 731                 { "TCAM_Part_Type", 26, 2 },
 732                 { "TCAM_Part_Size", 28, 2 },
 733                 { "TCAM_Part_Type_HI", 30, 1 },
 734         { "MC5_SIZE", 0xc08, 0 },
 735                 { "Size", 0, 22 },
 736         { "MC5_ROUTING_TABLE_INDEX", 0xc0c, 0 },
 737                 { "Start_of_Routing_Table", 0, 22 },
 738         { "MC5_SERVER_INDEX", 0xc14, 0 },
 739                 { "Start_of_Server_Index", 0, 22 },
 740         { "MC5_LIP_RAM_ADDR", 0xc18, 0 },
 741                 { "Local_IP_RAM_Addr", 0, 6 },
 742                 { "RAM_Write_Enable", 8, 1 },
 743         { "MC5_LIP_RAM_DATA", 0xc1c, 0 },
 744         { "MC5_RSP_LATENCY", 0xc20, 0 },
 745                 { "Search_Response_Latency", 0, 5 },
 746                 { "Learn_Response_Latency", 8, 5 },
 747         { "MC5_PARITY_LATENCY", 0xc24, 0 },
 748                 { "SRCHLAT", 0, 5 },
 749                 { "PARLAT", 8, 5 },
 750         { "MC5_WR_LRN_VERIFY", 0xc28, 0 },
 751                 { "POVEREN", 0, 1 },
 752                 { "LRNVEREN", 1, 1 },
 753                 { "VWVEREN", 2, 1 },
 754         { "MC5_PART_ID_INDEX", 0xc2c, 0 },
 755                 { "IDINDEX", 0, 4 },
 756         { "MC5_RESET_MAX", 0xc30, 0 },
 757                 { "RSTMAX", 0, 9 },
 758         { "MC5_INT_ENABLE", 0xc40, 0 },
 759                 { "MC5_Int_Hit_Out_Active_Region_Err", 0, 1 },
 760                 { "MC5_Int_Hit_In_Active_Region_Err", 1, 1 },
 761                 { "MC5_Int_Hit_In_RT_Region_Err", 2, 1 },
 762                 { "MC5_Int_Miss_Err", 3, 1 },
 763                 { "MC5_Int_LIP0_Err", 4, 1 },
 764                 { "MC5_Int_LIP_Miss_Err", 5, 1 },
 765                 { "MC5_Int_Parity_Err", 6, 1 },
 766                 { "MC5_Int_Active_Region_Full", 7, 1 },
 767                 { "MC5_Int_NFA_Srch_Err", 8, 1 },
 768                 { "MC5_Int_SYN_Cookie", 9, 1 },
 769                 { "MC5_Int_SYN_Cookie_Bad", 10, 1 },
 770                 { "MC5_Int_SYN_Cookie_Off", 11, 1 },
 771                 { "MC5_Int_Unknown_Cmd", 15, 1 },
 772                 { "MC5_Int_RequestQ_Parity_Err", 16, 1 },
 773                 { "MC5_Int_DispatchQ_Parity_Err", 17, 1 },
 774                 { "MC5_Int_Del_Act_Empty", 18, 1 },
 775         { "MC5_INT_CAUSE", 0xc44, 0 },
 776                 { "MC5_Int_Hit_Out_Active_Region_Err", 0, 1 },
 777                 { "MC5_Int_Hit_In_Active_Region_Err", 1, 1 },
 778                 { "MC5_Int_Hit_In_RT_Region_Err", 2, 1 },
 779                 { "MC5_Int_Miss_Err", 3, 1 },
 780                 { "MC5_Int_LIP0_Err", 4, 1 },
 781                 { "MC5_Int_LIP_Miss_Err", 5, 1 },
 782                 { "MC5_Int_Parity_Err", 6, 1 },
 783                 { "MC5_Int_Active_Region_Full", 7, 1 },
 784                 { "MC5_Int_NFA_Srch_Err", 8, 1 },
 785                 { "MC5_Int_SYN_Cookie", 9, 1 },
 786                 { "MC5_Int_SYN_Cookie_Bad", 10, 1 },
 787                 { "MC5_Int_SYN_Cookie_Off", 11, 1 },
 788                 { "MC5_Int_Unknown_Cmd", 15, 1 },
 789                 { "MC5_Int_RequestQ_Parity_Err", 16, 1 },
 790                 { "MC5_Int_DispatchQ_Parity_Err", 17, 1 },
 791                 { "MC5_Int_Del_Act_Empty", 18, 1 },
 792         { "MC5_INT_TID", 0xc48, 0 },
 793         { "MC5_INT_PTID", 0xc4c, 0 },
 794         { "MC5_DBGI_CONFIG", 0xc74, 0 },
 795         { "MC5_DBGI_REQ_CMD", 0xc78, 0 },
 796                 { "CmdMode", 0, 3 },
 797                 { "SADRSEL", 4, 1 },
 798                 { "Write_Burst_Size", 22, 10 },
 799         { "MC5_DBGI_REQ_ADDR0", 0xc7c, 0 },
 800         { "MC5_DBGI_REQ_ADDR1", 0xc80, 0 },
 801         { "MC5_DBGI_REQ_ADDR2", 0xc84, 0 },
 802         { "MC5_DBGI_REQ_DATA0", 0xc88, 0 },
 803         { "MC5_DBGI_REQ_DATA1", 0xc8c, 0 },
 804         { "MC5_DBGI_REQ_DATA2", 0xc90, 0 },
 805         { "MC5_DBGI_REQ_DATA3", 0xc94, 0 },
 806         { "MC5_DBGI_REQ_DATA4", 0xc98, 0 },
 807         { "MC5_DBGI_REQ_MASK0", 0xc9c, 0 },
 808         { "MC5_DBGI_REQ_MASK1", 0xca0, 0 },
 809         { "MC5_DBGI_REQ_MASK2", 0xca4, 0 },
 810         { "MC5_DBGI_REQ_MASK3", 0xca8, 0 },
 811         { "MC5_DBGI_REQ_MASK4", 0xcac, 0 },
 812         { "MC5_DBGI_RSP_STATUS", 0xcb0, 0 },
 813                 { "DBGI_Rsp_Valid", 0, 1 },
 814                 { "DBGI_Rsp_Hit", 1, 1 },
 815                 { "DBGI_Rsp_Err", 2, 1 },
 816                 { "DBGI_Rsp_Err_Reason", 8, 3 },
 817         { "MC5_DBGI_RSP_DATA0", 0xcb4, 0 },
 818         { "MC5_DBGI_RSP_DATA1", 0xcb8, 0 },
 819         { "MC5_DBGI_RSP_DATA2", 0xcbc, 0 },
 820         { "MC5_DBGI_RSP_DATA3", 0xcc0, 0 },
 821         { "MC5_DBGI_RSP_DATA4", 0xcc4, 0 },
 822         { "MC5_DBGI_RSP_LAST_CMD", 0xcc8, 0 },
 823         { "MC5_POPEN_DATA_WR_CMD", 0xccc, 0 },
 824         { "MC5_POPEN_MASK_WR_CMD", 0xcd0, 0 },
 825         { "MC5_AOPEN_SRCH_CMD", 0xcd4, 0 },
 826         { "MC5_AOPEN_LRN_CMD", 0xcd8, 0 },
 827         { "MC5_SYN_SRCH_CMD", 0xcdc, 0 },
 828         { "MC5_SYN_LRN_CMD", 0xce0, 0 },
 829         { "MC5_ACK_SRCH_CMD", 0xce4, 0 },
 830         { "MC5_ACK_LRN_CMD", 0xce8, 0 },
 831         { "MC5_ILOOKUP_CMD", 0xcec, 0 },
 832         { "MC5_ELOOKUP_CMD", 0xcf0, 0 },
 833         { "MC5_DATA_WRITE_CMD", 0xcf4, 0 },
 834         { "MC5_DATA_READ_CMD", 0xcf8, 0 },
 835         { "MC5_MASK_WRITE_CMD", 0xcfc, 0 },
 836         { NULL }
 837 };