2 * Copyright (C) 2015 Mihai Carabas <mihai.carabas@gmail.com>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <machine/vmm.h>
34 int segid
; /* memory segment */
35 vm_ooffset_t segoff
; /* offset into memory segment */
36 size_t len
; /* mmap length */
40 #define VM_MEMMAP_F_WIRED 0x01
47 #define VM_MEMSEG_NAME(m) ((m)->name[0] != '\0' ? (m)->name : NULL)
51 char name
[VM_MAX_SUFFIXLEN
+ 1];
56 int regnum
; /* enum vm_reg_name */
60 struct vm_register_set
{
63 const int *regnums
; /* enum vm_reg_name */
69 cpuset_t
*cpuset
; /* CPU set storage */
71 struct vm_exit
*vm_exit
;
88 struct vm_capability
{
90 enum vm_cap_type captype
;
95 #define MAX_VM_STATS 64
99 int num_entries
; /* out */
101 uint64_t statbuf
[MAX_VM_STATS
];
103 struct vm_stat_desc
{
105 char desc
[128]; /* out */
109 enum vm_suspend_how how
;
113 int vcpuid
; /* inputs */
114 int prot
; /* PROT_READ or PROT_WRITE */
116 struct vm_guest_paging paging
;
117 int fault
; /* outputs */
121 struct vm_activate_cpu
{
130 #define VM_ACTIVE_CPUS 0
131 #define VM_SUSPENDED_CPUS 1
132 #define VM_DEBUG_CPUS 2
134 struct vm_vgic_version
{
139 struct vm_vgic_descr
{
140 struct vm_vgic_version ver
;
145 uint64_t redist_start
;
146 uint64_t redist_size
;
155 struct vm_cpu_topology
{
163 /* general routines */
166 IOCNUM_SET_CAPABILITY
= 2,
167 IOCNUM_GET_CAPABILITY
= 3,
172 IOCNUM_GET_GPA_PMAP
= 12,
173 IOCNUM_GLA2GPA_NOFAULT
= 13,
174 IOCNUM_ALLOC_MEMSEG
= 14,
175 IOCNUM_GET_MEMSEG
= 15,
176 IOCNUM_MMAP_MEMSEG
= 16,
177 IOCNUM_MMAP_GETNEXT
= 17,
178 IOCNUM_MUNMAP_MEMSEG
= 18,
180 /* register/state accessors */
181 IOCNUM_SET_REGISTER
= 20,
182 IOCNUM_GET_REGISTER
= 21,
183 IOCNUM_SET_REGISTER_SET
= 24,
184 IOCNUM_GET_REGISTER_SET
= 25,
187 IOCNUM_VM_STATS
= 50,
188 IOCNUM_VM_STAT_DESC
= 51,
191 IOCNUM_SET_TOPOLOGY
= 63,
192 IOCNUM_GET_TOPOLOGY
= 64,
194 /* interrupt injection */
195 IOCNUM_ASSERT_IRQ
= 80,
196 IOCNUM_DEASSERT_IRQ
= 81,
197 IOCNUM_RAISE_MSI
= 82,
198 IOCNUM_INJECT_EXCEPTION
= 83,
201 IOCNUM_ACTIVATE_CPU
= 90,
202 IOCNUM_GET_CPUSET
= 91,
203 IOCNUM_SUSPEND_CPU
= 92,
204 IOCNUM_RESUME_CPU
= 93,
207 IOCNUM_GET_VGIC_VERSION
= 110,
208 IOCNUM_ATTACH_VGIC
= 111,
212 _IOWR('v', IOCNUM_RUN, struct vm_run)
214 _IOW('v', IOCNUM_SUSPEND, struct vm_suspend)
216 _IO('v', IOCNUM_REINIT)
217 #define VM_ALLOC_MEMSEG \
218 _IOW('v', IOCNUM_ALLOC_MEMSEG, struct vm_memseg)
219 #define VM_GET_MEMSEG \
220 _IOWR('v', IOCNUM_GET_MEMSEG, struct vm_memseg)
221 #define VM_MMAP_MEMSEG \
222 _IOW('v', IOCNUM_MMAP_MEMSEG, struct vm_memmap)
223 #define VM_MMAP_GETNEXT \
224 _IOWR('v', IOCNUM_MMAP_GETNEXT, struct vm_memmap)
225 #define VM_MUNMAP_MEMSEG \
226 _IOW('v', IOCNUM_MUNMAP_MEMSEG, struct vm_munmap)
227 #define VM_SET_REGISTER \
228 _IOW('v', IOCNUM_SET_REGISTER, struct vm_register)
229 #define VM_GET_REGISTER \
230 _IOWR('v', IOCNUM_GET_REGISTER, struct vm_register)
231 #define VM_SET_REGISTER_SET \
232 _IOW('v', IOCNUM_SET_REGISTER_SET, struct vm_register_set)
233 #define VM_GET_REGISTER_SET \
234 _IOWR('v', IOCNUM_GET_REGISTER_SET, struct vm_register_set)
235 #define VM_SET_CAPABILITY \
236 _IOW('v', IOCNUM_SET_CAPABILITY, struct vm_capability)
237 #define VM_GET_CAPABILITY \
238 _IOWR('v', IOCNUM_GET_CAPABILITY, struct vm_capability)
240 _IOWR('v', IOCNUM_VM_STATS, struct vm_stats)
241 #define VM_STAT_DESC \
242 _IOWR('v', IOCNUM_VM_STAT_DESC, struct vm_stat_desc)
243 #define VM_ASSERT_IRQ \
244 _IOW('v', IOCNUM_ASSERT_IRQ, struct vm_irq)
245 #define VM_DEASSERT_IRQ \
246 _IOW('v', IOCNUM_DEASSERT_IRQ, struct vm_irq)
247 #define VM_RAISE_MSI \
248 _IOW('v', IOCNUM_RAISE_MSI, struct vm_msi)
249 #define VM_INJECT_EXCEPTION \
250 _IOW('v', IOCNUM_INJECT_EXCEPTION, struct vm_exception)
251 #define VM_SET_TOPOLOGY \
252 _IOW('v', IOCNUM_SET_TOPOLOGY, struct vm_cpu_topology)
253 #define VM_GET_TOPOLOGY \
254 _IOR('v', IOCNUM_GET_TOPOLOGY, struct vm_cpu_topology)
255 #define VM_GLA2GPA_NOFAULT \
256 _IOWR('v', IOCNUM_GLA2GPA_NOFAULT, struct vm_gla2gpa)
257 #define VM_ACTIVATE_CPU \
258 _IOW('v', IOCNUM_ACTIVATE_CPU, struct vm_activate_cpu)
259 #define VM_GET_CPUS \
260 _IOW('v', IOCNUM_GET_CPUSET, struct vm_cpuset)
261 #define VM_SUSPEND_CPU \
262 _IOW('v', IOCNUM_SUSPEND_CPU, struct vm_activate_cpu)
263 #define VM_RESUME_CPU \
264 _IOW('v', IOCNUM_RESUME_CPU, struct vm_activate_cpu)
265 #define VM_GET_VGIC_VERSION \
266 _IOR('v', IOCNUM_GET_VGIC_VERSION, struct vm_vgic_version)
267 #define VM_ATTACH_VGIC \
268 _IOW('v', IOCNUM_ATTACH_VGIC, struct vm_vgic_descr)