sys/powerpc/include/slb.h

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause
   3  *
   4  * Copyright (C) 2009 Nathan Whitehorn
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  19  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  20  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  21  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  22  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  23  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  24  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  25  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26  */
  27
  28 #ifndef _MACHINE_SLB_H_
  29 #define _MACHINE_SLB_H_
  30
  31 /*
  32  * Bit definitions for segment lookaside buffer entries.
  33  *
  34  * PowerPC Microprocessor Family: The Programming Environments for 64-bit
  35  * Microprocessors, section 7.4.2.1
  36  *
  37  * Note that these bitmasks are relative to the values for one of the two
  38  * values for slbmte, slbmfee, and slbmfev, not the internal SLB
  39  * representation.
  40  */
  41
  42 #define SLBV_KS         0x0000000000000800UL /* Supervisor-state prot key */
  43 #define SLBV_KP         0x0000000000000400UL /* User-state prot key */
  44 #define SLBV_N          0x0000000000000200UL /* No-execute protection */
  45 #define SLBV_L          0x0000000000000100UL /* Large page selector */
  46 #define SLBV_CLASS      0x0000000000000080UL /* Class selector */
  47 #define SLBV_VSID_MASK  0xfffffffffffff000UL /* Virtual segment ID mask */
  48 #define SLBV_VSID_SHIFT 12
  49
  50 /*
  51  * Make a predictable 1:1 map from ESIDs to VSIDs for the kernel. Hash table
  52  * coverage is increased by swizzling the ESID and multiplying by a prime
  53  * number (0x13bb).
  54  */
  55 #define KERNEL_VSID_BIT 0x0000001000000000UL /* Bit set in all kernel VSIDs */
  56 #define KERNEL_VSID(esid) ((((((uint64_t)esid << 8) | ((uint64_t)esid >> 28)) \
  57                                 * 0x13bbUL) & (KERNEL_VSID_BIT - 1)) | \
  58                                 KERNEL_VSID_BIT)
  59
  60 #define SLBE_VALID      0x0000000008000000UL /* SLB entry valid */
  61 #define SLBE_INDEX_MASK 0x0000000000000fffUL /* SLB index mask*/
  62 #define SLBE_ESID_MASK  0xfffffffff0000000UL /* Effective segment ID mask */
  63 #define SLBE_ESID_SHIFT 28
  64
  65 /*
  66  * SLB page sizes encoding, as present in property ibm,segment-page-sizes
  67  * of CPU device tree node.
  68  *
  69  * See LoPAPR: CPU Node Properties, section C.6.1.4.
  70  */
  71 #define SLB_PGSZ_4K_4K  0
  72
  73 /* Virtual real-mode VSID in LPARs */
  74 #define VSID_VRMA       0x1ffffff
  75
  76 /*
  77  * User segment for copyin/out
  78  */
  79 #define USER_SLB_SLOT 0
  80 #define USER_SLB_SLBE (((USER_ADDR >> ADDR_SR_SHFT) << SLBE_ESID_SHIFT) | \
  81                         SLBE_VALID | USER_SLB_SLOT)
  82
  83 struct slb {
  84         uint64_t        slbv;
  85         uint64_t        slbe;
  86 };
  87
  88 struct pmap;
  89 void    handle_kernel_slb_spill(int, register_t, register_t);
  90 int     handle_user_slb_spill(struct pmap *pm, vm_offset_t addr);
  91
  92 #endif /* !_MACHINE_SLB_H_ */