src/interrupts.c

   1 /*      FreeEMS - the open source engine management system
   2
   3         Copyright 2008 Fred Cooke
   4
   5         This file is part of the FreeEMS project.
   6
   7         FreeEMS software is free software: you can redistribute it and/or modify
   8         it under the terms of the GNU General Public License as published by
   9         the Free Software Foundation, either version 3 of the License, or
  10         (at your option) any later version.
  11
  12         FreeEMS software is distributed in the hope that it will be useful,
  13         but WITHOUT ANY WARRANTY; without even the implied warranty of
  14         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15         GNU General Public License for more details.
  16
  17         You should have received a copy of the GNU General Public License
  18         along with any FreeEMS software.  If not, see http://www.gnu.org/licenses/
  19
  20         We ask that if you make any changes to this file you email them upstream to
  21         us at admin(at)diyefi(dot)org or, even better, fork the code on github.com!
  22
  23         Thank you for choosing FreeEMS to run your engine! */
  24
  25
  26 /**     @file interrupts.c
  27  * @ingroup interruptHandlers
  28  *
  29  * @brief Interrupt Vector Table
  30  *
  31  * This file contains the definition of the interrupt vector table. This
  32  * table consists only of pointers to void(void) functions that will be
  33  * called by the hardware when an interrupt of a certain type occurs.
  34  *
  35  * @author Fred Cooke
  36  */
  37
  38
  39 #include "inc/freeEMS.h"
  40 #include "inc/interrupts.h"
  41
  42
  43 /* Correctly placed in memory due to compiler/linker directives in memory.x and the linker script.      */
  44 /* This is the FULL table of length 0xFF starting at 0xFF00 and ending at 0xFFFF, redirected with       */
  45 /* jumps to the offset location by the serial monitor starting at 0xF700 and ending at 0xF800           */
  46 /* http://m68hc11.serveftp.org/wiki/index.php/FAQ:Interrupts                                                                            */
  47 const interruptTable _vectors[] VECTORS = {
  48 /* 0xFF00 to 0xFF0F */
  49 /*      The first row are NOT actually interrupts at all, just a wasted 16 bytes for tidiness */
  50 /*      UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,           */
  51 /*      Reserved                Reserved                Reserved                Reserved                Reserved                Reserved                Reserved                Reserved        */
  52 /*                                                                                                                                                                                                                                                              */
  53
  54 /* 0xFF10 to 0xFF1F */
  55         UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,
  56 /*      Spurious                Reserved                Reserved                Reserved                Reserved                Reserved                Reserved                Reserved        */
  57 /*                                                                                                                                                                                                                                                              */
  58
  59 /* 0xFF20 to 0xFF2F */
  60         UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,
  61 /*      Reserved                Reserved                Reserved                Reserved                Reserved                Reserved                Reserved                Reserved        */
  62 /*                                                                                                                                                                                                                                                              */
  63
  64 /* 0xFF30 to 0xFF3F */
  65         UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,
  66 /*      Reserved                Reserved                Reserved                Reserved                Reserved                Reserved                Reserved                Reserved        */
  67 /*                                                                                                                                                                                                                                                              */
  68
  69 /* 0xFF40 to 0xFF4F */
  70         UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,
  71 /*      Reserved                Reserved                Reserved                Reserved                Reserved                Reserved                Reserved                Reserved        */
  72 /*                                                                                                                                                                                                                                                              */
  73
  74 /* 0xFF50 to 0xFF5F */
  75         UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,
  76 /*      Reserved                Reserved                Reserved                Reserved                Reserved                Reserved                Reserved                Reserved        */
  77 /*                                                                                                                                                                                                                                                              */
  78
  79 /* 0xFF60 to 0xFF6F */
  80         UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,
  81 /*      RAM violation   XGATEsoft error XGATE 7                 XGATE 6                 XGATE 5                 XGATE 4                 XGATE 3                 XGATE 2         */
  82 /*                                                                                                                                                                                                                                                              */
  83
  84 /* 0xFF70 to 0xFF7F */
  85         UISR,                   UISR,                   StagedOffISR,   StagedOnISR,    IgnitionFireISR,IgnitionDwellISR,UISR,                  UISR,//VRegAPIISR,
  86 /*      XGATE 1                 XGATE 0                 PIT 3                   PIT 2                   PIT 1                   PIT 0                   Reserved                API                     */
  87 /*                                                                                                                                      Fire Coil               Dwell Coil                                                                      */
  88
  89 /* 0xFF80 to 0xFF8F */
  90         LowVoltageISR,  UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   PortPISR,
  91 /*      Low Voltage             IIC1                    SCI5                    SCI4                    SCI3                    SCI2                    PWM ESDown              Port P          */
  92 /*                                                                                                                                                                                                                                                              */
  93
  94 /* 0xFF90 to 0xFF9F */
  95         UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,
  96 /*      CAN4 Tx                 CAN4 Rx                 CAN4 Errors             CAN4 Wakeup             CAN3 Tx                 CAN3 Rx                 CAN3 Errors             CAN3 Wakeup     */
  97 /*                                                                                                                                                                                                                                                              */
  98
  99 /* 0xFFA0 to 0xFFAF */
 100         UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,
 101 /*      CAN2 Tx                 CAN2 Rx                 CAN2 Errors             CAN2 Wakeup             CAN1 Tx                 CAN1 Rx                 CAN1 Errors             CAN1 Wakeup     */
 102 /*                                                                                                                                                                                                                                                              */
 103
 104 /* 0xFFB0 to 0xFFBF */
 105         UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   UISR,
 106 /*      CAN0 Tx                 CAN0 Rx                 CAN0 Errors             CAN0 Wakeup             FLASH                   EEPROM                  SPI2                    SPI1            */
 107 /*                                                                                                                                                                                                                                                              */
 108
 109 /* 0xFFC0 to 0xFFCF */
 110         UISR,                   UISR,                   UISR,                   UISR,                   UISR,                   ModDownCtrISR,  PortHISR,               PortJISR,
 111 /*      IIC0                    Reserved                CRG self clock  CRG PLL lock    PAB Overflow    ModDwnCtrUF             Port H                  Port J          */
 112 /*                                                                                                                                                                                                                                                              */
 113
 114 /* 0xFFD0 to 0xFFDF */
 115         UISR,                   UISR,                   UISR,                   SCI0ISR,                UISR,                   UISR,                   UISR,                   TimerOverflow,
 116 /*      ATD1                    ATD0?                   SCI1                    SCI0                    SPI0                    PAIE                    PAA OF                  ECT OF          */
 117 /*                                                                                                      Serial 0                                                                                                                                        */
 118
 119 /* 0xFFE0 to 0xFFEF */
 120         Injector6ISR,   Injector5ISR,   Injector4ISR,   Injector3ISR,   Injector2ISR,   Injector1ISR,   SecondaryRPMISR,PrimaryRPMISR,
 121 /*      ECT7                    ECT6                    ECT5                    ECT4                    ECT3                    ECT2                    ECT1                    ECT0            */
 122 /*      Injector 6              Injector 5              Injector 4              Injector 3              Injector 2              Injector 1              Secondary RPM   Primary RPM     */
 123
 124 /* 0xFFF0 to 0xFFFF */
 125         RTIISR,                 IRQISR,                 XIRQISR,                UISR,                   UISR,                   UISR,                   UISR,                   _start
 126 /*      RTI                             IRQ                             XIRQ                    SWI                             UnimpInstruct   COP Reset               ClockReset              SystemReset     */
 127 /*                                                                                                                                                                                                                                      Entry point */
 128 };