[PATCH] RISC-V: Move UNSPEC_SSP_SET and UNSPEC_SSP_TEST to correct enum
[gcc.git] / gcc / lra-eliminations.cc
blobd84a7d1ee99f04f6e724173d9d0b36aa4f006c5f
1 /* Code for RTL register eliminations.
2 Copyright (C) 2010-2025 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 /* Eliminable registers (like a soft argument or frame pointer) are
22 widely used in RTL. These eliminable registers should be replaced
23 by real hard registers (like the stack pointer or hard frame
24 pointer) plus some offset. The offsets usually change whenever the
25 stack is expanded. We know the final offsets only at the very end
26 of LRA.
28 Within LRA, we usually keep the RTL in such a state that the
29 eliminable registers can be replaced by just the corresponding hard
30 register (without any offset). To achieve this we should add the
31 initial elimination offset at the beginning of LRA and update the
32 offsets whenever the stack is expanded. We need to do this before
33 every constraint pass because the choice of offset often affects
34 whether a particular address or memory constraint is satisfied.
36 We keep RTL code at most time in such state that the virtual
37 registers can be changed by just the corresponding hard registers
38 (with zero offsets) and we have the right RTL code. To achieve this
39 we should add initial offset at the beginning of LRA work and update
40 offsets after each stack expanding. But actually we update virtual
41 registers to the same virtual registers + corresponding offsets
42 before every constraint pass because it affects constraint
43 satisfaction (e.g. an address displacement became too big for some
44 target).
46 The final change of eliminable registers to the corresponding hard
47 registers are done at the very end of LRA when there were no change
48 in offsets anymore:
50 fp + 42 => sp + 42
54 #include "config.h"
55 #include "system.h"
56 #include "coretypes.h"
57 #include "backend.h"
58 #include "target.h"
59 #include "rtl.h"
60 #include "tree.h"
61 #include "df.h"
62 #include "memmodel.h"
63 #include "tm_p.h"
64 #include "optabs.h"
65 #include "regs.h"
66 #include "ira.h"
67 #include "recog.h"
68 #include "output.h"
69 #include "rtl-error.h"
70 #include "lra-int.h"
72 /* This structure is used to record information about hard register
73 eliminations. */
74 class lra_elim_table
76 public:
77 /* Hard register number to be eliminated. */
78 int from;
79 /* Hard register number used as replacement. */
80 int to;
81 /* Difference between values of the two hard registers above on
82 previous iteration. */
83 poly_int64 previous_offset;
84 /* Difference between the values on the current iteration. */
85 poly_int64 offset;
86 /* Nonzero if this elimination can be done. */
87 bool can_eliminate;
88 /* CAN_ELIMINATE since the last check. */
89 bool prev_can_eliminate;
90 /* REG rtx for the register to be eliminated. We cannot simply
91 compare the number since we might then spuriously replace a hard
92 register corresponding to a pseudo assigned to the reg to be
93 eliminated. */
94 rtx from_rtx;
95 /* REG rtx for the replacement. */
96 rtx to_rtx;
99 /* The elimination table. Each array entry describes one possible way
100 of eliminating a register in favor of another. If there is more
101 than one way of eliminating a particular register, the most
102 preferred should be specified first. */
103 static class lra_elim_table *reg_eliminate = 0;
105 /* This is an intermediate structure to initialize the table. It has
106 exactly the members provided by ELIMINABLE_REGS. */
107 static const struct elim_table_1
109 const int from;
110 const int to;
111 } reg_eliminate_1[] =
113 ELIMINABLE_REGS;
115 #define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1)
117 /* Print info about elimination table to file F. */
118 static void
119 print_elim_table (FILE *f)
121 class lra_elim_table *ep;
123 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
125 fprintf (f, "%s eliminate %d to %d (offset=",
126 ep->can_eliminate ? "Can" : "Can't", ep->from, ep->to);
127 print_dec (ep->offset, f);
128 fprintf (f, ", prev_offset=");
129 print_dec (ep->previous_offset, f);
130 fprintf (f, ")\n");
134 /* Print info about elimination table to stderr. */
135 void
136 lra_debug_elim_table (void)
138 print_elim_table (stderr);
141 /* Setup possibility of elimination in elimination table element EP to
142 VALUE. Setup FRAME_POINTER_NEEDED if elimination from frame
143 pointer to stack pointer is not possible anymore. */
144 static void
145 setup_can_eliminate (class lra_elim_table *ep, bool value)
147 ep->can_eliminate = ep->prev_can_eliminate = value;
148 if (! value
149 && ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM)
150 frame_pointer_needed = 1;
151 if (!frame_pointer_needed)
152 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = 0;
155 /* Map: eliminable "from" register -> its current elimination,
156 or NULL if none. The elimination table may contain more than
157 one elimination for the same hard register, but this map specifies
158 the one that we are currently using. */
159 static class lra_elim_table *elimination_map[FIRST_PSEUDO_REGISTER];
161 /* When an eliminable hard register becomes not eliminable, we use the
162 following special structure to restore original offsets for the
163 register. */
164 static class lra_elim_table self_elim_table;
166 /* Offsets should be used to restore original offsets for eliminable
167 hard register which just became not eliminable. Zero,
168 otherwise. */
169 static poly_int64 self_elim_offsets[FIRST_PSEUDO_REGISTER];
171 /* Map: hard regno -> RTL presentation. RTL presentations of all
172 potentially eliminable hard registers are stored in the map. */
173 static rtx eliminable_reg_rtx[FIRST_PSEUDO_REGISTER];
175 /* Set up ELIMINATION_MAP of the currently used eliminations. */
176 static void
177 setup_elimination_map (void)
179 int i;
180 class lra_elim_table *ep;
182 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
183 elimination_map[i] = NULL;
184 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
185 if (ep->can_eliminate && elimination_map[ep->from] == NULL)
186 elimination_map[ep->from] = ep;
191 /* Compute the sum of X and Y, making canonicalizations assumed in an
192 address, namely: sum constant integers, surround the sum of two
193 constants with a CONST, put the constant as the second operand, and
194 group the constant on the outermost sum.
196 This routine assumes both inputs are already in canonical form. */
197 static rtx
198 form_sum (rtx x, rtx y)
200 machine_mode mode = GET_MODE (x);
201 poly_int64 offset;
203 if (mode == VOIDmode)
204 mode = GET_MODE (y);
206 if (mode == VOIDmode)
207 mode = Pmode;
209 if (poly_int_rtx_p (x, &offset))
210 return plus_constant (mode, y, offset);
211 else if (poly_int_rtx_p (y, &offset))
212 return plus_constant (mode, x, offset);
213 else if (CONSTANT_P (x))
214 std::swap (x, y);
216 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
217 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
219 /* Note that if the operands of Y are specified in the opposite
220 order in the recursive calls below, infinite recursion will
221 occur. */
222 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
223 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
225 /* If both constant, encapsulate sum. Otherwise, just form sum. A
226 constant will have been placed second. */
227 if (CONSTANT_P (x) && CONSTANT_P (y))
229 if (GET_CODE (x) == CONST)
230 x = XEXP (x, 0);
231 if (GET_CODE (y) == CONST)
232 y = XEXP (y, 0);
234 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
237 return gen_rtx_PLUS (mode, x, y);
240 /* Return the current substitution hard register of the elimination of
241 HARD_REGNO. If HARD_REGNO is not eliminable, return itself. */
243 lra_get_elimination_hard_regno (int hard_regno)
245 class lra_elim_table *ep;
247 if (hard_regno < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
248 return hard_regno;
249 if ((ep = elimination_map[hard_regno]) == NULL)
250 return hard_regno;
251 return ep->to;
254 /* Return elimination which will be used for hard reg REG, NULL
255 otherwise. */
256 static class lra_elim_table *
257 get_elimination (rtx reg)
259 int hard_regno;
260 class lra_elim_table *ep;
262 lra_assert (REG_P (reg));
263 if ((hard_regno = REGNO (reg)) < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
264 return NULL;
265 if ((ep = elimination_map[hard_regno]) != NULL)
266 return ep->from_rtx != reg ? NULL : ep;
267 poly_int64 offset = self_elim_offsets[hard_regno];
268 if (known_eq (offset, 0))
269 return NULL;
270 /* This is an iteration to restore offsets just after HARD_REGNO
271 stopped to be eliminable. */
272 self_elim_table.from = self_elim_table.to = hard_regno;
273 self_elim_table.from_rtx
274 = self_elim_table.to_rtx
275 = eliminable_reg_rtx[hard_regno];
276 lra_assert (self_elim_table.from_rtx != NULL);
277 self_elim_table.offset = offset;
278 return &self_elim_table;
281 /* Transform (subreg (plus reg const)) to (plus (subreg reg) const)
282 when it is possible. Return X or the transformation result if the
283 transformation is done. */
284 static rtx
285 move_plus_up (rtx x)
287 rtx subreg_reg;
288 machine_mode x_mode, subreg_reg_mode;
290 if (GET_CODE (x) != SUBREG || !subreg_lowpart_p (x))
291 return x;
292 subreg_reg = SUBREG_REG (x);
293 x_mode = GET_MODE (x);
294 subreg_reg_mode = GET_MODE (subreg_reg);
295 if (!paradoxical_subreg_p (x)
296 && GET_CODE (subreg_reg) == PLUS
297 && CONSTANT_P (XEXP (subreg_reg, 1))
298 && GET_MODE_CLASS (x_mode) == MODE_INT
299 && GET_MODE_CLASS (subreg_reg_mode) == MODE_INT)
301 rtx cst = simplify_subreg (x_mode, XEXP (subreg_reg, 1), subreg_reg_mode,
302 subreg_lowpart_offset (x_mode,
303 subreg_reg_mode));
304 if (cst && CONSTANT_P (cst))
305 return gen_rtx_PLUS (x_mode, lowpart_subreg (x_mode,
306 XEXP (subreg_reg, 0),
307 subreg_reg_mode), cst);
309 return x;
312 /* Flag that we already did frame pointer to stack pointer elimination. */
313 static bool elimination_fp2sp_occured_p = false;
315 /* Scan X and replace any eliminable registers (such as fp) with a
316 replacement (such as sp) if SUBST_P, plus an offset. The offset is
317 a change in the offset between the eliminable register and its
318 substitution if UPDATE_P, or the full offset if FULL_P, or
319 otherwise zero. If FULL_P, we also use the SP offsets for
320 elimination to SP. If UPDATE_P, use UPDATE_SP_OFFSET for updating
321 offsets of register elimnable to SP. If UPDATE_SP_OFFSET is
322 non-zero, don't use difference of the offset and the previous
323 offset.
325 MEM_MODE is the mode of an enclosing MEM. We need this to know how
326 much to adjust a register for, e.g., PRE_DEC. Also, if we are
327 inside a MEM, we are allowed to replace a sum of a hard register
328 and the constant zero with the hard register, which we cannot do
329 outside a MEM. In addition, we need to record the fact that a
330 hard register is referenced outside a MEM.
332 If we make full substitution to SP for non-null INSN, add the insn
333 sp offset. */
335 lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode,
336 bool subst_p, bool update_p,
337 poly_int64 update_sp_offset, bool full_p)
339 enum rtx_code code = GET_CODE (x);
340 class lra_elim_table *ep;
341 rtx new_rtx;
342 int i, j;
343 const char *fmt;
344 int copied = 0;
346 lra_assert (!update_p || !full_p);
347 lra_assert (known_eq (update_sp_offset, 0)
348 || (!subst_p && update_p && !full_p));
349 if (! current_function_decl)
350 return x;
352 switch (code)
354 CASE_CONST_ANY:
355 case CONST:
356 case SYMBOL_REF:
357 case CODE_LABEL:
358 case PC:
359 case ASM_INPUT:
360 case ADDR_VEC:
361 case ADDR_DIFF_VEC:
362 case RETURN:
363 return x;
365 case REG:
366 /* First handle the case where we encounter a bare hard register
367 that is eliminable. Replace it with a PLUS. */
368 if ((ep = get_elimination (x)) != NULL)
370 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
372 if (ep->to_rtx == stack_pointer_rtx && ep->from == FRAME_POINTER_REGNUM)
373 elimination_fp2sp_occured_p = true;
375 if (maybe_ne (update_sp_offset, 0))
377 if (ep->to_rtx == stack_pointer_rtx)
378 return plus_constant (Pmode, to, update_sp_offset);
379 return to;
381 else if (update_p)
382 return plus_constant (Pmode, to, ep->offset - ep->previous_offset);
383 else if (full_p)
384 return plus_constant (Pmode, to,
385 ep->offset
386 - (insn != NULL_RTX
387 && ep->to_rtx == stack_pointer_rtx
388 ? lra_get_insn_recog_data (insn)->sp_offset
389 : 0));
390 else
391 return to;
393 return x;
395 case PLUS:
396 /* If this is the sum of an eliminable register and a constant, rework
397 the sum. */
398 if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1)))
400 if ((ep = get_elimination (XEXP (x, 0))) != NULL)
402 poly_int64 offset, curr_offset;
403 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
405 if (ep->to_rtx == stack_pointer_rtx && ep->from == FRAME_POINTER_REGNUM)
406 elimination_fp2sp_occured_p = true;
408 if (! update_p && ! full_p)
409 return simplify_gen_binary (PLUS, Pmode, to, XEXP (x, 1));
411 if (maybe_ne (update_sp_offset, 0))
412 offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
413 else
414 offset = (update_p
415 ? ep->offset - ep->previous_offset : ep->offset);
416 if (full_p && insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
417 offset -= lra_get_insn_recog_data (insn)->sp_offset;
418 if (poly_int_rtx_p (XEXP (x, 1), &curr_offset)
419 && known_eq (curr_offset, -offset))
420 return to;
421 else
422 return gen_rtx_PLUS (Pmode, to,
423 plus_constant (Pmode,
424 XEXP (x, 1), offset));
427 /* If the hard register is not eliminable, we are done since
428 the other operand is a constant. */
429 return x;
432 /* If this is part of an address, we want to bring any constant
433 to the outermost PLUS. We will do this by doing hard
434 register replacement in our operands and seeing if a constant
435 shows up in one of them.
437 Note that there is no risk of modifying the structure of the
438 insn, since we only get called for its operands, thus we are
439 either modifying the address inside a MEM, or something like
440 an address operand of a load-address insn. */
443 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
444 subst_p, update_p,
445 update_sp_offset, full_p);
446 rtx new1 = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
447 subst_p, update_p,
448 update_sp_offset, full_p);
450 new0 = move_plus_up (new0);
451 new1 = move_plus_up (new1);
452 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
453 return form_sum (new0, new1);
455 return x;
457 case MULT:
458 /* If this is the product of an eliminable hard register and a
459 constant, apply the distribute law and move the constant out
460 so that we have (plus (mult ..) ..). This is needed in order
461 to keep load-address insns valid. This case is pathological.
462 We ignore the possibility of overflow here. */
463 if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1))
464 && (ep = get_elimination (XEXP (x, 0))) != NULL)
466 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
468 if (ep->to_rtx == stack_pointer_rtx && ep->from == FRAME_POINTER_REGNUM)
469 elimination_fp2sp_occured_p = true;
471 if (maybe_ne (update_sp_offset, 0))
473 if (ep->to_rtx == stack_pointer_rtx)
474 return plus_constant (Pmode,
475 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
476 update_sp_offset * INTVAL (XEXP (x, 1)));
477 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
479 else if (update_p)
480 return plus_constant (Pmode,
481 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
482 (ep->offset - ep->previous_offset)
483 * INTVAL (XEXP (x, 1)));
484 else if (full_p)
486 poly_int64 offset = ep->offset;
488 if (insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
489 offset -= lra_get_insn_recog_data (insn)->sp_offset;
490 return
491 plus_constant (Pmode,
492 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
493 offset * INTVAL (XEXP (x, 1)));
495 else
496 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
499 /* fall through */
501 case CALL:
502 case COMPARE:
503 /* See comments before PLUS about handling MINUS. */
504 case MINUS:
505 case DIV: case UDIV:
506 case MOD: case UMOD:
507 case AND: case IOR: case XOR:
508 case ROTATERT: case ROTATE:
509 case ASHIFTRT: case LSHIFTRT: case ASHIFT:
510 case NE: case EQ:
511 case GE: case GT: case GEU: case GTU:
512 case LE: case LT: case LEU: case LTU:
514 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
515 subst_p, update_p,
516 update_sp_offset, full_p);
517 rtx new1 = XEXP (x, 1)
518 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
519 subst_p, update_p,
520 update_sp_offset, full_p) : 0;
522 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
523 return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
525 return x;
527 case EXPR_LIST:
528 /* If we have something in XEXP (x, 0), the usual case,
529 eliminate it. */
530 if (XEXP (x, 0))
532 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
533 subst_p, update_p,
534 update_sp_offset, full_p);
535 if (new_rtx != XEXP (x, 0))
537 /* If this is a REG_DEAD note, it is not valid anymore.
538 Using the eliminated version could result in creating a
539 REG_DEAD note for the stack or frame pointer. */
540 if (REG_NOTE_KIND (x) == REG_DEAD)
541 return (XEXP (x, 1)
542 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
543 subst_p, update_p,
544 update_sp_offset, full_p)
545 : NULL_RTX);
547 x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
551 /* fall through */
553 case INSN_LIST:
554 case INT_LIST:
555 /* Now do eliminations in the rest of the chain. If this was
556 an EXPR_LIST, this might result in allocating more memory than is
557 strictly needed, but it simplifies the code. */
558 if (XEXP (x, 1))
560 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
561 subst_p, update_p,
562 update_sp_offset, full_p);
563 if (new_rtx != XEXP (x, 1))
564 return
565 gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x),
566 XEXP (x, 0), new_rtx);
568 return x;
570 case PRE_INC:
571 case POST_INC:
572 case PRE_DEC:
573 case POST_DEC:
574 /* We do not support elimination of a register that is modified.
575 elimination_effects has already make sure that this does not
576 happen. */
577 return x;
579 case PRE_MODIFY:
580 case POST_MODIFY:
581 /* We do not support elimination of a hard register that is
582 modified. LRA has already make sure that this does not
583 happen. The only remaining case we need to consider here is
584 that the increment value may be an eliminable register. */
585 if (GET_CODE (XEXP (x, 1)) == PLUS
586 && XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
588 rtx new_rtx = lra_eliminate_regs_1 (insn, XEXP (XEXP (x, 1), 1),
589 mem_mode, subst_p, update_p,
590 update_sp_offset, full_p);
592 if (new_rtx != XEXP (XEXP (x, 1), 1))
593 return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
594 gen_rtx_PLUS (GET_MODE (x),
595 XEXP (x, 0), new_rtx));
597 return x;
599 case STRICT_LOW_PART:
600 case NEG: case NOT:
601 case SIGN_EXTEND: case ZERO_EXTEND:
602 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
603 case FLOAT: case FIX:
604 case UNSIGNED_FIX: case UNSIGNED_FLOAT:
605 case ABS:
606 case SQRT:
607 case FFS:
608 case CLZ:
609 case CTZ:
610 case POPCOUNT:
611 case PARITY:
612 case BSWAP:
613 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
614 subst_p, update_p,
615 update_sp_offset, full_p);
616 if (new_rtx != XEXP (x, 0))
617 return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
618 return x;
620 case SUBREG:
621 new_rtx = lra_eliminate_regs_1 (insn, SUBREG_REG (x), mem_mode,
622 subst_p, update_p,
623 update_sp_offset, full_p);
625 if (new_rtx != SUBREG_REG (x))
627 if (MEM_P (new_rtx) && !paradoxical_subreg_p (x))
629 SUBREG_REG (x) = new_rtx;
630 alter_subreg (&x, false);
631 return x;
633 else if (! subst_p)
635 /* LRA can transform subregs itself. So don't call
636 simplify_gen_subreg until LRA transformations are
637 finished. Function simplify_gen_subreg can do
638 non-trivial transformations (like truncation) which
639 might make LRA work to fail. */
640 SUBREG_REG (x) = new_rtx;
641 return x;
643 else
644 return simplify_gen_subreg (GET_MODE (x), new_rtx,
645 GET_MODE (new_rtx), SUBREG_BYTE (x));
648 return x;
650 case MEM:
651 /* Our only special processing is to pass the mode of the MEM to our
652 recursive call and copy the flags. While we are here, handle this
653 case more efficiently. */
654 return
655 replace_equiv_address_nv
657 lra_eliminate_regs_1 (insn, XEXP (x, 0), GET_MODE (x),
658 subst_p, update_p, update_sp_offset, full_p));
660 case USE:
661 /* Handle insn_list USE that a call to a pure function may generate. */
662 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), VOIDmode,
663 subst_p, update_p, update_sp_offset, full_p);
664 if (new_rtx != XEXP (x, 0))
665 return gen_rtx_USE (GET_MODE (x), new_rtx);
666 return x;
668 case CLOBBER:
669 case ASM_OPERANDS:
670 gcc_assert (insn && DEBUG_INSN_P (insn));
671 break;
673 case SET:
674 gcc_unreachable ();
676 default:
677 break;
680 /* Process each of our operands recursively. If any have changed, make a
681 copy of the rtx. */
682 fmt = GET_RTX_FORMAT (code);
683 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
685 if (*fmt == 'e')
687 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, i), mem_mode,
688 subst_p, update_p,
689 update_sp_offset, full_p);
690 if (new_rtx != XEXP (x, i) && ! copied)
692 x = shallow_copy_rtx (x);
693 copied = 1;
695 XEXP (x, i) = new_rtx;
697 else if (*fmt == 'E')
699 int copied_vec = 0;
700 for (j = 0; j < XVECLEN (x, i); j++)
702 new_rtx = lra_eliminate_regs_1 (insn, XVECEXP (x, i, j), mem_mode,
703 subst_p, update_p,
704 update_sp_offset, full_p);
705 if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
707 rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
708 XVEC (x, i)->elem);
709 if (! copied)
711 x = shallow_copy_rtx (x);
712 copied = 1;
714 XVEC (x, i) = new_v;
715 copied_vec = 1;
717 XVECEXP (x, i, j) = new_rtx;
722 return x;
725 /* This function is used externally in subsequent passes of GCC. It
726 always does a full elimination of X. */
728 lra_eliminate_regs (rtx x, machine_mode mem_mode,
729 rtx insn ATTRIBUTE_UNUSED)
731 return lra_eliminate_regs_1 (NULL, x, mem_mode, true, false, 0, true);
734 /* Stack pointer offset before the current insn relative to one at the
735 func start. RTL insns can change SP explicitly. We keep the
736 changes from one insn to another through this variable. */
737 static poly_int64 curr_sp_change;
739 /* Scan rtx X for references to elimination source or target registers
740 in contexts that would prevent the elimination from happening.
741 Update the table of eliminables to reflect the changed state.
742 MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not
743 within a MEM. */
744 static void
745 mark_not_eliminable (rtx x, machine_mode mem_mode)
747 enum rtx_code code = GET_CODE (x);
748 class lra_elim_table *ep;
749 int i, j;
750 const char *fmt;
751 poly_int64 offset = 0;
753 switch (code)
755 case PRE_INC:
756 case POST_INC:
757 case PRE_DEC:
758 case POST_DEC:
759 case POST_MODIFY:
760 case PRE_MODIFY:
761 if (XEXP (x, 0) == stack_pointer_rtx
762 && ((code != PRE_MODIFY && code != POST_MODIFY)
763 || (GET_CODE (XEXP (x, 1)) == PLUS
764 && XEXP (x, 0) == XEXP (XEXP (x, 1), 0)
765 && poly_int_rtx_p (XEXP (XEXP (x, 1), 1), &offset))))
767 poly_int64 size = GET_MODE_SIZE (mem_mode);
769 #ifdef PUSH_ROUNDING
770 /* If more bytes than MEM_MODE are pushed, account for
771 them. */
772 size = PUSH_ROUNDING (size);
773 #endif
774 if (code == PRE_DEC || code == POST_DEC)
775 curr_sp_change -= size;
776 else if (code == PRE_INC || code == POST_INC)
777 curr_sp_change += size;
778 else if (code == PRE_MODIFY || code == POST_MODIFY)
779 curr_sp_change += offset;
781 else if (REG_P (XEXP (x, 0))
782 && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER)
784 /* If we modify the source of an elimination rule, disable
785 it. Do the same if it is the destination and not the
786 hard frame register. */
787 for (ep = reg_eliminate;
788 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
789 ep++)
790 if (ep->from_rtx == XEXP (x, 0)
791 || (ep->to_rtx == XEXP (x, 0)
792 && ep->to_rtx != hard_frame_pointer_rtx))
793 setup_can_eliminate (ep, false);
795 return;
797 case USE:
798 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
799 /* If using a hard register that is the source of an eliminate
800 we still think can be performed, note it cannot be
801 performed since we don't know how this hard register is
802 used. */
803 for (ep = reg_eliminate;
804 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
805 ep++)
806 if (ep->from_rtx == XEXP (x, 0)
807 && ep->to_rtx != hard_frame_pointer_rtx)
808 setup_can_eliminate (ep, false);
809 return;
811 case CLOBBER:
812 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
813 /* If clobbering a hard register that is the replacement
814 register for an elimination we still think can be
815 performed, note that it cannot be performed. Otherwise, we
816 need not be concerned about it. */
817 for (ep = reg_eliminate;
818 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
819 ep++)
820 if (ep->to_rtx == XEXP (x, 0)
821 && ep->to_rtx != hard_frame_pointer_rtx)
822 setup_can_eliminate (ep, false);
823 return;
825 case SET:
826 if (SET_DEST (x) == stack_pointer_rtx
827 && GET_CODE (SET_SRC (x)) == PLUS
828 && XEXP (SET_SRC (x), 0) == SET_DEST (x)
829 && poly_int_rtx_p (XEXP (SET_SRC (x), 1), &offset))
831 curr_sp_change += offset;
832 return;
834 if (! REG_P (SET_DEST (x))
835 || REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER)
836 mark_not_eliminable (SET_DEST (x), mem_mode);
837 else
839 /* See if this is setting the replacement hard register for
840 an elimination.
842 If DEST is the hard frame pointer, we do nothing because
843 we assume that all assignments to the frame pointer are
844 for non-local gotos and are being done at a time when
845 they are valid and do not disturb anything else. Some
846 machines want to eliminate a fake argument pointer (or
847 even a fake frame pointer) with either the real frame
848 pointer or the stack pointer. Assignments to the hard
849 frame pointer must not prevent this elimination. */
850 for (ep = reg_eliminate;
851 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
852 ep++)
853 if (ep->to_rtx == SET_DEST (x)
854 && SET_DEST (x) != hard_frame_pointer_rtx)
855 setup_can_eliminate (ep, false);
858 mark_not_eliminable (SET_SRC (x), mem_mode);
859 return;
861 case MEM:
862 /* Our only special processing is to pass the mode of the MEM to
863 our recursive call. */
864 mark_not_eliminable (XEXP (x, 0), GET_MODE (x));
865 return;
867 default:
868 break;
871 fmt = GET_RTX_FORMAT (code);
872 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
874 if (*fmt == 'e')
875 mark_not_eliminable (XEXP (x, i), mem_mode);
876 else if (*fmt == 'E')
877 for (j = 0; j < XVECLEN (x, i); j++)
878 mark_not_eliminable (XVECEXP (x, i, j), mem_mode);
884 /* Scan INSN and eliminate all eliminable hard registers in it.
886 If REPLACE_P is true, do the replacement destructively. Also
887 delete the insn as dead it if it is setting an eliminable register.
889 If REPLACE_P is false, just update the offsets while keeping the
890 base register the same. If FIRST_P, use the sp offset for
891 elimination to sp. Otherwise, use UPDATE_SP_OFFSET for this. If
892 UPDATE_SP_OFFSET is non-zero, don't use difference of the offset
893 and the previous offset. Attach the note about used elimination
894 for insns setting frame pointer to update elimination easy (without
895 parsing already generated elimination insns to find offset
896 previously used) in future. */
898 void
899 eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p,
900 poly_int64 update_sp_offset)
902 int icode = recog_memoized (insn);
903 rtx set, old_set = single_set (insn);
904 bool validate_p;
905 int i;
906 rtx substed_operand[MAX_RECOG_OPERANDS];
907 rtx orig_operand[MAX_RECOG_OPERANDS];
908 class lra_elim_table *ep;
909 rtx plus_src, plus_cst_src;
910 lra_insn_recog_data_t id;
911 struct lra_static_insn_data *static_id;
913 if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn))
915 lra_assert (GET_CODE (PATTERN (insn)) == USE
916 || GET_CODE (PATTERN (insn)) == CLOBBER
917 || GET_CODE (PATTERN (insn)) == ASM_INPUT);
918 return;
921 /* We allow one special case which happens to work on all machines we
922 currently support: a single set with the source or a REG_EQUAL
923 note being a PLUS of an eliminable register and a constant. */
924 plus_src = plus_cst_src = 0;
925 poly_int64 offset = 0;
926 if (old_set && REG_P (SET_DEST (old_set)))
928 if (GET_CODE (SET_SRC (old_set)) == PLUS)
929 plus_src = SET_SRC (old_set);
930 /* First see if the source is of the form (plus (...) CST). */
931 if (plus_src && poly_int_rtx_p (XEXP (plus_src, 1), &offset))
932 plus_cst_src = plus_src;
933 /* If we are doing initial offset computation, then utilize
934 eqivalences to discover a constant for the second term
935 of PLUS_SRC. */
936 else if (plus_src && REG_P (XEXP (plus_src, 1)))
938 int regno = REGNO (XEXP (plus_src, 1));
939 if (regno < ira_reg_equiv_len
940 && ira_reg_equiv[regno].constant != NULL_RTX
941 && !replace_p
942 && poly_int_rtx_p (ira_reg_equiv[regno].constant, &offset))
943 plus_cst_src = plus_src;
945 /* Check that the first operand of the PLUS is a hard reg or
946 the lowpart subreg of one. */
947 if (plus_cst_src)
949 rtx reg = XEXP (plus_cst_src, 0);
951 if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg))
952 reg = SUBREG_REG (reg);
954 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
955 plus_cst_src = 0;
958 if (plus_cst_src)
960 rtx reg = XEXP (plus_cst_src, 0);
962 if (GET_CODE (reg) == SUBREG)
963 reg = SUBREG_REG (reg);
965 if (REG_P (reg) && (ep = get_elimination (reg)) != NULL)
967 rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx;
969 if (! replace_p)
971 if (known_eq (update_sp_offset, 0))
972 offset += (!first_p
973 ? ep->offset - ep->previous_offset : ep->offset);
974 if (ep->to_rtx == stack_pointer_rtx)
976 if (first_p)
977 offset -= lra_get_insn_recog_data (insn)->sp_offset;
978 else
979 offset += update_sp_offset;
981 offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src));
984 if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
985 to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx);
986 /* If we have a nonzero offset, and the source is already a
987 simple REG, the following transformation would increase
988 the cost of the insn by replacing a simple REG with (plus
989 (reg sp) CST). So try only when we already had a PLUS
990 before. */
991 if (known_eq (offset, 0) || plus_src)
993 rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset);
995 old_set = single_set (insn);
997 /* First see if this insn remains valid when we make the
998 change. If not, try to replace the whole pattern
999 with a simple set (this may help if the original insn
1000 was a PARALLEL that was only recognized as single_set
1001 due to REG_UNUSED notes). If this isn't valid
1002 either, keep the INSN_CODE the same and let the
1003 constraint pass fix it up. */
1004 if (! validate_change (insn, &SET_SRC (old_set), new_src, 0))
1006 rtx new_pat = gen_rtx_SET (SET_DEST (old_set), new_src);
1008 if (! validate_change (insn, &PATTERN (insn), new_pat, 0))
1009 SET_SRC (old_set) = new_src;
1011 lra_update_insn_recog_data (insn);
1012 /* This can't have an effect on elimination offsets, so skip
1013 right to the end. */
1014 return;
1019 /* Eliminate all eliminable registers occurring in operands that
1020 can be handled by the constraint pass. */
1021 id = lra_get_insn_recog_data (insn);
1022 static_id = id->insn_static_data;
1023 validate_p = false;
1024 for (i = 0; i < static_id->n_operands; i++)
1026 orig_operand[i] = *id->operand_loc[i];
1027 substed_operand[i] = *id->operand_loc[i];
1029 /* For an asm statement, every operand is eliminable. */
1030 if (icode < 0 || insn_data[icode].operand[i].eliminable)
1032 /* Check for setting a hard register that we know about. */
1033 if (static_id->operand[i].type != OP_IN
1034 && REG_P (orig_operand[i]))
1036 /* If we are assigning to a hard register that can be
1037 eliminated, it must be as part of a PARALLEL, since
1038 the code above handles single SETs. This reg cannot
1039 be longer eliminated -- it is forced by
1040 mark_not_eliminable. */
1041 for (ep = reg_eliminate;
1042 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
1043 ep++)
1044 lra_assert (ep->from_rtx != orig_operand[i]
1045 || ! ep->can_eliminate);
1048 /* Companion to the above plus substitution, we can allow
1049 invariants as the source of a plain move. */
1050 substed_operand[i]
1051 = lra_eliminate_regs_1 (insn, *id->operand_loc[i], VOIDmode,
1052 replace_p, ! replace_p && ! first_p,
1053 update_sp_offset, first_p);
1054 if (substed_operand[i] != orig_operand[i])
1055 validate_p = true;
1059 if (! validate_p)
1060 return;
1062 /* Substitute the operands; the new values are in the substed_operand
1063 array. */
1064 for (i = 0; i < static_id->n_operands; i++)
1065 *id->operand_loc[i] = substed_operand[i];
1066 for (i = 0; i < static_id->n_dups; i++)
1067 *id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]];
1069 /* Transform plus (plus (hard reg, const), pseudo) to plus (plus (pseudo,
1070 const), hard reg) in order to keep insn containing eliminated register
1071 after all reloads calculating its offset. This permits to keep register
1072 pressure under control and helps to avoid LRA cycling in patalogical
1073 cases. */
1074 if (! replace_p && (set = single_set (insn)) != NULL
1075 && GET_CODE (SET_SRC (set)) == PLUS
1076 && GET_CODE (XEXP (SET_SRC (set), 0)) == PLUS)
1078 rtx reg1, reg2, op1, op2;
1080 reg1 = op1 = XEXP (XEXP (SET_SRC (set), 0), 0);
1081 reg2 = op2 = XEXP (SET_SRC (set), 1);
1082 if (GET_CODE (reg1) == SUBREG)
1083 reg1 = SUBREG_REG (reg1);
1084 if (GET_CODE (reg2) == SUBREG)
1085 reg2 = SUBREG_REG (reg2);
1086 if (REG_P (reg1) && REG_P (reg2)
1087 && REGNO (reg1) < FIRST_PSEUDO_REGISTER
1088 && REGNO (reg2) >= FIRST_PSEUDO_REGISTER
1089 && GET_MODE (reg1) == Pmode
1090 && !have_addptr3_insn (lra_pmode_pseudo, reg1,
1091 XEXP (XEXP (SET_SRC (set), 0), 1)))
1093 XEXP (XEXP (SET_SRC (set), 0), 0) = op2;
1094 XEXP (SET_SRC (set), 1) = op1;
1098 /* If we had a move insn but now we don't, re-recognize it.
1099 This will cause spurious re-recognition if the old move had a
1100 PARALLEL since the new one still will, but we can't call
1101 single_set without having put new body into the insn and the
1102 re-recognition won't hurt in this rare case. */
1103 lra_update_insn_recog_data (insn);
1106 /* Spill pseudos which are assigned to hard registers in SET, record them in
1107 SPILLED_PSEUDOS unless it is null, and return the recorded pseudos number.
1108 Add affected insns for processing in the subsequent constraint pass. */
1109 static int
1110 spill_pseudos (HARD_REG_SET set, int *spilled_pseudos)
1112 int i, n;
1113 bitmap_head to_process;
1114 rtx_insn *insn;
1116 if (hard_reg_set_empty_p (set))
1117 return 0;
1118 if (lra_dump_file != NULL)
1120 fprintf (lra_dump_file, " Spilling non-eliminable hard regs:");
1121 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1122 if (TEST_HARD_REG_BIT (set, i))
1123 fprintf (lra_dump_file, " %d", i);
1124 fprintf (lra_dump_file, "\n");
1126 bitmap_initialize (&to_process, &reg_obstack);
1127 n = 0;
1128 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
1129 if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
1130 && overlaps_hard_reg_set_p (set,
1131 PSEUDO_REGNO_MODE (i), reg_renumber[i]))
1133 if (lra_dump_file != NULL)
1134 fprintf (lra_dump_file, " Spilling r%d(%d)\n",
1135 i, reg_renumber[i]);
1136 reg_renumber[i] = -1;
1137 if (spilled_pseudos != NULL)
1138 spilled_pseudos[n++] = i;
1139 bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap);
1141 lra_no_alloc_regs |= set;
1142 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
1143 if (bitmap_bit_p (&to_process, INSN_UID (insn)))
1145 lra_push_insn (insn);
1146 lra_set_used_insn_alternative (insn, LRA_UNKNOWN_ALT);
1148 bitmap_clear (&to_process);
1149 return n;
1152 /* Update all offsets and possibility for elimination on eliminable
1153 registers. Spill pseudos assigned to registers which are
1154 uneliminable, update LRA_NO_ALLOC_REGS and ELIMINABLE_REG_SET. Add
1155 insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard
1156 registers whose offsets should be changed. Return true if any
1157 elimination offset changed. */
1158 static bool
1159 update_reg_eliminate (bitmap insns_with_changed_offsets)
1161 bool prev, result;
1162 class lra_elim_table *ep, *ep1;
1163 HARD_REG_SET temp_hard_reg_set;
1165 targetm.compute_frame_layout ();
1167 /* Clear self elimination offsets. */
1168 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1169 self_elim_offsets[ep->from] = 0;
1170 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1172 /* If it is a currently used elimination: update the previous
1173 offset. */
1174 if (elimination_map[ep->from] == ep)
1175 ep->previous_offset = ep->offset;
1177 prev = ep->prev_can_eliminate;
1178 setup_can_eliminate (ep, targetm.can_eliminate (ep->from, ep->to));
1179 if (ep->can_eliminate && ! prev)
1181 /* It is possible that not eliminable register becomes
1182 eliminable because we took other reasons into account to
1183 set up eliminable regs in the initial set up. Just
1184 ignore new eliminable registers. */
1185 setup_can_eliminate (ep, false);
1186 continue;
1188 if (ep->can_eliminate != prev && elimination_map[ep->from] == ep)
1190 /* We cannot use this elimination anymore -- find another
1191 one. */
1192 if (lra_dump_file != NULL)
1193 fprintf (lra_dump_file,
1194 " Elimination %d to %d is not possible anymore\n",
1195 ep->from, ep->to);
1196 /* If after processing RTL we decides that SP can be used as a result
1197 of elimination, it cannot be changed. For frame pointer to stack
1198 pointer elimination the condition is a bit relaxed and we just require
1199 that actual elimination has not been done yet. */
1200 gcc_assert (ep->to_rtx != stack_pointer_rtx
1201 || (ep->from == FRAME_POINTER_REGNUM
1202 && !elimination_fp2sp_occured_p)
1203 || (ep->from < FIRST_PSEUDO_REGISTER
1204 && fixed_regs [ep->from]));
1206 /* Mark that is not eliminable anymore. */
1207 elimination_map[ep->from] = NULL;
1208 for (ep1 = ep + 1; ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep1++)
1209 if (ep1->can_eliminate && ep1->from == ep->from)
1210 break;
1211 if (ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS])
1213 if (lra_dump_file != NULL)
1214 fprintf (lra_dump_file, " Using elimination %d to %d now\n",
1215 ep1->from, ep1->to);
1216 lra_assert (known_eq (ep1->previous_offset, -1));
1217 ep1->previous_offset = ep->offset;
1219 else
1221 /* There is no elimination anymore just use the hard
1222 register `from' itself. Setup self elimination
1223 offset to restore the original offset values. */
1224 if (lra_dump_file != NULL)
1225 fprintf (lra_dump_file, " %d is not eliminable at all\n",
1226 ep->from);
1227 self_elim_offsets[ep->from] = -ep->offset;
1228 if (maybe_ne (ep->offset, 0))
1229 bitmap_ior_into (insns_with_changed_offsets,
1230 &lra_reg_info[ep->from].insn_bitmap);
1234 INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset);
1236 setup_elimination_map ();
1237 result = false;
1238 CLEAR_HARD_REG_SET (temp_hard_reg_set);
1239 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1240 if (elimination_map[ep->from] == NULL)
1241 add_to_hard_reg_set (&temp_hard_reg_set, Pmode, ep->from);
1242 else if (elimination_map[ep->from] == ep)
1244 /* Prevent the hard register into which we eliminate from
1245 the usage for pseudos. */
1246 if (ep->from != ep->to)
1247 add_to_hard_reg_set (&temp_hard_reg_set, Pmode, ep->to);
1248 if (maybe_ne (ep->previous_offset, ep->offset))
1250 bitmap_ior_into (insns_with_changed_offsets,
1251 &lra_reg_info[ep->from].insn_bitmap);
1253 /* Update offset when the eliminate offset have been
1254 changed. */
1255 lra_update_reg_val_offset (lra_reg_info[ep->from].val,
1256 ep->offset - ep->previous_offset);
1257 result = true;
1260 lra_no_alloc_regs |= temp_hard_reg_set;
1261 eliminable_regset &= ~temp_hard_reg_set;
1262 spill_pseudos (temp_hard_reg_set, NULL);
1263 return result;
1266 /* Initialize the table of hard registers to eliminate.
1267 Pre-condition: global flag frame_pointer_needed has been set before
1268 calling this function. */
1269 static void
1270 init_elim_table (void)
1272 class lra_elim_table *ep;
1273 bool value_p;
1274 const struct elim_table_1 *ep1;
1276 if (!reg_eliminate)
1277 reg_eliminate = XCNEWVEC (class lra_elim_table, NUM_ELIMINABLE_REGS);
1279 memset (self_elim_offsets, 0, sizeof (self_elim_offsets));
1280 /* Initiate member values which will be never changed. */
1281 self_elim_table.can_eliminate = self_elim_table.prev_can_eliminate = true;
1282 self_elim_table.previous_offset = 0;
1284 for (ep = reg_eliminate, ep1 = reg_eliminate_1;
1285 ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++)
1287 ep->offset = ep->previous_offset = -1;
1288 ep->from = ep1->from;
1289 ep->to = ep1->to;
1290 value_p = (targetm.can_eliminate (ep->from, ep->to)
1291 && ! (ep->to == STACK_POINTER_REGNUM
1292 && frame_pointer_needed
1293 && (! SUPPORTS_STACK_ALIGNMENT
1294 || ! stack_realign_fp)));
1295 setup_can_eliminate (ep, value_p);
1298 /* Build the FROM and TO REG rtx's. Note that code in gen_rtx_REG
1299 will cause, e.g., gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to
1300 equal stack_pointer_rtx. We depend on this. Threfore we switch
1301 off that we are in LRA temporarily. */
1302 lra_in_progress = false;
1303 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1305 ep->from_rtx = gen_rtx_REG (Pmode, ep->from);
1306 ep->to_rtx = gen_rtx_REG (Pmode, ep->to);
1307 eliminable_reg_rtx[ep->from] = ep->from_rtx;
1309 lra_in_progress = true;
1312 /* Function for initialization of elimination once per function. It
1313 sets up sp offset for each insn. */
1314 static void
1315 init_elimination (void)
1317 bool stop_to_sp_elimination_p;
1318 basic_block bb;
1319 rtx_insn *insn;
1320 class lra_elim_table *ep;
1322 init_elim_table ();
1323 FOR_EACH_BB_FN (bb, cfun)
1325 curr_sp_change = 0;
1326 stop_to_sp_elimination_p = false;
1327 FOR_BB_INSNS (bb, insn)
1328 if (INSN_P (insn))
1330 lra_get_insn_recog_data (insn)->sp_offset = curr_sp_change;
1331 if (NONDEBUG_INSN_P (insn))
1333 mark_not_eliminable (PATTERN (insn), VOIDmode);
1334 if (maybe_ne (curr_sp_change, 0)
1335 && find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX))
1336 stop_to_sp_elimination_p = true;
1339 if (! frame_pointer_needed
1340 && (maybe_ne (curr_sp_change, 0) || stop_to_sp_elimination_p)
1341 && bb->succs && bb->succs->length () != 0)
1342 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1343 if (ep->to == STACK_POINTER_REGNUM)
1344 setup_can_eliminate (ep, false);
1346 setup_elimination_map ();
1349 /* Update and return stack pointer OFFSET after processing X. */
1350 poly_int64
1351 lra_update_sp_offset (rtx x, poly_int64 offset)
1353 curr_sp_change = offset;
1354 mark_not_eliminable (x, VOIDmode);
1355 return curr_sp_change;
1359 /* Eliminate hard reg given by its location LOC. */
1360 void
1361 lra_eliminate_reg_if_possible (rtx *loc)
1363 int regno;
1364 class lra_elim_table *ep;
1366 lra_assert (REG_P (*loc));
1367 if ((regno = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
1368 || ! TEST_HARD_REG_BIT (lra_no_alloc_regs, regno))
1369 return;
1370 if ((ep = get_elimination (*loc)) != NULL)
1371 *loc = ep->to_rtx;
1374 /* Do (final if FINAL_P or first if FIRST_P) elimination in INSN. Add
1375 the insn for subsequent processing in the constraint pass, update
1376 the insn info. */
1377 static void
1378 process_insn_for_elimination (rtx_insn *insn, bool final_p, bool first_p)
1380 eliminate_regs_in_insn (insn, final_p, first_p, 0);
1381 if (! final_p)
1383 /* Check that insn changed its code. This is a case when a move
1384 insn becomes an add insn and we do not want to process the
1385 insn as a move anymore. */
1386 int icode = recog (PATTERN (insn), insn, 0);
1388 if (icode >= 0 && icode != INSN_CODE (insn))
1390 if (INSN_CODE (insn) >= 0)
1391 /* Insn code is changed. It may change its operand type
1392 from IN to INOUT. Inform the subsequent assignment
1393 subpass about this situation. */
1394 check_and_force_assignment_correctness_p = true;
1395 INSN_CODE (insn) = icode;
1396 lra_update_insn_recog_data (insn);
1398 lra_update_insn_regno_info (insn);
1399 lra_push_insn (insn);
1400 lra_set_used_insn_alternative (insn, LRA_UNKNOWN_ALT);
1404 /* Update frame pointer to stack pointer elimination if we started with
1405 permitted frame pointer elimination and now target reports that we can not
1406 do this elimination anymore. Record spilled pseudos in SPILLED_PSEUDOS
1407 unless it is null, and return the recorded pseudos number. */
1409 lra_update_fp2sp_elimination (int *spilled_pseudos)
1411 int n;
1412 HARD_REG_SET set;
1413 class lra_elim_table *ep;
1415 if (frame_pointer_needed || !targetm.frame_pointer_required ())
1416 return 0;
1417 gcc_assert (!elimination_fp2sp_occured_p);
1418 if (lra_dump_file != NULL)
1419 fprintf (lra_dump_file,
1420 " Frame pointer can not be eliminated anymore\n");
1421 frame_pointer_needed = true;
1422 CLEAR_HARD_REG_SET (set);
1423 add_to_hard_reg_set (&set, Pmode, HARD_FRAME_POINTER_REGNUM);
1424 n = spill_pseudos (set, spilled_pseudos);
1425 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1426 if (ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM)
1427 setup_can_eliminate (ep, false);
1428 return n;
1431 /* Return true if we have a pseudo assigned to hard frame pointer. */
1432 bool
1433 lra_fp_pseudo_p (void)
1435 HARD_REG_SET set;
1437 if (frame_pointer_needed)
1438 /* At this stage it means we have no pseudos assigned to FP: */
1439 return false;
1440 CLEAR_HARD_REG_SET (set);
1441 add_to_hard_reg_set (&set, Pmode, HARD_FRAME_POINTER_REGNUM);
1442 for (int i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
1443 if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
1444 && overlaps_hard_reg_set_p (set, PSEUDO_REGNO_MODE (i),
1445 reg_renumber[i]))
1446 return true;
1447 return false;
1450 /* Entry function to do final elimination if FINAL_P or to update
1451 elimination register offsets (FIRST_P if we are doing it the first
1452 time). */
1453 void
1454 lra_eliminate (bool final_p, bool first_p)
1456 unsigned int uid;
1457 bitmap_head insns_with_changed_offsets;
1458 bitmap_iterator bi;
1459 class lra_elim_table *ep;
1461 gcc_assert (! final_p || ! first_p);
1463 timevar_push (TV_LRA_ELIMINATE);
1465 if (first_p)
1467 elimination_fp2sp_occured_p = false;
1468 init_elimination ();
1471 bitmap_initialize (&insns_with_changed_offsets, &reg_obstack);
1472 if (final_p)
1474 if (flag_checking)
1476 update_reg_eliminate (&insns_with_changed_offsets);
1477 gcc_assert (bitmap_empty_p (&insns_with_changed_offsets));
1479 /* We change eliminable hard registers in insns so we should do
1480 this for all insns containing any eliminable hard
1481 register. */
1482 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1483 if (elimination_map[ep->from] != NULL)
1484 bitmap_ior_into (&insns_with_changed_offsets,
1485 &lra_reg_info[ep->from].insn_bitmap);
1487 else if (! update_reg_eliminate (&insns_with_changed_offsets))
1488 goto lra_eliminate_done;
1489 if (lra_dump_file != NULL)
1491 fprintf (lra_dump_file, "New elimination table:\n");
1492 print_elim_table (lra_dump_file);
1494 EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi)
1495 /* A dead insn can be deleted in process_insn_for_elimination. */
1496 if (lra_insn_recog_data[uid] != NULL)
1497 process_insn_for_elimination (lra_insn_recog_data[uid]->insn,
1498 final_p, first_p);
1499 bitmap_clear (&insns_with_changed_offsets);
1501 lra_eliminate_done:
1502 timevar_pop (TV_LRA_ELIMINATE);