docs/wiki/geda-format_translation.html

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  13 <p>
  14 <em>Translations of this page are also available in the following languages:</em> <a href="geda-format_translation.ru.html" class="wikilink1" title="geda-format_translation.ru.html">Русский</a>.
  15 </p>
  16
  17 <h1 id="fileformattranslation">File format translation</h1>
  18 <div class="level1">
  19
  20 <p>
  21 We need a universal translator system that can translate in all directions between gEDA tools, possible future gEDA tools, and outside tools that are likely to be used with gEDA tools.
  22 </p>
  23
  24 </div>
  25
  26 <h2 id="scope">Scope</h2>
  27 <div class="level2">
  28
  29 <p>
  30 Of course, everything to everything is not reasonable.  So, set a limit of gEDA tools, possible future gEDA tools, and outside tools that are likely to be used with gEDA tools.  Of course, tool formats where translation doesn&#039;t make sense don&#039;t need to be supported.
  31 </p>
  32
  33 <p>
  34 The idea is to have an intermediate format.  First translate to the intermediate format, then translate out.  The intermediate format should be sufficiently expressive that there can be a lossless round trip from any gEDA tool format to the intermediate format and back.
  35 </p>
  36
  37 <p>
  38 Lossless means that the resultant file is equivalent in how it works.  It is not necessary to preserve formatting and other things that don&#039;t matter.
  39 </p>
  40
  41 <p>
  42 All of the formats needing translation presently consist of lists of objects, with some kind of encapsulation.  Each object has connections and attributes.
  43 </p>
  44
  45 <p>
  46 This suggests the possible of a standard netlist format as the intermediate format.
  47 </p>
  48
  49 <p>
  50 Further discussion related only to formats that fit this model.
  51 </p>
  52
  53 <p>
  54 If possible, the format chosen should have a history of use for at least part of this, and have a published specification that is externally controlled and freely available.
  55 </p>
  56
  57 <p>
  58 There needs to be a way to merge changes from any target/source without messing up other parts.
  59 </p>
  60
  61 </div>
  62
  63 <h3 id="tooltypesneedingsupport">Tool types needing support</h3>
  64 <div class="level3">
  65 <ul>
  66 <li class="level1"><div class="li"> schematic</div>
  67 </li>
  68 <li class="level1"><div class="li"> layout</div>
  69 </li>
  70 <li class="level1"><div class="li"> simulation</div>
  71 </li>
  72 </ul>
  73
  74 </div>
  75
  76 <h3 id="gedatools">gEDA tools</h3>
  77 <div class="level3">
  78
  79 <p>
  80 Lossless round trip is required, so archival storage can use the intermediate format.
  81 </p>
  82 <ul>
  83 <li class="level1"><div class="li"> gschem</div>
  84 </li>
  85 <li class="level1"><div class="li"> pcb</div>
  86 </li>
  87 <li class="level1"><div class="li"> gnucap</div>
  88 </li>
  89 <li class="level1"><div class="li"> Icarus Verilog</div>
  90 </li>
  91 </ul>
  92
  93 </div>
  94
  95 <h3 id="otherfreetoolsthatshouldbewellsupported">Other free tools that should be well supported</h3>
  96 <div class="level3">
  97
  98 <p>
  99 These tools are free, too.  The standard needs to support them on an equal basis with gEDA.
 100 </p>
 101 <ul>
 102 <li class="level1"><div class="li"> NGspice</div>
 103 </li>
 104 <li class="level1"><div class="li"> Qucs</div>
 105 </li>
 106 <li class="level1"><div class="li"> Kicad</div>
 107 </li>
 108 <li class="level1"><div class="li"> Magic</div>
 109 </li>
 110 <li class="level1"><div class="li"> Electric</div>
 111 </li>
 112 <li class="level1"><div class="li"> Xcircuit</div>
 113 </li>
 114 <li class="level1"><div class="li"> Fritzing</div>
 115 </li>
 116 </ul>
 117
 118 </div>
 119
 120 <h3 id="non-freeimportandexport">Non-free import and export</h3>
 121 <div class="level3">
 122
 123 <p>
 124 Support for these will allow gEDA tools to play nice with the commercial world.  Basic functionality is needed, but it doesn&#039;t need to be lossless.  Lossless should be possible, but it is not a high priority to actually implement it.
 125 </p>
 126 <ul>
 127 <li class="level1"><div class="li"> Eagle</div>
 128 </li>
 129 <li class="level1"><div class="li"> Orcad</div>
 130 </li>
 131 <li class="level1"><div class="li"> LTspice</div>
 132 </li>
 133 <li class="level1"><div class="li"> Pads</div>
 134 </li>
 135 </ul>
 136
 137 </div>
 138
 139 <h3 id="gedamissingfunctionality">gEDA missing functionality</h3>
 140 <div class="level3">
 141
 142 <p>
 143 Hopefully having a translator system will provide a seed so these can be done.
 144 </p>
 145 <ul>
 146 <li class="level1"><div class="li"> Back annotation from layout or simulation to schematic</div>
 147 </li>
 148 <li class="level1"><div class="li"> Static timing analysis</div>
 149 </li>
 150 <li class="level1"><div class="li"> Post-layout signal integrity simulation.</div>
 151 </li>
 152 <li class="level1"><div class="li"> Layout - schematic comparison</div>
 153 </li>
 154 <li class="level1"><div class="li"> Use of the same schematic for the whole project.</div>
 155 </li>
 156 </ul>
 157
 158 </div>
 159
 160 <h3 id="explicitlynotsupported">Explicitly not supported</h3>
 161 <div class="level3">
 162 <ul>
 163 <li class="level1"><div class="li"> Plotting</div>
 164 </li>
 165 <li class="level1"><div class="li"> Commands</div>
 166 </li>
 167 <li class="level1"><div class="li"> Behavioral modeling</div>
 168 </li>
 169 </ul>
 170
 171 </div>
 172
 173 <h2 id="concepts">Concepts</h2>
 174 <div class="level2">
 175
 176 <p>
 177 All of these consist of lists of objects, with connections and attributes.
 178 </p>
 179
 180 <p>
 181 It is tradition that a netlist is used for interchange, but the traditional approach only goes one way, because information is lost in the translation.
 182 </p>
 183
 184 <p>
 185 The format must convey the meaning, not necessarily in the same way as the tool&#039;s native format or internal storage.
 186 </p>
 187
 188 <p>
 189 It is not necessary to translate parts that are usually in libraries, and are tool specific, such as models, symbols, or footprints.
 190 </p>
 191
 192 <p>
 193 All contenders for possible formats must support a loss round-trip to any other.
 194 </p>
 195
 196 </div>
 197
 198 <h3 id="somepossibleformats">Some possible formats</h3>
 199 <div class="level3">
 200
 201 </div>
 202
 203 <h4 id="spice">Spice</h4>
 204 <div class="level4">
 205
 206 <p>
 207 A popular netlist format.  It has a history of use for interchange, but not yet for physical placement.  Problems: irregular syntax, not sufficiently expressive.  These problems have been a major hassle for years for developers.  It is well accepted, but not by people who know it well.
 208 </p>
 209
 210 </div>
 211
 212 <h4 id="verilog">Verilog</h4>
 213 <div class="level4">
 214
 215 <p>
 216 The structural subset is a good netlist format.  It is regular, sufficiently expressive, and has a published standard.  It has a history of use for interchange, but not yet for physical placement.
 217 </p>
 218
 219 </div>
 220
 221 <h4 id="vhdl">VHDL</h4>
 222 <div class="level4">
 223
 224 <p>
 225 The structural subset is a good netlist format.  It is regular, sufficiently expressive, and has a published standard.  It has a history of use for interchange, but not yet for physical placement.
 226 </p>
 227
 228 </div>
 229
 230 <h4 id="spectre">Spectre</h4>
 231 <div class="level4">
 232
 233 <p>
 234 The structural subset is a good netlist format.  It is regular, sufficiently expressive, but belongs to one company (Cadence), so rule it out.  It has a history of use for simulation only.
 235 </p>
 236
 237 </div>
 238
 239 <h4 id="xml">XML</h4>
 240 <div class="level4">
 241
 242 <p>
 243 XML is not really a format but a syntax.  A good format can easily be made based on XML, but has no history of use in a similar context.  The syntax is well documented but there is no outside documentation of application in any related use.
 244 </p>
 245
 246 </div>
 247
 248 <h3 id="representationofphysicalplacement">Representation of physical placement</h3>
 249 <div class="level3">
 250
 251 <p>
 252 This part is the only part where there is not a strong history of use for VHDL and Verilog.
 253 </p>
 254
 255 <p>
 256 Ideas:
 257 </p>
 258 <ul>
 259 <li class="level1"><div class="li"> Nets are also objects with connections and attributes.  Nets have meaning in all contexts.</div>
 260 </li>
 261 <li class="level1"><div class="li"> A place on a schematic can be considered to be an object, with connections and attributes.</div>
 262 </li>
 263 <li class="level1"><div class="li"> Pads, connectors, thermals, vias .. are also objects, with connections and attributes.</div>
 264 </li>
 265 <li class="level1"><div class="li"> Use `define (assuming Verilog format) to set aside sections that have meaning in one context but not another.</div>
 266 </li>
 267 <li class="level1"><div class="li"> This is a high level description.  Take a high level view across all.  It&#039;s not lines, boxes, and circles.</div>
 268 </li>
 269 <li class="level1"><div class="li"> If you must, lines, boxes, and circles can be objects too, but not translatable because they have no meaning in other contexts.</div>
 270 </li>
 271 <li class="level1"><div class="li"> Attributes that have no meaning are silently ignored.  Attributes that have meaning in one context but not in another context are ignored where they have no meaning.</div>
 272 </li>
 273 </ul>
 274
 275 </div>
 276
 277 <h2 id="applications">Applications</h2>
 278 <div class="level2">
 279
 280 <p>
 281 Choosing the Verilog format as one possibility.
 282 </p>
 283
 284 <p>
 285 The unit of encapsulation is the &quot;module&quot;:
 286 </p>
 287 <pre class="code">module my-module(connections);
 288 // contents
 289 endmodule</pre>
 290
 291 <p>
 292 Each object in the list has a consistent syntax:
 293 </p>
 294 <pre class="code">type #(attributes) name (connections);</pre>
 295
 296 <p>
 297 Example:
 298 </p>
 299 <pre class="code">resistor #(.r(1k)) r123 (a, b);
 300 resistor #(.r(1k)) r234 (.p(b), .n(c));</pre>
 301
 302 <p>
 303 &quot;r&quot; is the name of an attribute.  &quot;1k&quot; is the value (a string).
 304 </p>
 305
 306 <p>
 307 In the first example, connections are determined by order.  In the second, they are mapped by name.  Node &quot;b&quot; connects to pin &quot;p&quot; and node &quot;c&quot; connects to pin &quot;n&quot;.
 308 </p>
 309
 310 <p>
 311 A &quot;net&quot; is also an object.
 312 </p>
 313
 314 <p>
 315 In the above example, both connect to node b directly.  In a schematic representation the connection would not be direct, but through a &quot;net&quot;
 316 </p>
 317 <pre class="code">resistor #(.r(1k)) r123 (.p(a1), .n(b1));
 318 resistor #(.r(1k)) r125 (.p(b2), .n(c2));
 319 net b (.1(b1), .2(b2));</pre>
 320
 321 <p>
 322 The name of the net is &quot;b&quot;.  It has no attributes.
 323 </p>
 324
 325 <p>
 326 For schematic, you can now place the nodes:
 327 </p>
 328 <pre class="code">place #(.x(1222), .y(3438)) place11333 (b1);
 329 place #(.x(4334), .y(8433)) place34894 (b2);
 330 place #(.x(9393), .y(4232)) place49334 (a1);
 331 place #(.x(2932), .y(2384)) place34983 (c2);</pre>
 332
 333 <p>
 334 Portions that apply in only certain contexts can be selectively included with &#039;ifdef:
 335 </p>
 336 <pre class="code">module my_circuit;
 337   `ifdef SCHEMATIC
 338     place ...
 339     place ...
 340   `endif
 341    res ...
 342    res ...
 343    net ...
 344 endmodule</pre>
 345
 346 <p>
 347 Complex nets can be encapsulated:
 348 </p>
 349 <pre class="code">module net23842 (1,2,3);
 350   net n23482 (1,2);
 351   net n84333 (2,3);
 352   `ifdef SCHEMATIC
 353     place ...
 354     place ...
 355     place ...
 356   `endif
 357 endmodule</pre>
 358 <pre class="code">module net9393 (1,2);
 359   net #(.color(blue), .thickness(thin)) n38423 (1,2);
 360 endmodule</pre>
 361
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