docs/wiki/geda-icarus_xilinx_hints.html

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  13 <h1 id="xilinxhints">Xilinx Hints</h1>
  14 <div class="level1">
  15 <pre class="code">For those of you who wish to use Icarus Verilog, in combination with
  16 the Xilinx back end (Foundation or Alliance), it can be done.  I have
  17 run some admittedly simple (2300 equivalent gates) designs through this
  18 setup, targeting a Spartan XCS10.
  19
  20 Verilog:
  21
  22    Older versions of Icarus Verilog (like 19990814) couldn&#039;t synthesize
  23    logic buried in procedural (flip-flop) assignment.  Newer versions
  24    (like 20000120) don&#039;t have this limitation.
  25
  26    Procedural assignments have to be given one at a time, to be
  27    &quot;found&quot; by xnfsyn.  Say
  28        always @ (posedge Clk) Y = newY;
  29        always @ (posedge Clk) Z = newZ;
  30    rather than
  31        always @ (posedge Clk) begin
  32            Y = newY;
  33            Z = newZ;
  34        end
  35
  36    Steve&#039;s xnf.txt covers most buffer and pin constructs, but I had reason
  37    to use a global clock net not connected to an input pin.  The standard
  38    Verilog for a buffer, combined with a declaration to turn that into a
  39    BUFG, is:
  40        buf BUFG( your_output_here, your_input_here );
  41        $attribute(BUFG,&quot;XNF-LCA&quot;,&quot;BUFG:O,I&quot;)
  42
  43    I use post-processing on my .xnf files to add &quot;FAST&quot; attributes to
  44    output pins.
  45
  46 Running ivl:
  47
  48    The -F switches are important.  The following order seems to robustly
  49    generate valid XNF files, and is used by &quot;verilog -X&quot;:
  50       -Fsynth -Fnodangle -Fxnfio
  51
  52 Generating .pcf files:
  53
  54    The ngdbuild step seems to lose pin placement information that ivl
  55    puts in the XNF file.  Use xnf2pcf to extract this information to
  56    a .pcf file, which the Xilinx place-and-route software _will_ pay
  57    attention to.  Steve says he now makes that information available
  58    in an NCF file, with -fncf=&lt;path&gt;, but I haven&#039;t tested that.
  59
  60 Running the Xilinx back end:
  61
  62    You can presumably use the GUI, but that doesn&#039;t fit in Makefiles :-).
  63    Here is the command sequence in pseudo-shell-script:
  64       ngdbuild -p $part $1.xnf $1.ngd
  65       map -p $part -o map.ncd $1.ngd
  66       xnf2pcf &lt;$1.xnf &gt;$1.pcf    # see above
  67       par -w -ol 2 -d 0 map.ncd $1.ncd $1.pcf
  68       bitgen_flags = -g ConfigRate:SLOW -g TdoPin:PULLNONE -g DonePin:PULLUP \
  69                      -g CRC:enable -g StartUpClk:CCLK -g SyncToDone:no \
  70                      -g DoneActive:C1 -g OutputsActive:C3 -g GSRInactive:C4 \
  71                      -g ReadClk:CCLK -g ReadCapture:enable -g ReadAbort:disable
  72       bitgen $1.ncd -l -w $bitgen_flags
  73
  74    The Xilinx software has diarrhea of the temp files (14, not including
  75    .xnf, .pcf, .ngd, .ncd, and .bit), so this sequence is best done in a
  76    dedicated directory.  Note in particular that map.ncd is a generic name.
  77
  78    I had reason to run this remotely (and transparently within a Makefile)
  79    via ssh.  I use the gmake rule
  80 %.bit : %.xnf
  81         ssh -x -a -o &#039;BatchMode yes&#039; ${ALLIANCE_HOST} \
  82                remote_alliance ${REMOTE_DIR} $(basename $@) 2&gt;&amp;1 &lt; $&lt;
  83         scp ${ALLIANCE_HOST}:${REMOTE_DIR}/$@ .
  84     and the remote_alliance script (on ${ALLIANCE_HOST})
  85 /bin/csh
  86 cd $1
  87 cat &gt;! $2.xnf
  88 xnf2pcf &lt;$2.xnf &gt;! $2.pcf
  89 ./backend $2
  90
  91    There is now a &quot;Xilinx on Linux HOWTO&quot; at
  92          http://www.polybus.com/xilinx_on_linux.html
  93    I haven&#039;t tried this yet, it looks interesting.
  94
  95 Downloading:
  96
  97    I use the XESS (http://www.xess.com/) XSP-10 development board, which
  98    uses the PC parallel (printer) port for downloading and interaction
  99    with the host.  They made an old version of their download program
 100    public domain, posted it at
 101       http://www.xess.com/FPGA/xstools.zip ,
 102    and now there is a Linux port at
 103       ftp://ftp.microux.com/pub/pilotscope/xstools.tar.gz .
 104
 105 The above hints are based on my experience with Foundation 1.5 on NT
 106 (gack) and Alliance 2.1i on Solaris.  Your mileage may vary.  Good luck!
 107
 108      - Larry Doolittle   &lt;LRDoolittle@lbl.gov&gt;   August 19, 1999
 109                                         updated February 1, 2000</pre>
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