gnetlist-legacy/tests/common/JD-gsch2pcb.out

   1 # release: pcb 1.99x
   2 # To read pcb files, the pcb version (or the cvs source date) must be >= the file version
   3 FileVersion[20070407]
   4 PCB["" 600000 500000]
   5 Grid[10000.000000 0 0 0]
   6 Cursor[0 0 0.000000]
   7 PolyArea[200000000.000000]
   8 Thermal[0.500000]
   9 DRC[1000 1000 1000 1000 1500 1000]
  10 Flags("nameonpcb,uniquename,clearnew,snappin")
  11 Groups("1,c:2:3:4:5:6,s:7:8")
  12 Styles["Signal,1000,3600,2000,1000:Power,2500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,600,2402,1181,600"]
  13 PKG_unknown(unknown,A1,unknown)
  14 PKG_unknown(unknown,Cm,20p)
  15 PKG_unknown(unknown,Cp,20p)
  16 PKG_unknown(unknown,Rlp,1meg)
  17 PKG_unknown(unknown,Rlm,500k)
  18 PKG_none(none,Vdd,DC 3.3V)
  19 PKG_none(none,V1,pulse 3.3 0 1u 10p 10p 1.25u 2.5u)
  20 PKG_unknown(unknown,Rt,1k)
  21 PKG_unknown(unknown,Rb,5.6k)
  22 PKG_unknown(unknown,M1,unknown)
  23 PKG_unknown(unknown,X1,unknown)
  24 Layer(1 "top")
  25 (
  26 )
  27 Layer(2 "ground")
  28 (
  29 )
  30 Layer(3 "signal2")
  31 (
  32 )
  33 Layer(4 "signal3")
  34 (
  35 )
  36 Layer(5 "power")
  37 (
  38 )
  39 Layer(6 "bottom")
  40 (
  41 )
  42 Layer(7 "outline")
  43 (
  44 )
  45 Layer(8 "spare")
  46 (
  47 )
  48 Layer(9 "silk")
  49 (
  50 )
  51 Layer(10 "silk")
  52 (
  53 )