1 v["Rlp","2"]=v["Vdd1"];
4 v["Vdd","1"]=v["Vdd1"];
29 i["Rlp","2"]+i["M1","B"]+i["M1","S"]+i["Vdd","1"]+i["X1","6"]==0,
30 i["Rb","2"]+i["M1","D"]+i["M1","G"]+i["X1","3"]==0,
31 i["V1","1"]+i["X1","1"]==0,
32 i["Cp","1"]+i["Rt","1"]+i["Rlp","1"]+i["X1","5"]==0,
33 i["Cm","1"]+i["Rlm","1"]+i["Rt","2"]+i["X1","4"]==0};
35 model[value->a1]["A1"],
36 capacitor[value->20p]["Cm"],
37 capacitor[value->20p]["Cp"],
38 resistor[value->1meg]["Rlp"],
39 resistor[value->500k]["Rlm"],
40 voltage_source[value->DC 3.3V]["Vdd"],
41 vpulse[value->pulse 3.3 0 1u 10p 10p 1.25u 2.5u]["V1"],
42 resistor[value->1k]["Rt"],
43 resistor[value->5.6k]["Rb"],
44 pmos_transistor[value->m1]["M1"],
45 lvd[value->x1]["X1"]};