gnetlist-legacy/tests/common/powersupply-gsch2pcb.out

   1 # release: pcb 1.99x
   2 # To read pcb files, the pcb version (or the cvs source date) must be >= the file version
   3 FileVersion[20070407]
   4 PCB["" 600000 500000]
   5 Grid[10000.000000 0 0 0]
   6 Cursor[0 0 0.000000]
   7 PolyArea[200000000.000000]
   8 Thermal[0.500000]
   9 DRC[1000 1000 1000 1000 1500 1000]
  10 Flags("nameonpcb,uniquename,clearnew,snappin")
  11 Groups("1,c:2:3:4:5:6,s:7:8")
  12 Styles["Signal,1000,3600,2000,1000:Power,2500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,600,2402,1181,600"]
  13 PKG_unknown(unknown,U2,unknown)
  14 PKG_unknown(unknown,C4,1uf)
  15 PKG_unknown(unknown,C3,22uF)
  16 PKG_unknown(unknown,R1,5k)
  17 PKG_unknown(unknown,C2,0.1uF)
  18 PKG_unknown(unknown,R2,220)
  19 PKG_unknown(unknown,C1,2200uF)
  20 PKG_unknown(unknown,S1,unknown)
  21 PKG_unknown(unknown,CONN1,unknown)
  22 PKG_unknown(unknown,T1,unknown)
  23 PKG_unknown(unknown,F1,unknown)
  24 PKG_unknown(unknown,U1,unknown)
  25 Layer(1 "top")
  26 (
  27 )
  28 Layer(2 "ground")
  29 (
  30 )
  31 Layer(3 "signal2")
  32 (
  33 )
  34 Layer(4 "signal3")
  35 (
  36 )
  37 Layer(5 "power")
  38 (
  39 )
  40 Layer(6 "bottom")
  41 (
  42 )
  43 Layer(7 "outline")
  44 (
  45 )
  46 Layer(8 "spare")
  47 (
  48 )
  49 Layer(9 "silk")
  50 (
  51 )
  52 Layer(10 "silk")
  53 (
  54 )