2 P 0 1100 300 1100 1 0 0
4 T 200 1150 5 8 1 1 0 6 1
6 T 200 1050 5 8 0 1 0 8 1
8 T 350 1100 9 8 1 1 0 0 1
10 T 350 1100 5 8 0 1 0 2 1
15 T 200 850 5 8 1 1 0 6 1
17 T 200 750 5 8 0 1 0 8 1
19 T 350 800 9 8 1 1 0 0 1
21 T 350 800 5 8 0 1 0 2 1
26 T 200 550 5 8 1 1 0 6 1
28 T 200 450 5 8 0 1 0 8 1
30 T 350 500 9 8 1 1 0 0 1
32 T 350 500 5 8 0 1 0 2 1
37 T 200 250 5 8 1 1 0 6 1
39 T 200 150 5 8 0 1 0 8 1
41 T 350 200 9 8 1 1 0 0 1
43 T 350 200 5 8 0 1 0 2 1
46 P 1300 1100 1600 1100 1 0 1
48 T 1400 1150 5 8 1 1 0 0 1
50 T 1400 1050 5 8 0 1 0 2 1
52 T 1250 1100 9 8 1 1 0 6 1
54 T 1250 1100 5 8 0 1 0 8 1
57 P 1300 800 1600 800 1 0 1
59 T 1400 850 5 8 1 1 0 0 1
61 T 1400 750 5 8 0 1 0 2 1
63 T 1250 800 9 8 1 1 0 6 1
65 T 1250 800 5 8 0 1 0 8 1
68 P 1300 500 1600 500 1 0 1
70 T 1400 550 5 8 1 1 0 0 1
72 T 1400 450 5 8 0 1 0 2 1
74 T 1250 500 9 8 1 1 0 6 1
76 T 1250 500 5 8 0 1 0 8 1
79 P 1300 200 1600 200 1 0 1
81 T 1400 250 5 8 1 1 0 0 1
83 T 1400 150 5 8 0 1 0 2 1
85 T 1250 200 9 8 1 1 0 6 1
87 T 1250 200 5 8 0 1 0 8 1
90 B 300 0 1000 1400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
91 T 300 1850 5 10 0 0 0 0 1
93 T 300 2450 5 10 0 0 0 0 1
95 T 1300 1600 8 10 1 1 0 6 1
97 T 300 2650 5 10 0 0 0 0 1
99 T 300 2850 5 10 0 0 0 0 1
100 description= 2.2 CMOS ± 5 V/5V, SPST Switch
101 T 300 3050 5 10 0 0 0 0 1
103 T 300 3250 5 10 0 0 0 0 1
105 T 300 1450 9 10 1 0 0 0 1
107 T 300 2050 5 10 0 0 0 0 1
109 T 300 2250 5 10 0 0 0 0 1
110 documentation=http://www.analog.com/UploadedFiles/Data_Sheets/3597365479993ADG601_2_a.pdf