2 P 0 3000 300 3000 1 0 0
4 T 200 3050 5 8 1 1 0 6 1
6 T 200 2950 5 8 0 1 0 8 1
8 T 350 3000 5 8 0 1 0 2 1
10 T 350 3000 9 8 0 1 0 0 1
13 P 0 2600 300 2600 1 0 0
15 T 200 2650 5 8 1 1 0 6 1
17 T 200 2550 5 8 0 1 0 8 1
19 T 350 2600 5 8 0 1 0 2 1
21 T 350 2600 9 8 0 1 0 0 1
24 P 0 2200 300 2200 1 0 0
26 T 200 2250 5 8 1 1 0 6 1
28 T 200 2150 5 8 0 1 0 8 1
30 T 350 2200 5 8 0 1 0 2 1
32 T 350 2200 9 8 0 1 0 0 1
35 P 0 1800 300 1800 1 0 0
37 T 200 1850 5 8 1 1 0 6 1
39 T 200 1750 5 8 0 1 0 8 1
41 T 350 1800 5 8 0 1 0 2 1
43 T 350 1800 9 8 0 1 0 0 1
46 P 0 1400 300 1400 1 0 0
48 T 200 1450 5 8 1 1 0 6 1
50 T 200 1350 5 8 0 1 0 8 1
52 T 350 1400 5 8 0 1 0 2 1
54 T 350 1400 9 8 0 1 0 0 1
57 P 0 1000 300 1000 1 0 0
59 T 200 1050 5 8 1 1 0 6 1
61 T 200 950 5 8 0 1 0 8 1
63 T 350 1000 5 8 0 1 0 2 1
65 T 350 1000 9 8 0 1 0 0 1
70 T 200 650 5 8 1 1 0 6 1
72 T 200 550 5 8 0 1 0 8 1
74 T 350 600 5 8 0 1 0 2 1
76 T 350 600 9 8 0 1 0 0 1
81 T 200 250 5 8 1 1 0 6 1
83 T 200 150 5 8 0 1 0 8 1
85 T 350 200 5 8 0 1 0 2 1
87 T 350 200 9 8 0 1 0 0 1
90 L 300 3200 300 0 3 0 0 0 -1 -1
91 V 1000 1400 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
92 P 1050 1400 1300 1400 1 0 1
94 T 1100 1450 5 8 1 1 0 0 1
96 T 1100 1350 5 8 0 1 0 2 1
98 T 950 1400 5 8 0 1 0 8 1
100 T 950 1400 9 8 0 1 0 6 1
103 P 950 1800 1300 1800 1 0 1
105 T 1100 1850 5 8 1 1 0 0 1
107 T 1100 1750 5 8 0 1 0 2 1
109 T 950 1800 5 8 0 1 0 8 1
111 T 950 1800 9 8 0 1 0 6 1
114 T 600 2000 8 10 1 1 0 0 1
116 T 600 2200 5 10 0 0 0 0 1
118 T 600 2400 5 10 0 0 0 0 1
120 T 600 2600 5 10 0 0 0 0 1
122 T 600 3000 5 10 0 0 0 0 1
124 T 600 3200 5 10 0 0 0 0 1
125 description=8-input NAND/AND gate
126 T 600 2800 5 10 0 0 0 0 1
128 T 600 3400 5 10 0 0 0 0 1
129 documentation=http://www.semiconductors.philips.com/acrobat/datasheets/HEF4068B_CNV_3.pdf
130 T 400 1100 9 10 1 0 0 0 1
132 L 300 1900 700 1900 3 0 0 0 -1 -1
133 L 300 1300 700 1300 3 0 0 0 -1 -1
134 A 700 1600 300 270 180 3 0 0 0 -1 -1