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  28 <h1><a name="xilinx_hints" id="xilinx_hints">Xilinx Hints</a></h1>
  29 <div class="level1">
  30 <pre class="code">For those of you who wish to use Icarus Verilog, in combination with
  31 the Xilinx back end (Foundation or Alliance), it can be done.  I have
  32 run some admittedly simple (2300 equivalent gates) designs through this
  33 setup, targeting a Spartan XCS10.
  34
  35 Verilog:
  36
  37    Older versions of Icarus Verilog (like 19990814) couldn&#039;t synthesize
  38    logic buried in procedural (flip-flop) assignment.  Newer versions
  39    (like 20000120) don&#039;t have this limitation.
  40
  41    Procedural assignments have to be given one at a time, to be
  42    &quot;found&quot; by xnfsyn.  Say
  43        always @ (posedge Clk) Y = newY;
  44        always @ (posedge Clk) Z = newZ;
  45    rather than
  46        always @ (posedge Clk) begin
  47            Y = newY;
  48            Z = newZ;
  49        end
  50
  51    Steve&#039;s xnf.txt covers most buffer and pin constructs, but I had reason
  52    to use a global clock net not connected to an input pin.  The standard
  53    Verilog for a buffer, combined with a declaration to turn that into a
  54    BUFG, is:
  55        buf BUFG( your_output_here, your_input_here );
  56        $attribute(BUFG,&quot;XNF-LCA&quot;,&quot;BUFG:O,I&quot;)
  57
  58    I use post-processing on my .xnf files to add &quot;FAST&quot; attributes to
  59    output pins.
  60
  61 Running ivl:
  62
  63    The -F switches are important.  The following order seems to robustly
  64    generate valid XNF files, and is used by &quot;verilog -X&quot;:
  65       -Fsynth -Fnodangle -Fxnfio
  66
  67 Generating .pcf files:
  68
  69    The ngdbuild step seems to lose pin placement information that ivl
  70    puts in the XNF file.  Use xnf2pcf to extract this information to
  71    a .pcf file, which the Xilinx place-and-route software _will_ pay
  72    attention to.  Steve says he now makes that information available
  73    in an NCF file, with -fncf=&lt;path&gt;, but I haven&#039;t tested that.
  74
  75 Running the Xilinx back end:
  76
  77    You can presumably use the GUI, but that doesn&#039;t fit in Makefiles :-).
  78    Here is the command sequence in pseudo-shell-script:
  79       ngdbuild -p $part $1.xnf $1.ngd
  80       map -p $part -o map.ncd $1.ngd
  81       xnf2pcf &lt;$1.xnf &gt;$1.pcf    # see above
  82       par -w -ol 2 -d 0 map.ncd $1.ncd $1.pcf
  83       bitgen_flags = -g ConfigRate:SLOW -g TdoPin:PULLNONE -g DonePin:PULLUP \
  84                      -g CRC:enable -g StartUpClk:CCLK -g SyncToDone:no \
  85                      -g DoneActive:C1 -g OutputsActive:C3 -g GSRInactive:C4 \
  86                      -g ReadClk:CCLK -g ReadCapture:enable -g ReadAbort:disable
  87       bitgen $1.ncd -l -w $bitgen_flags
  88
  89    The Xilinx software has diarrhea of the temp files (14, not including
  90    .xnf, .pcf, .ngd, .ncd, and .bit), so this sequence is best done in a
  91    dedicated directory.  Note in particular that map.ncd is a generic name.
  92
  93    I had reason to run this remotely (and transparently within a Makefile)
  94    via ssh.  I use the gmake rule
  95 %.bit : %.xnf
  96         ssh -x -a -o &#039;BatchMode yes&#039; ${ALLIANCE_HOST} \
  97                remote_alliance ${REMOTE_DIR} $(basename $@) 2&gt;&amp;1 &lt; $&lt;
  98         scp ${ALLIANCE_HOST}:${REMOTE_DIR}/$@ .
  99     and the remote_alliance script (on ${ALLIANCE_HOST})
 100 /bin/csh
 101 cd $1
 102 cat &gt;! $2.xnf
 103 xnf2pcf &lt;$2.xnf &gt;! $2.pcf
 104 ./backend $2
 105
 106    There is now a &quot;Xilinx on Linux HOWTO&quot; at
 107          http://www.polybus.com/xilinx_on_linux.html
 108    I haven&#039;t tried this yet, it looks interesting.
 109
 110 Downloading:
 111
 112    I use the XESS (http://www.xess.com/) XSP-10 development board, which
 113    uses the PC parallel (printer) port for downloading and interaction
 114    with the host.  They made an old version of their download program
 115    public domain, posted it at
 116       http://www.xess.com/FPGA/xstools.zip ,
 117    and now there is a Linux port at
 118       ftp://ftp.microux.com/pub/pilotscope/xstools.tar.gz .
 119
 120 The above hints are based on my experience with Foundation 1.5 on NT
 121 (gack) and Alliance 2.1i on Solaris.  Your mileage may vary.  Good luck!
 122
 123      - Larry Doolittle   &lt;LRDoolittle@lbl.gov&gt;   August 19, 1999
 124                                         updated February 1, 2000
 125 </pre>
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