4 T 200 150 5 8 1 1 0 6 1
8 T 350 100 9 8 0 1 0 0 1
10 T 350 100 5 8 0 1 0 2 1
13 P 200 1100 0 1100 1 0 1
15 T 200 1150 5 8 1 1 0 6 1
17 T 200 1050 5 8 0 1 0 8 1
19 T 350 1100 9 8 0 1 0 0 1
21 T 350 1100 5 8 0 1 0 2 1
26 T 200 850 5 8 1 1 0 6 1
28 T 200 750 5 8 0 1 0 8 1
30 T 350 800 9 8 0 1 0 0 1
32 T 350 800 5 8 0 1 0 2 1
35 T 400 100 9 8 1 0 0 0 1
37 A 36 600 400 312 97 3 0 0 0 -1 -1
38 P 990 600 1300 600 1 0 1
40 T 1100 650 5 8 1 1 0 0 1
42 T 1100 550 5 8 0 1 0 2 1
44 T 950 600 9 8 0 1 0 6 1
46 T 950 600 5 8 0 1 0 8 1
49 V 250 1100 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
50 V 250 800 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
51 V 250 100 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
52 L 300 300 600 300 3 0 0 0 -1 -1
53 L 300 900 600 900 3 0 0 0 -1 -1
54 T 600 1000 5 10 0 0 0 0 1
56 T 600 1200 5 10 0 0 0 0 1
58 T 600 1400 5 10 0 0 0 0 1
60 T 600 1600 5 10 0 0 0 0 1
62 T 600 1800 5 10 0 0 0 0 1
63 slotdef=2:9,10,12,13,8
64 A 600 700 400 270 76 3 0 0 0 -1 -1
65 A 600 500 400 14 76 3 0 0 0 -1 -1
66 L 300 100 300 300 3 0 0 0 -1 -1
67 L 300 1100 300 900 3 0 0 0 -1 -1
70 T 200 450 5 8 1 1 0 6 1
72 T 200 350 5 8 0 1 0 8 1
74 T 350 400 9 8 0 1 0 0 1
76 T 350 400 5 8 0 1 0 2 1
79 V 250 400 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
80 L 300 1100 300 1200 3 0 0 0 -1 -1
81 L 300 0 300 100 3 0 0 0 -1 -1
82 T 400 1000 8 10 1 1 0 0 1
84 T 600 2000 5 10 0 0 0 0 1
86 T 600 2200 5 10 0 0 0 0 1
87 description=2 NAND gates with 4 inputs and open collector output
88 T 600 2400 5 10 0 0 0 0 1
90 T 600 2600 5 10 0 0 0 0 1