| blob | c431812a0c58eab4b08b5d34cb7d4ae433675ad5 |
1 v 20070626 1
2 T 2400 5900 8 10 1 1 0 6 1
3 refdes=U?
4 T 400 6050 5 10 0 0 0 0 1
5 device=AT90S4433_DIP
6 T 400 6250 5 10 0 0 0 0 1
7 footprint=DIP28
8 T 400 6450 5 10 0 0 0 0 1
9 net=Vcc:7
10 T 400 6650 5 10 0 0 0 0 1
11 net=GND:8
12 T 400 6850 5 10 0 0 0 0 1
13 net=AVcc:20
14 T 400 7050 5 10 0 0 0 0 1
15 net=AGND:22
16 P 1700 100 1700 400 1 0 0
17 {
18 T 1750 200 5 8 1 1 0 0 1
19 pinnumber=10
20 T 1750 200 5 8 0 1 0 2 1
21 pinseq=1
22 T 1700 450 9 8 1 1 0 3 1
23 pinlabel=XTAL2
24 T 1700 600 5 8 0 1 0 3 1
25 pintype=out
26 }
27 P 1100 100 1100 400 1 0 0
28 {
29 T 1150 200 5 8 1 1 0 0 1
30 pinnumber=9
31 T 1150 200 5 8 0 1 0 2 1
32 pinseq=2
33 T 1100 450 9 8 1 1 0 3 1
34 pinlabel=XTAL1
35 T 1100 600 5 8 0 1 0 3 1
36 pintype=in
37 }
38 P 100 800 300 800 1 0 0
39 {
40 T 300 850 5 8 1 1 0 6 1
41 pinnumber=1
42 T 300 750 5 8 0 1 0 8 1
43 pinseq=3
44 T 450 800 9 8 1 1 0 0 1
45 pinlabel=\_Reset\_
46 T 450 800 5 8 0 1 0 2 1
47 pintype=in
48 }
49 V 350 800 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
50 P 100 2600 400 2600 1 0 0
51 {
52 T 300 2650 5 8 1 1 0 6 1
53 pinnumber=13
54 T 300 2550 5 8 0 1 0 8 1
55 pinseq=4
56 T 450 2600 9 8 1 1 0 0 1
57 pinlabel=PD7 (AIN1)
58 T 450 2600 5 8 0 1 0 2 1
59 pintype=io
60 }
61 P 100 3000 400 3000 1 0 0
62 {
63 T 300 3050 5 8 1 1 0 6 1
64 pinnumber=12
65 T 300 2950 5 8 0 1 0 8 1
66 pinseq=5
67 T 450 3000 9 8 1 1 0 0 1
68 pinlabel=PD6 (AIN0)
69 T 450 3000 5 8 0 1 0 2 1
70 pintype=io
71 }
72 P 100 3400 400 3400 1 0 0
73 {
74 T 300 3450 5 8 1 1 0 6 1
75 pinnumber=11
76 T 300 3350 5 8 0 1 0 8 1
77 pinseq=6
78 T 450 3400 9 8 1 1 0 0 1
79 pinlabel=PD5 (T1)
80 T 450 3400 5 8 0 1 0 2 1
81 pintype=io
82 }
83 P 100 3800 400 3800 1 0 0
84 {
85 T 300 3850 5 8 1 1 0 6 1
86 pinnumber=6
87 T 300 3750 5 8 0 1 0 8 1
88 pinseq=7
89 T 450 3800 9 8 1 1 0 0 1
90 pinlabel=PD4 (T0)
91 T 450 3800 5 8 0 1 0 2 1
92 pintype=io
93 }
94 P 100 4200 400 4200 1 0 0
95 {
96 T 300 4250 5 8 1 1 0 6 1
97 pinnumber=5
98 T 300 4150 5 8 0 1 0 8 1
99 pinseq=8
100 T 450 4200 9 8 1 1 0 0 1
101 pinlabel=PD3 (INT1)
102 T 450 4200 5 8 0 1 0 2 1
103 pintype=io
104 }
105 P 100 4600 400 4600 1 0 0
106 {
107 T 300 4650 5 8 1 1 0 6 1
108 pinnumber=4
109 T 300 4550 5 8 0 1 0 8 1
110 pinseq=9
111 T 450 4600 9 8 1 1 0 0 1
112 pinlabel=PD2 (INT0)
113 T 450 4600 5 8 0 1 0 2 1
114 pintype=io
115 }
116 P 100 5000 400 5000 1 0 0
117 {
118 T 300 5050 5 8 1 1 0 6 1
119 pinnumber=3
120 T 300 4950 5 8 0 1 0 8 1
121 pinseq=10
122 T 450 5000 9 8 1 1 0 0 1
123 pinlabel=PD1 (TXD)
124 T 450 5000 5 8 0 1 0 2 1
125 pintype=io
126 }
127 P 100 5400 400 5400 1 0 0
128 {
129 T 300 5450 5 8 1 1 0 6 1
130 pinnumber=2
131 T 300 5350 5 8 0 1 0 8 1
132 pinseq=11
133 T 450 5400 9 8 1 1 0 0 1
134 pinlabel=PD0 (RXD)
135 T 450 5400 5 8 0 1 0 2 1
136 pintype=io
137 }
138 P 100 1200 400 1200 1 0 0
139 {
140 T 300 1250 5 8 1 1 0 6 1
141 pinnumber=21
142 T 300 1150 5 8 0 1 0 8 1
143 pinseq=12
144 T 450 1200 9 8 1 1 0 0 1
145 pinlabel=AREF
146 T 450 1200 5 8 0 1 0 2 1
147 pintype=in
148 }
149 P 2700 800 2400 800 1 0 0
150 {
151 T 2500 850 5 8 1 1 0 0 1
152 pinnumber=28
153 T 2500 750 5 8 0 1 0 2 1
154 pinseq=13
155 T 2350 800 9 8 1 1 0 6 1
156 pinlabel=(ADC5) PC5
157 T 2350 800 5 8 0 1 0 8 1
158 pintype=io
159 }
160 P 2700 1200 2400 1200 1 0 0
161 {
162 T 2500 1250 5 8 1 1 0 0 1
163 pinnumber=27
164 T 2500 1150 5 8 0 1 0 2 1
165 pinseq=14
166 T 2350 1200 9 8 1 1 0 6 1
167 pinlabel=(ADC4) PC4
168 T 2350 1200 5 8 0 1 0 8 1
169 pintype=io
170 }
171 P 2700 1600 2400 1600 1 0 0
172 {
173 T 2500 1650 5 8 1 1 0 0 1
174 pinnumber=26
175 T 2500 1550 5 8 0 1 0 2 1
176 pinseq=15
177 T 2350 1600 9 8 1 1 0 6 1
178 pinlabel=(ADC3) PC3
179 T 2350 1600 5 8 0 1 0 8 1
180 pintype=io
181 }
182 P 2700 2000 2400 2000 1 0 0
183 {
184 T 2500 2050 5 8 1 1 0 0 1
185 pinnumber=25
186 T 2500 1950 5 8 0 1 0 2 1
187 pinseq=16
188 T 2350 2000 9 8 1 1 0 6 1
189 pinlabel=(ADC2) PC2
190 T 2350 2000 5 8 0 1 0 8 1
191 pintype=io
192 }
193 P 2700 2400 2400 2400 1 0 0
194 {
195 T 2500 2450 5 8 1 1 0 0 1
196 pinnumber=24
197 T 2500 2350 5 8 0 1 0 2 1
198 pinseq=17
199 T 2350 2400 9 8 1 1 0 6 1
200 pinlabel=(ADC1) PC1
201 T 2350 2400 5 8 0 1 0 8 1
202 pintype=io
203 }
204 P 2700 2800 2400 2800 1 0 0
205 {
206 T 2500 2850 5 8 1 1 0 0 1
207 pinnumber=23
208 T 2500 2750 5 8 0 1 0 2 1
209 pinseq=18
210 T 2350 2800 9 8 1 1 0 6 1
211 pinlabel=(ADC0) PC0
212 T 2350 2800 5 8 0 1 0 8 1
213 pintype=io
214 }
215 P 2700 3400 2400 3400 1 0 0
216 {
217 T 2500 3450 5 8 1 1 0 0 1
218 pinnumber=19
219 T 2500 3350 5 8 0 1 0 2 1
220 pinseq=19
221 T 2350 3400 9 8 1 1 0 6 1
222 pinlabel=(SCK) PB5
223 T 2350 3400 5 8 0 1 0 8 1
224 pintype=io
225 }
226 P 2700 3800 2400 3800 1 0 0
227 {
228 T 2500 3850 5 8 1 1 0 0 1
229 pinnumber=18
230 T 2500 3750 5 8 0 1 0 2 1
231 pinseq=20
232 T 2350 3800 9 8 1 1 0 6 1
233 pinlabel=(MISO) PB4
234 T 2350 3800 5 8 0 1 0 8 1
235 pintype=io
236 }
237 P 2700 4200 2400 4200 1 0 0
238 {
239 T 2500 4250 5 8 1 1 0 0 1
240 pinnumber=17
241 T 2500 4150 5 8 0 1 0 2 1
242 pinseq=21
243 T 2350 4200 9 8 1 1 0 6 1
244 pinlabel=(MOSI) PB3
245 T 2350 4200 5 8 0 1 0 8 1
246 pintype=io
247 }
248 P 2700 4600 2400 4600 1 0 0
249 {
250 T 2500 4650 5 8 1 1 0 0 1
251 pinnumber=16
252 T 2500 4550 5 8 0 1 0 2 1
253 pinseq=22
254 T 2350 4600 9 8 1 1 0 6 1
255 pinlabel=(\_SS\_) PB2
256 T 2350 4600 5 8 0 1 0 8 1
257 pintype=io
258 }
259 P 2700 5000 2400 5000 1 0 0
260 {
261 T 2500 5050 5 8 1 1 0 0 1
262 pinnumber=15
263 T 2500 4950 5 8 0 1 0 2 1
264 pinseq=23
265 T 2350 5000 9 8 1 1 0 6 1
266 pinlabel=(OC1) PB1
267 T 2350 5000 5 8 0 1 0 8 1
268 pintype=io
269 }
270 P 2700 5400 2400 5400 1 0 0
271 {
272 T 2500 5450 5 8 1 1 0 0 1
273 pinnumber=14
274 T 2500 5350 5 8 0 1 0 2 1
275 pinseq=24
276 T 2350 5400 9 8 1 1 0 6 1
277 pinlabel=(ICP) PB0
278 T 2350 5400 5 8 0 1 0 8 1
279 pintype=io
280 }
281 B 400 400 2000 5400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
282 T 400 7250 5 10 0 0 0 0 1
283 description=8-bit RISC micro controller (Atmel)
284 T 400 7450 5 10 0 0 0 0 1
285 numslots=0
286 T 400 7650 5 10 0 0 0 0 1
287 author=Werner Hoch <werner.hoATgmx.de>
288 T 400 5850 9 10 1 0 0 0 1
289 AT90S4433