2 T 2300 1500 8 10 1 1 0 6 1
4 T 300 1650 5 10 0 0 0 0 1
6 T 300 1850 5 10 0 0 0 0 1
8 T 300 2050 5 10 0 0 0 0 1
10 T 300 2250 5 10 0 0 0 0 1
14 T 200 350 5 8 1 1 0 6 1
16 T 200 250 5 8 0 1 0 8 1
18 T 350 300 9 8 1 1 0 0 1
20 T 350 300 5 8 0 1 0 2 1
23 V 250 300 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
26 T 200 750 5 8 1 1 0 6 1
28 T 200 650 5 8 0 1 0 8 1
30 T 350 700 9 8 1 1 0 0 1
32 T 350 700 5 8 0 1 0 2 1
35 P 0 1100 300 1100 1 0 0
37 T 200 1150 5 8 1 1 0 6 1
39 T 200 1050 5 8 0 1 0 8 1
41 T 350 1100 9 8 1 1 0 0 1
43 T 350 1100 5 8 0 1 0 2 1
46 P 2600 300 2300 300 1 0 0
48 T 2400 350 5 8 1 1 0 0 1
50 T 2400 250 5 8 0 1 0 2 1
52 T 2250 300 9 8 1 1 0 6 1
54 T 2250 300 5 8 0 1 0 8 1
57 P 2600 700 2300 700 1 0 0
59 T 2400 750 5 8 1 1 0 0 1
61 T 2400 650 5 8 0 1 0 2 1
63 T 2250 700 9 8 1 1 0 6 1
64 pinlabel=(MISO/INT0) PB1
65 T 2250 700 5 8 0 1 0 8 1
68 P 2600 1100 2300 1100 1 0 0
70 T 2400 1150 5 8 1 1 0 0 1
72 T 2400 1050 5 8 0 1 0 2 1
74 T 2250 1100 9 8 1 1 0 6 1
76 T 2250 1100 5 8 0 1 0 8 1
79 B 300 0 2000 1400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
80 T 300 2450 5 10 0 0 0 0 1
81 description=8-bit RISC micro controller (Atmel)
82 T 300 2650 5 10 0 0 0 0 1
84 T 300 2850 5 10 0 0 0 0 1
85 author=Werner Hoch <werner.hoATgmx.de>
86 T 300 1450 9 10 1 0 0 0 1