2 L 300 1200 700 1200 3 0 0 0 -1 -1
3 L 300 600 700 600 3 0 0 0 -1 -1
4 L 300 600 300 1200 3 0 0 0 -1 -1
5 A 700 900 300 270 180 3 0 0 0 -1 -1
6 L 300 1200 300 1800 3 0 0 0 -1 -1
7 L 300 600 300 0 3 0 0 0 -1 -1
8 V 1050 900 50 6 0 0 0 -1 -1 0 0 -1 -1 -1 -1
9 P 1100 900 1300 900 1 0 1
11 T 1000 900 5 8 0 0 0 0 1
13 T 1000 900 5 8 0 0 0 0 1
15 T 1000 900 5 8 0 0 0 0 1
20 T 300 100 5 8 0 0 0 0 1
22 T 300 100 5 8 0 0 0 0 1
24 T 300 100 5 8 0 0 0 0 1
29 T 300 300 5 8 0 0 0 0 1
31 T 300 300 5 8 0 0 0 0 1
33 T 300 300 5 8 0 0 0 0 1
38 T 300 500 5 8 0 0 0 0 1
40 T 300 500 5 8 0 0 0 0 1
42 T 300 500 5 8 0 0 0 0 1
47 T 300 700 5 8 0 0 0 0 1
49 T 300 700 5 8 0 0 0 0 1
51 T 300 700 5 8 0 0 0 0 1
56 T 300 900 5 8 0 0 0 0 1
58 T 300 900 5 8 0 0 0 0 1
60 T 300 900 5 8 0 0 0 0 1
63 P 300 1100 0 1100 1 0 1
65 T 300 1100 5 8 0 0 0 0 1
67 T 300 1100 5 8 0 0 0 0 1
69 T 300 1100 5 8 0 0 0 0 1
72 P 300 1300 0 1300 1 0 1
74 T 300 1300 5 8 0 0 0 0 1
76 T 300 1300 5 8 0 0 0 0 1
78 T 300 1300 5 8 0 0 0 0 1
81 P 300 1500 0 1500 1 0 1
83 T 300 1500 5 8 0 0 0 0 1
85 T 300 1500 5 8 0 0 0 0 1
87 T 300 1500 5 8 0 0 0 0 1
90 P 300 1700 0 1700 1 0 1
92 T 300 1700 5 8 0 0 0 0 1
94 T 300 1700 5 8 0 0 0 0 1
96 T 300 1700 5 8 0 0 0 0 1
99 T 400 500 5 10 1 1 0 2 1
101 T 400 100 5 8 0 0 0 0 1
103 T 400 200 5 8 0 0 0 0 1
104 VERILOG_PORTS=POSITIONAL