2 L 300 200 300 800 3 0 0 0 -1 -1
5 L 300 800 700 800 3 0 0 0 -1 -1
6 T 700 900 5 10 0 0 0 0 1
8 T 700 1100 5 10 0 0 0 0 1
10 T 700 1300 5 10 0 0 0 0 1
12 T 700 1500 5 10 0 0 0 0 1
14 T 700 1700 5 10 0 0 0 0 1
16 T 700 1900 5 10 0 0 0 0 1
18 T 700 2100 5 10 0 0 0 0 1
20 L 300 200 700 200 3 0 0 0 -1 -1
21 A 700 500 300 270 180 3 0 0 0 -1 -1
22 P 1000 500 1300 500 1 0 1
24 T 1100 550 5 8 1 1 0 0 1
26 T 1100 450 5 8 0 1 0 2 1
28 T 950 500 9 8 0 1 0 6 1
30 T 950 500 5 8 0 1 0 8 1
35 T 200 750 5 8 1 1 0 6 1
37 T 200 650 5 8 0 1 0 8 1
39 T 350 700 9 8 0 1 0 0 1
41 T 350 700 5 8 0 1 0 2 1
46 T 200 350 5 8 1 1 0 6 1
48 T 200 250 5 8 0 1 0 8 1
50 T 350 300 9 8 0 1 0 0 1
52 T 350 300 5 8 0 1 0 2 1
55 T 300 900 8 10 1 1 0 0 1
57 T 700 2300 5 10 0 0 0 0 1
59 T 700 2500 5 10 0 0 0 0 1
60 description=4 AND gates with 2 inputs
61 T 700 2700 5 10 0 0 0 0 1
63 T 700 2900 5 10 0 0 0 0 1
65 T 700 3100 5 10 0 0 0 0 1
66 documentation=http://www-s.ti.com/sc/ds/sn74hc08.pdf