2 L 300 300 300 900 3 0 0 0 -1 -1
3 L 300 900 700 900 3 0 0 0 -1 -1
4 T 600 1000 5 10 0 0 0 0 1
6 T 600 1200 5 10 0 0 0 0 1
8 T 600 1400 5 10 0 0 0 0 1
10 T 600 1600 5 10 0 0 0 0 1
12 T 600 1800 5 10 0 0 0 0 1
13 slotdef=2:9,10,12,13,8
14 L 300 300 700 300 3 0 0 0 -1 -1
15 A 700 600 300 270 180 3 0 0 0 -1 -1
16 V 1050 600 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
17 P 1100 600 1300 600 1 0 1
19 T 1100 650 5 8 1 1 0 0 1
21 T 1100 550 5 8 0 1 0 2 1
23 T 950 600 9 8 0 1 0 6 1
25 T 950 600 5 8 0 1 0 8 1
30 T 200 150 5 8 1 1 0 6 1
32 T 200 50 5 8 0 1 0 8 1
34 T 350 100 9 8 0 1 0 0 1
36 T 350 100 5 8 0 1 0 2 1
39 P 300 1100 0 1100 1 0 1
41 T 200 1150 5 8 1 1 0 6 1
43 T 200 1050 5 8 0 1 0 8 1
45 T 350 1100 9 8 0 1 0 0 1
47 T 350 1100 5 8 0 1 0 2 1
52 T 200 850 5 8 1 1 0 6 1
54 T 200 750 5 8 0 1 0 8 1
56 T 350 800 9 8 0 1 0 0 1
58 T 350 800 5 8 0 1 0 2 1
61 T 400 100 9 8 1 0 0 0 1
63 L 300 300 300 100 3 0 0 0 -1 -1
64 L 300 1100 300 900 3 0 0 0 -1 -1
67 T 200 450 5 8 1 1 0 6 1
69 T 200 350 5 8 0 1 0 8 1
71 T 350 400 9 8 0 1 0 0 1
73 T 350 400 5 8 0 1 0 2 1
76 L 300 1100 300 1200 3 0 0 0 -1 -1
77 L 300 0 300 100 3 0 0 0 -1 -1
78 T 400 1000 8 10 1 1 0 0 1
80 T 600 2000 5 10 0 0 0 0 1
82 T 600 2200 5 10 0 0 0 0 1
83 description=2 NAND gates with 4 inputs
84 T 600 2400 5 10 0 0 0 0 1
86 T 600 2600 5 10 0 0 0 0 1
88 T 600 2800 5 10 0 0 0 0 1
89 documentation=http://www-s.ti.com/sc/ds/sn74hc20.pdf