2 L 260 200 600 200 3 0 0 0 -1 -1
3 L 260 800 600 800 3 0 0 0 -1 -1
4 T 600 1100 8 10 0 0 0 0 1
6 T 600 1300 8 10 0 0 0 0 1
8 T 600 1500 8 10 0 0 0 0 1
10 T 600 1700 8 10 0 0 0 0 1
12 T 600 1900 8 10 0 0 0 0 1
14 T 600 2100 8 10 0 0 0 0 1
16 A 0 500 400 312 97 3 0 0 0 -1 -1
19 T 200 750 5 8 1 1 0 6 1
21 T 200 650 5 8 0 1 0 8 1
23 T 350 700 9 8 0 1 0 0 1
25 T 350 700 5 8 0 1 0 2 1
30 T 200 350 5 8 1 1 0 6 1
32 T 200 250 5 8 0 1 0 8 1
34 T 350 300 9 8 0 1 0 0 1
36 T 350 300 5 8 0 1 0 2 1
39 P 1300 500 988 500 1 0 0
41 T 1100 550 5 8 1 1 0 0 1
43 T 1100 450 5 8 0 1 0 2 1
45 T 950 500 9 8 0 1 0 6 1
47 T 950 500 5 8 0 1 0 8 1
50 A 600 600 400 270 76 3 0 0 0 -1 -1
51 A 600 400 400 14 76 3 0 0 0 -1 -1
52 T 300 900 8 10 1 1 0 0 1
54 T 600 2300 8 10 0 0 0 0 1
56 T 600 2500 8 10 0 0 0 0 1
57 description=4 OR gates with 2 inputs
58 T 600 2700 8 10 0 0 0 0 1
59 documentation=http://www-s.ti.com/sc/ds/sn74hc32.pdf
60 T 300 0 8 10 1 1 0 0 1