verilog: add sv_maps iterators
[ghdl-vlg.git] / testsuite / sanity / 005examples / testsuite.sh
blob7c708b2b99e86dc170f5eb149a82d58cb3c48e84
1 #!/bin/sh
3 . ../../testenv.sh
5 # Skip the test if ../../../doc is not available.
6 if [ ! -d ../../../doc ]; then
7 echo "test skipped, '../../../doc' not found"
8 exit 0
9 fi
11 for d in ../../../doc/quick_start/simulation/*/; do
12 cp "$d"*.vhdl ./
13 done
15 analyze hello.vhdl
16 elab_simulate hello_world
18 analyze heartbeat.vhdl
19 elab_simulate heartbeat --stop-time=100ns
21 analyze adder.vhdl
22 analyze adder_tb.vhdl
23 elab_simulate adder_tb
25 clean
27 echo "test successful"