testsuite/synth/assign01/tb_assign05.v

   1 module tb_assign05;
   2    wire [3:0] b;
   3    reg [3:0] a;
   4
   5    assign05 dut (.a(a), .b(b));
   6
   7    initial begin
   8       a <= 4'h4;
   9       # 1;
  10       if (b !== 4'hb)
  11         $fatal(1, "FAILURE");
  12
  13       a <= 4'h5;
  14       # 1;
  15       if (b !== 4'ha)
  16         $fatal(1, "FAILURE");
  17
  18       $display("PASS");
  19       $finish;
  20    end
  21 endmodule