verilog: add sv_maps iterators
[ghdl-vlg.git] / testsuite / synth / issue2214 / avm_cache.sby
blob1a5498fd7cb750959a4a964e033e355e66cd444e
1 [tasks]
2 bmc
4 [options]
5 bmc: mode bmc
6 bmc: depth 6
8 [engines]
9 smtbmc
11 [script]
12 ghdl --std=08 -gG_CACHE_SIZE=8 -gG_ADDRESS_SIZE=4 -gG_DATA_SIZE=8 avm_cache.vhd avm_cache.psl -e avm_cache
13 prep -top avm_cache
15 [files]
16 avm_cache.psl
17 avm_cache.vhd