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verilog: add sv_maps iterators
[ghdl-vlg.git]
/
testsuite
/
synth
/
issue2214
/
avm_cache.sby
blob
1a5498fd7cb750959a4a964e033e355e66cd444e
1
[tasks]
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bmc
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[options]
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bmc: mode bmc
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bmc: depth 6
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[engines]
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smtbmc
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[script]
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ghdl --std=08 -gG_CACHE_SIZE=8 -gG_ADDRESS_SIZE=4 -gG_DATA_SIZE=8 avm_cache.vhd avm_cache.psl -e avm_cache
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prep -top avm_cache
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[files]
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avm_cache.psl
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avm_cache.vhd
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