testsuite/synth/module01/fulladder4.v

   1 module fulladder1(sum, co, a, b, c_in);
   2    output sum, co;
   3    input a, b, c_in;
   4    assign sum = a ^ b ^ c_in;
   5    assign co = (a & b) | (b & c_in) | (c_in & a);
   6 endmodule
   7
   8 module fulladder4(sum, cout, a, b, cin);
   9    output [3:0] sum;
  10    output cout;
  11    input [3:0] a, b;
  12    input cin;
  13    wire [3:1] c;
  14
  15    // Instantiate four 1-bit full adders
  16    fulladder1 f0 (sum[0], c[1], a[0], b[0], cin);
  17    fulladder1 f1 (sum[1], c[2], a[1], b[1], c[1]);
  18    fulladder1 f2 (sum[2], c[3], a[2], b[2], c[2]);
  19    fulladder1 f3 (sum[3], cout, a[3], b[3], c[3]);
  20 endmodule