sysdeps/i960/addmul_1.s

   1 .text
   2         .align  4
   3         .globl  ___mpn_mul_1
   4 ___mpn_mul_1:
   5         subo    g2,0,g2
   6         shlo    2,g2,g4
   7         subo    g4,g1,g1
   8         subo    g4,g0,g13
   9         mov     0,g0
  10
  11         cmpo    1,0             # clear C bit on AC.cc
  12
  13 Loop:   ld      (g1)[g2*4],g5
  14         emul    g3,g5,g6
  15         ld      (g13)[g2*4],g5
  16
  17         addc    g0,g6,g6        # relies on that C bit is clear
  18         addc    0,g7,g7
  19         addc    g5,g6,g6        # relies on that C bit is clear
  20         st      g6,(g13)[g2*4]
  21         addc    0,g7,g0
  22
  23         addo    g2,1,g2
  24         cmpobne 0,g2,Loop       # when branch is taken, clears C bit
  25
  26         ret