sysdeps/powerpc/powerpc64/register-dump.h

   1 /* Dump registers.
   2    Copyright (C) 1998, 2002 Free Software Foundation, Inc.
   3    This file is part of the GNU C Library.
   4
   5    The GNU C Library is free software; you can redistribute it and/or
   6    modify it under the terms of the GNU Lesser General Public
   7    License as published by the Free Software Foundation; either
   8    version 2.1 of the License, or (at your option) any later version.
   9
  10    The GNU C Library is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13    Lesser General Public License for more details.
  14
  15    You should have received a copy of the GNU Lesser General Public
  16    License along with the GNU C Library; if not, write to the Free
  17    Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  18    02111-1307 USA.  */
  19
  20 #include <sys/uio.h>
  21 #include <stdio-common/_itoa.h>
  22
  23 /* This prints out the information in the following form: */
  24 static const char dumpform[] = "\
  25 Register dump:\n\
  26 sr0=000000000000020% sr1=000000000000021% dar=000000000000029% dsi=000002a%\n\
  27 lr=000000000000024%  ctr=000000000000023% gr3*=000000000000022% trap=0000028%\n\
  28 ccr=0000026%  xer=0000025%\n\
  29 gr0-3:   000000000000000% 000000000000001% 000000000000002% 000000000000003%\n\
  30 gr4-7:   000000000000004% 000000000000005% 000000000000006% 000000000000007%\n\
  31 gr8-11:  000000000000008% 000000000000009% 00000000000000a% 00000000000000b%\n\
  32 gr12-15: 00000000000000c% 00000000000000d% 00000000000000e% 00000000000000f%\n\
  33 gr16-19: 000000000000010% 000000000000011% 000000000000012% 000000000000013%\n\
  34 gr20-23: 000000000000014% 000000000000015% 000000000000016% 000000000000017%\n\
  35 gr24-27: 000000000000018% 000000000000019% 00000000000001a% 00000000000001b%\n\
  36 gr28-31: 00000000000001c% 00000000000001d% 00000000000001e% 00000000000001f%\n\
  37 fscr=0000071%\n\
  38 fp0-3:   000000000000030% 000000000000031% 000000000000032% 000000000000033%\n\
  39 fp4-7:   000000000000034% 000000000000035% 000000000000036% 000000000000037%\n\
  40 fp8-11:  000000000000038% 000000000000038% 00000000000003a% 00000000000003b%\n\
  41 fp12-15: 00000000000003c% 00000000000003d% 00000000000003e% 00000000000003f%\n\
  42 fp16-19: 000000000000040% 000000000000041% 000000000000042% 000000000000043%\n\
  43 fp20-23: 000000000000044% 000000000000045% 000000000000046% 000000000000047%\n\
  44 fp24-27: 000000000000048% 000000000000049% 00000000000004a% 00000000000004b%\n\
  45 fp28-31: 00000000000004c% 00000000000004d% 00000000000004e% 00000000000004f%\n\
  46 ";
  47
  48 /* Most of the fields are self-explanatory.  'sr0' is the next
  49    instruction to execute, from SRR0, which may have some relationship
  50    with the instruction that caused the exception.  'r3*' is the value
  51    that will be returned in register 3 when the current system call
  52    returns.  'sr1' is SRR1, bits 16-31 of which are copied from the MSR:
  53
  54    16 - External interrupt enable
  55    17 - Privilege level (1=user, 0=supervisor)
  56    18 - FP available
  57    19 - Machine check enable (if clear, processor locks up on machine check)
  58    20 - FP exception mode bit 0 (FP exceptions recoverable)
  59    21 - Single-step trace enable
  60    22 - Branch trace enable
  61    23 - FP exception mode bit 1
  62    25 - exception prefix (if set, exceptions are taken from 0xFFFnnnnn,
  63         otherwise from 0x000nnnnn).
  64    26 - Instruction address translation enabled.
  65    27 - Data address translation enabled.
  66    30 - Exception is recoverable (otherwise, don't try to return).
  67    31 - Little-endian mode enable.
  68
  69    'Trap' is the address of the exception:
  70
  71    00200 - Machine check exception (memory parity error, for instance)
  72    00300 - Data access exception (memory not mapped, see dsisr for why)
  73    00400 - Instruction access exception (memory not mapped)
  74    00500 - External interrupt
  75    00600 - Alignment exception (see dsisr for more information)
  76    00700 - Program exception (illegal/trap instruction, FP exception)
  77    00800 - FP unavailable (should not be seen by user code)
  78    00900 - Decrementer exception (for instance, SIGALRM)
  79    00A00 - I/O controller interface exception
  80    00C00 - System call exception (for instance, kill(3)).
  81    00E00 - FP assist exception (optional FP instructions, etc.)
  82
  83    'dar' is the memory location, for traps 00300, 00400, 00600, 00A00.
  84    'dsisr' has the following bits under trap 00300:
  85    0 - direct-store error exception
  86    1 - no page table entry for page
  87    4 - memory access not permitted
  88    5 - trying to access I/O controller space or using lwarx/stwcx on
  89        non-write-cached memory
  90    6 - access was store
  91    9 - data access breakpoint hit
  92    10 - segment table search failed to find translation (64-bit ppcs only)
  93    11 - I/O controller instruction not permitted
  94    For trap 00400, the same bits are set in SRR1 instead.
  95    For trap 00600, bits 12-31 of the DSISR set to allow emulation of
  96    the instruction without actually having to read it from memory.
  97 */
  98
  99 #define xtoi(x) (x >= 'a' ? x + 10 - 'a' : x - '0')
 100
 101 static void
 102 register_dump (int fd, struct sigcontext *ctx)
 103 {
 104   char buffer[sizeof(dumpform)];
 105   char *bufferpos;
 106   unsigned regno;
 107   unsigned *regs = (unsigned *)(ctx->regs);
 108
 109   memcpy(buffer, dumpform, sizeof(dumpform));
 110
 111   /* Generate the output.  */
 112   while ((bufferpos = memchr (buffer, '%', sizeof(dumpform))))
 113     {
 114       regno = xtoi (bufferpos[-1]) | xtoi (bufferpos[-2]) << 4;
 115       memset (bufferpos-2, '0', 3);
 116       _itoa_word (regs[regno], bufferpos+1, 16, 0);
 117     }
 118
 119   /* Write the output.  */
 120   write (fd, buffer, sizeof(buffer));
 121 }
 122
 123
 124 #define REGISTER_DUMP \
 125   register_dump (fd, ctx)