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[glibc/history.git] / sysdeps / mach / hurd / hppa / sigcontext.h
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1 /* Machine-dependent signal context structure for GNU Hurd. HPPA version.
2 Copyright (C) 1995 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Library General Public License as
7 published by the Free Software Foundation; either version 2 of the
8 License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Library General Public License for more details.
15 You should have received a copy of the GNU Library General Public
16 License along with the GNU C Library; see the file COPYING.LIB. If
17 not, write to the Free Software Foundation, Inc., 675 Mass Ave,
18 Cambridge, MA 02139, USA. */
20 /* Signal handlers are actually called:
21 void handler (int sig, int code, struct sigcontext *scp); */
23 /* State of this thread when the signal was taken. */
24 struct sigcontext
26 /* These first members are machine-independent. */
28 int sc_onstack; /* Nonzero if running on sigstack. */
29 __sigset_t sc_mask; /* Blocked signals to restore. */
31 /* MiG reply port this thread is using. */
32 unsigned int sc_reply_port;
34 /* Port this thread is doing an interruptible RPC on. */
35 unsigned int sc_intr_port;
37 /* Error code associated with this signal (interpreted as `error_t'). */
38 int sc_error;
40 /* All following members are machine-dependent. The rest of this
41 structure is written to be laid out identically to a `struct
42 parisc_thread_state'. trampoline.c knows this, so it must be
43 changed if this changes. */
45 #define sc_parisc_thread_state sc_flags /* Beginning of correspondence. */
46 /* "General" registers $1..$31. */
47 unsigned int sc_regs[31];
49 /* Control registers. */
50 unsigned int sc_cr11; /* sar */
51 /* These four registers make up the PC. */
52 unsigned int iioq_head;
53 unsigned int iisq_head;
54 unsigned int iioq_tail;
55 unsigned int iisq_tail;
56 unsigned int sc_cr15;
57 unsigned int sc_cr19;
58 unsigned int sc_cr20;
59 unsigned int sc_cr21;
60 unsigned int sc_cr22; /* ipsw */
61 unsigned int sc_bsd_goto; /* unused */
62 unsigned int sc_sr4;
63 unsigned int sc_sr0;
64 unsigned int sc_sr1;
65 unsigned int sc_sr2;
66 unsigned int sc_sr3;
67 unsigned int sc_sr5;
68 unsigned int sc_sr6;
69 unsigned int sc_sr7;
70 unsigned int sc_cr0;
71 unsigned int sc_cr8;
72 unsigned int sc_cr9;
73 unsigned int sc_cr10; /* unused */
74 unsigned int sc_cr12;
75 unsigned int sc_cr13;
76 unsigned int sc_cr24; /* unused */
77 unsigned int sc_cr25; /* unused */
78 unsigned int sc_cr26; /* unused */
79 unsigned sc_mpsfu_high; /* unused */
80 unsigned sc_mpsfu_low; /* unused */
81 unsigned sc_mpsfu_ovflo; /* unused */
82 int sc_pad;
84 /* Floating point registers $f0..$f31. */
85 double sc_fpregs[32];