include/d_logic.h

   1 /*$Id: d_logic.h,v 1.4 2009-12-13 17:55:01 felix Exp $ -*- C++ -*-
   2  * vim:ts=8:sw=2:et:
   3  * Copyright (C) 2001 Albert Davis
   4  * Author: Albert Davis <aldavis@gnu.org>
   5  *
   6  * This file is part of "Gnucap", the Gnu Circuit Analysis Package
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 3, or (at your option)
  11  * any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21  * 02110-1301, USA.
  22  *------------------------------------------------------------------
  23  * data structures and defaults for logic model.
  24  */
  25 //testing=script,sparse 2006.07.17
  26 #ifndef D_LOGIC_H
  27 #define D_LOGIC_H
  28 #include "e_model.h"
  29 #include "e_elemnt.h"
  30
  31 /*--------------------------------------------------------------------------*/
  32 enum {PORTS_PER_GATE = 10};
  33 /*--------------------------------------------------------------------------*/
  34 class DEV_LOGIC : public ELEMENT {
  35 public:
  36   enum {OUTNODE=0,GND_NODE=1,PWR_NODE=2,ENABLE=3,BEGIN_IN=4}; //node labels
  37 private:
  38   uint_t        _lastchangenode;
  39   int           _quality;
  40   std::string   _failuremode;
  41   smode_t       _oldgatemode;
  42   smode_t       _gatemode;
  43   static int    _count;
  44   node_t        nodes[PORTS_PER_GATE];  /* PORTS_PER_GATE <= PORTSPERSUBCKT */
  45 public:
  46   explicit      DEV_LOGIC();
  47   explicit      DEV_LOGIC(const DEV_LOGIC& p);
  48                 ~DEV_LOGIC()            {--_count;}
  49 private: // override virtuals
  50   char     id_letter()const     {return 'U';}
  51   std::string value_name()const {return "#";}
  52   bool        print_type_in_spice()const {return true;}
  53   std::string dev_type()const {assert(has_common());
  54     return (common()->modelname() + " " + common()->name()).c_str();}
  55   uint_t           tail_size()const     {return 2;}
  56   uint_t           max_nodes()const     {return PORTS_PER_GATE;}
  57   uint_t           min_nodes()const     {return BEGIN_IN+1;}
  58   uint_t           matrix_nodes()const  {return 2;}
  59   uint_t           net_nodes()const     {return _net_nodes;}
  60   CARD*    clone()const         {return new DEV_LOGIC(*this);}
  61   void     precalc_first() {ELEMENT::precalc_first(); if (subckt()) {subckt()->precalc_first();}}
  62   void     expand();
  63   void     precalc_last() {ELEMENT::precalc_last(); if (subckt()) {subckt()->precalc_last();}}
  64   //void   map_nodes();
  65
  66   void     tr_iwant_matrix();
  67   void     tr_begin();
  68   void     tr_restore();
  69   void     dc_advance();
  70   void     tr_advance();
  71   void     tr_regress();
  72   bool     tr_needs_eval()const;
  73   void     tr_queue_eval();
  74   bool     do_tr();
  75   void     tr_load();
  76   TIME_PAIR tr_review();
  77   void     tr_accept();
  78   void     tr_unload();
  79   hp_float_t   tr_involts()const                {unreachable(); return 0;}
  80   //double tr_input()const              //ELEMENT
  81   hp_float_t   tr_involts_limited()const        {unreachable(); return 0;}
  82   //double tr_input_limited()const      //ELEMENT
  83   //double tr_amps()const               //ELEMENT
  84   double   tr_probe_num(const std::string&)const;
  85
  86   void     ac_iwant_matrix();
  87   void     ac_begin();
  88   void     do_ac()      {untested();  assert(subckt());  subckt()->do_ac();}
  89   void     ac_load()    {untested();  assert(subckt());  subckt()->ac_load();}
  90   COMPLEX  ac_involts()const            {unreachable(); return 0.;}
  91   COMPLEX  ac_amps()const               {unreachable(); return 0.;}
  92   XPROBE   ac_probe_ext(const std::string&)const;
  93   void     tt_advance();
  94
  95   std::string port_name(uint_t)const {untested();
  96     incomplete();
  97     return "";
  98   }
  99 public:
 100   static int count()                    {return _count;}
 101 private:
 102   bool     tr_eval_digital();
 103   bool     want_analog()const;
 104   bool     want_digital()const;
 105
 106 private: //debugging
 107   double _tr_last_acc;
 108 };
 109 /*--------------------------------------------------------------------------*/
 110 class MODEL_LOGIC : public MODEL_CARD {
 111 protected:
 112   explicit      MODEL_LOGIC(const MODEL_LOGIC& p);
 113 public:
 114   explicit MODEL_LOGIC(const COMPONENT*);
 115            ~MODEL_LOGIC()               {--_count;}
 116 protected: // override virtuals
 117   std::string   dev_type()const         {return "logic";}
 118   CARD*         clone()const            {return new MODEL_LOGIC(*this);}
 119   void          precalc_first();
 120   void          set_param_by_index(int, std::string&, int);
 121   bool          param_is_printable(int)const;
 122   std::string   param_name(int)const;
 123   std::string   param_name(int,int)const;
 124   std::string   param_value(int)const;
 125   int           param_count()const      {return (13 + MODEL_CARD::param_count());}
 126 public:
 127   static int    count()                 {return _count;}
 128 public:
 129                         /* ----- digital mode ----- */
 130   PARAMETER<double> delay;      /* propagation delay */
 131                         /* -- conversion parameters both ways -- */
 132   PARAMETER<double> vmax;       /* nominal volts for logic 1 */
 133   PARAMETER<double> vmin;       /* nominal volts for logic 0 */
 134   PARAMETER<double> unknown;    /* nominal volts for unknown (bogus) */
 135                         /* ---- D to A conversion ---- */
 136   PARAMETER<double> rise;       /* rise time (time in slope) */
 137   PARAMETER<double> fall;       /* fall time (time in slope) */
 138   PARAMETER<double> rs;         /* series resistance -- strong */
 139   PARAMETER<double> rw;         /* series resistance -- weak */
 140                         /* ---- A to D conversion ---- */
 141   PARAMETER<double> th1;        /* threshold for 1 as fraction of range */
 142   PARAMETER<double> th0;        /* threshold for 0 as fraction of range */
 143                         /* ---- quality judgement parameters ---- */
 144   PARAMETER<double> mr;         /* margin rise - how much worse rise can be */
 145   PARAMETER<double> mf;         /* margin fall - how much worse fall can be */
 146   PARAMETER<double> over;       /* overshoot limit - as fraction of range */
 147 public: // calculated parameters
 148   double range;                 /* vmax - vmin */
 149   double margin; // safety margin for analog transitions. under construction.
 150   intptr_t logic_hash()const {return _hash;}
 151   void hash_logic();
 152 private:
 153   static int _count;
 154   intptr_t _hash;
 155 };
 156 /*--------------------------------------------------------------------------*/
 157 class INTERFACE COMMON_LOGIC : public COMMON_COMPONENT {
 158 protected:
 159   explicit      COMMON_LOGIC(int c=0)
 160     :COMMON_COMPONENT(c), incount(0) {++_count;}
 161   explicit      COMMON_LOGIC(const COMMON_LOGIC& p)
 162     :COMMON_COMPONENT(p), incount(p.incount) {++_count;}
 163 public:
 164                 ~COMMON_LOGIC()                 { --_count; }
 165   bool operator==(const COMMON_COMPONENT&)const;
 166   static  int   count()                         {return _count;}
 167   virtual LOGICVAL logic_eval(const node_t*)const       = 0;
 168 public:
 169   int           incount;
 170 protected:
 171   static int    _count;
 172 };
 173 /*--------------------------------------------------------------------------*/
 174 class LOGIC_AND : public COMMON_LOGIC {
 175 private:
 176   explicit LOGIC_AND(const LOGIC_AND& p) :COMMON_LOGIC(p){++_count;}
 177   COMMON_COMPONENT* clone()const {return new LOGIC_AND(*this);}
 178 public:
 179   explicit LOGIC_AND(int c=0)             :COMMON_LOGIC(c) {}
 180   LOGICVAL logic_eval(const node_t* n)const {
 181     LOGICVAL out(n[0]->lv());
 182     for (int ii=1; ii<incount; ++ii) {untested();
 183       out &= n[ii]->lv();
 184     }
 185     return out;
 186   }
 187   virtual std::string name()const         {return "and";}
 188 };
 189 /*--------------------------------------------------------------------------*/
 190 class LOGIC_NAND : public COMMON_LOGIC {
 191 private:
 192   explicit LOGIC_NAND(const LOGIC_NAND&p):COMMON_LOGIC(p){++_count;}
 193   COMMON_COMPONENT* clone()const {return new LOGIC_NAND(*this);}
 194 public:
 195   explicit LOGIC_NAND(int c=0)            :COMMON_LOGIC(c) {}
 196   LOGICVAL logic_eval(const node_t* n)const {itested();
 197     LOGICVAL out(n[0]->lv());
 198     for (int ii=1; ii<incount; ++ii) {itested();
 199       out &= n[ii]->lv();
 200     }
 201     return ~out;
 202   }
 203   virtual std::string name()const         {itested();return "nand";}
 204 };
 205 /*--------------------------------------------------------------------------*/
 206 class LOGIC_OR : public COMMON_LOGIC {
 207 private:
 208   explicit LOGIC_OR(const LOGIC_OR& p)   :COMMON_LOGIC(p){itested();++_count;}
 209   COMMON_COMPONENT* clone()const {itested(); return new LOGIC_OR(*this);}
 210 public:
 211   explicit LOGIC_OR(int c=0)              :COMMON_LOGIC(c) {itested();}
 212   LOGICVAL logic_eval(const node_t* n)const {itested();
 213     LOGICVAL out(n[0]->lv());
 214     for (int ii=1; ii<incount; ++ii) {itested();
 215       out |= n[ii]->lv();
 216     }
 217     return out;
 218   }
 219   virtual std::string name()const         {itested();return "or";}
 220 };
 221 /*--------------------------------------------------------------------------*/
 222 class LOGIC_NOR : public COMMON_LOGIC {
 223 private:
 224   explicit LOGIC_NOR(const LOGIC_NOR& p) :COMMON_LOGIC(p) {++_count;}
 225   COMMON_COMPONENT* clone()const {return new LOGIC_NOR(*this);}
 226 public:
 227   explicit LOGIC_NOR(int c=0)             :COMMON_LOGIC(c) {}
 228   LOGICVAL logic_eval(const node_t* n)const {
 229     LOGICVAL out(n[0]->lv());
 230     for (int ii=1; ii<incount; ++ii) {
 231       out |= n[ii]->lv();
 232     }
 233     return ~out;
 234   }
 235   virtual std::string name()const         {return "nor";}
 236 };
 237 /*--------------------------------------------------------------------------*/
 238 class LOGIC_XOR : public COMMON_LOGIC {
 239 private:
 240   explicit LOGIC_XOR(const LOGIC_XOR& p) :COMMON_LOGIC(p){untested();++_count;}
 241   COMMON_COMPONENT* clone()const {untested(); return new LOGIC_XOR(*this);}
 242 public:
 243   explicit LOGIC_XOR(int c=0)             :COMMON_LOGIC(c) {untested();}
 244   LOGICVAL logic_eval(const node_t* n)const {untested();
 245     LOGICVAL out(n[0]->lv());
 246     for (int ii=1; ii<incount; ++ii) {untested();
 247       out ^= n[ii]->lv();
 248     }
 249     return out;
 250   }
 251   virtual std::string name()const         {itested();return "xor";}
 252 };
 253 /*--------------------------------------------------------------------------*/
 254 class LOGIC_XNOR : public COMMON_LOGIC {
 255 private:
 256   explicit LOGIC_XNOR(const LOGIC_XNOR&p):COMMON_LOGIC(p){untested();++_count;}
 257   COMMON_COMPONENT* clone()const {untested(); return new LOGIC_XNOR(*this);}
 258 public:
 259   explicit LOGIC_XNOR(int c=0)            :COMMON_LOGIC(c) {untested();}
 260   LOGICVAL logic_eval(const node_t* n)const {untested();
 261     LOGICVAL out(n[0]->lv());
 262     for (int ii=1; ii<incount; ++ii) {untested();
 263       out ^= n[ii]->lv();
 264     }
 265     return ~out;
 266   }
 267   virtual std::string name()const         {itested();return "xnor";}
 268 };
 269 /*--------------------------------------------------------------------------*/
 270 class LOGIC_INV : public COMMON_LOGIC {
 271 private:
 272   explicit LOGIC_INV(const LOGIC_INV& p) :COMMON_LOGIC(p){++_count;}
 273   COMMON_COMPONENT* clone()const        {return new LOGIC_INV(*this);}
 274 public:
 275   explicit LOGIC_INV(int c=0)             :COMMON_LOGIC(c) {}
 276   LOGICVAL logic_eval(const node_t* n)const {
 277     return ~n[0]->lv();
 278   }
 279   virtual std::string name()const         {return "inv";}
 280 };
 281 /*--------------------------------------------------------------------------*/
 282 class LOGIC_NONE : public COMMON_LOGIC {
 283 private:
 284   explicit LOGIC_NONE(const LOGIC_NONE&p):COMMON_LOGIC(p){itested();++_count;}
 285   COMMON_COMPONENT* clone()const {itested(); return new LOGIC_NONE(*this);}
 286 public:
 287   explicit LOGIC_NONE(int c=0)            :COMMON_LOGIC(c) {}
 288   LOGICVAL logic_eval(const node_t*)const {untested();
 289     return lvUNKNOWN;
 290   }
 291   virtual std::string name()const         {untested();return "error";}
 292 };
 293 /*--------------------------------------------------------------------------*/
 294 //extern LOGIC_NONE Default_LOGIC;
 295 /*--------------------------------------------------------------------------*/
 296 #endif
 297 // vim:ts=8:sw=2:noet: