lib/s__init.cc

   1 /*                             -*- C++ -*-
   2  * Copyright (C) 2001 Albert Davis
   3  * Author: Albert Davis <aldavis@gnu.org>
   4  *
   5  * This file is part of "Gnucap", the Gnu Circuit Analysis Package
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 3, or (at your option)
  10  * any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  20  * 02110-1301, USA.
  21  *------------------------------------------------------------------
  22  * initialization (allocation, node mapping, etc)
  23  */
  24 //testing=obsolete
  25 #include "e_cardlist.h"
  26 #include "u_status.h"
  27 #include "u_sim_data.h"
  28 #include "s__.h"
  29 /*--------------------------------------------------------------------------*/
  30 void SIM::command_base(CS& cmd)
  31 {  reset_timers();
  32   _sim->reset_iteration_counter(_sim->_mode);
  33   _sim->reset_iteration_counter(iPRINTSTEP);
  34   try {
  35     setup(cmd);
  36     _sim->init();
  37     CARD_LIST::card_list.precalc_last();
  38
  39     _sim->alloc_vectors();
  40     _sim->_aa.reallocate();
  41     _sim->_aa.dezero(OPT::gmin);
  42     _sim->_aa.set_min_pivot(OPT::pivtol);
  43     _sim->_lu.reallocate();
  44     _sim->_lu.dezero(OPT::gmin);
  45     _sim->_lu.set_min_pivot(OPT::pivtol);
  46     assert(_sim->_nstat);
  47     ::status.set_up.stop();
  48
  49     switch (ENV::run_mode) {
  50     case rPRE_MAIN:     unreachable();  break;
  51     case rPIPE:         untested();
  52     case rBATCH:
  53     case rINTERACTIVE:
  54     case rSCRIPT:       sweep();        break;
  55     case rPRESET:       /*nothing*/     break;
  56     }
  57   }catch (Exception& e) {
  58     error(bDANGER, e.message() + '\n');
  59     _sim->count_iterations(iTOTAL);
  60     _sim->_lu.unallocate();
  61     _sim->_aa.unallocate();
  62   }
  63   _sim->unalloc_vectors();
  64   finish();
  65
  66   ::status.total.stop();
  67 }
  68 /*--------------------------------------------------------------------------*/
  69 SIM::~SIM()
  70 {
  71   if (_sim) {
  72     _sim->uninit();
  73   }else{ untested();
  74   }
  75 }
  76 /*--------------------------------------------------------------------------*/
  77 void SIM::reset_timers()
  78 {
  79   ::status.advance.reset();
  80   ::status.queue.reset();
  81   ::status.evaluate.reset();
  82   ::status.load.reset();
  83   ::status.lud.reset();
  84   ::status.back.reset();
  85   ::status.review.reset();
  86   ::status.accept.reset();
  87   ::status.output.reset();
  88   ::status.aux1.reset();
  89   ::status.aux2.reset();
  90   ::status.aux3.reset();
  91   ::status.set_up.reset().start();
  92   ::status.total.reset().start();
  93 }
  94 /*--------------------------------------------------------------------------*/
  95 bool SIM::common_options(CS& Cmd)
  96 {
  97   string label;
  98   if (Get(Cmd, "label", &label)){
  99     assert(CKT_BASE::_sim);
 100     CKT_BASE::_sim->_label = label;
 101     return true;
 102   }
 103   return false;
 104 }
 105 /*--------------------------------------------------------------------------*/
 106 /*--------------------------------------------------------------------------*/
 107 // vim:ts=8:sw=2:noet: