src/c_save.cc

   1 /*$Id: c_list.cc,v 1.3 2009-12-13 17:55:01 felix Exp $ -*- C++ -*-
   2  * vim:ts=8:sw=2:et
   3  * Copyright (C) 2001 Albert Davis
   4  * Author: Albert Davis <aldavis@gnu.org>
   5  *
   6  * This file is part of "Gnucap", the Gnu Circuit Analysis Package
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 3, or (at your option)
  11  * any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21  * 02110-1301, USA.
  22  *------------------------------------------------------------------
  23  * list and save commands.
  24  * save is list with direction to file
  25  */
  26 //testing=script 2006.07.17
  27 #include "e_cardlist.h"
  28 #include "u_lang.h"
  29 #include "c_comand.h"
  30 #include "globals.h"
  31 #include "e_node.h"
  32 #include <iostream>
  33 #include <fstream>
  34 #include <string>
  35 /*--------------------------------------------------------------------------*/
  36 namespace {
  37 using namespace std;
  38 /*--------------------------------------------------------------------------*/
  39 void volts_load( fstream *in, CARD_LIST* )
  40 {
  41   // fixme. -nan
  42   std::string inss;
  43   double ind;
  44   uint_t i=1;
  45   double Last;
  46   *in >> Last;
  47   trace1("volts_load", Last);
  48   CKT_BASE::_sim->init();
  49   assert(CKT_BASE::_sim->vdc());
  50   CKT_BASE::_sim->_last_Time = Last;
  51   while ( ! (in->eof() ) ){
  52     assert( i< CKT_BASE::_sim->_total_nodes +2 + CKT_BASE::_sim->_adp_nodes );
  53     *in >> skipws;
  54
  55     if( '\n' ==  in->peek()
  56        ||' ' ==  in->peek() ){
  57       in->get();
  58     } else if( 'n' ==  in->peek() ){
  59       *in >> inss >> skipws;
  60       if(inss=="nan"){
  61         trace1(" putting nan ", i);
  62         CKT_BASE::_sim->vdc()[i] = NAN;
  63         i++;
  64       }
  65     } else if(*in >> ind){
  66       *in >> skipws;
  67       trace2(" putting ", i, ind);
  68       CKT_BASE::_sim->vdc()[i] = ind;
  69       ++i;
  70     } else {
  71       //*in >> skipws >> inss;
  72       inss = (char) in->get();
  73       trace1((" garbage ->" + inss + "<- ").c_str(), (int)inss[0]);
  74     }
  75   }
  76 }
  77 /*--------------------------------------------------------------------------*/
  78 void volts_save(CS&, OMSTREAM out, CARD_LIST*)
  79 {
  80   CARD_LIST::card_list.precalc_first();
  81
  82   //out.setfloatwidth(7);
  83   switch (ENV::run_mode) {
  84   case rPRE_MAIN:
  85     unreachable();
  86     return;
  87   case rPRESET:
  88     /* do nothing */
  89     return;
  90   case rPIPE:           untested();
  91   case rBATCH:          itested();
  92   case rINTERACTIVE:    itested();
  93   case rSCRIPT:
  94     /* keep going */
  95     break;
  96   }
  97
  98   if (!OPT::language) {
  99     throw Exception("no language");
 100   }else{
 101   }
 102
 103   if (! CKT_BASE::_sim->_nstat ) return;
 104   trace2( "save",  CKT_BASE::_sim->_total_nodes , CKT_BASE::_sim->_adp_nodes );
 105
 106   out <<  CKT_BASE::_sim->_last_Time << "\n";
 107
 108   for ( uint_t i = 1;  CKT_BASE::_sim->_total_nodes + 1 + CKT_BASE::_sim->_adp_nodes > i ; ++i){
 109     out <<  CKT_BASE::_sim->vdc()[i] << "\n";
 110   }
 111 }
 112 /*--------------------------------------------------------------------------*/
 113 class CMD_LIST : public CMD {
 114 public:
 115   void do_it(CS& cmd, CARD_LIST* Scope)
 116   {
 117     std::string filename;
 118     cmd >> filename;
 119     fstream inFile(filename.c_str());
 120     if (inFile.fail()) {
 121       cerr << "Unable to open " << filename << " for reading." << endl;
 122       return;
 123     }
 124     volts_load(&inFile, Scope);
 125     inFile.close();
 126   }
 127 } p1;
 128 DISPATCHER<CMD>::INSTALL d1(&command_dispatcher, "vload", &p1);
 129 /*--------------------------------------------------------------------------*/
 130 class CMD_SAVE : public CMD {
 131 public:
 132   void do_it(CS& cmd, CARD_LIST* Scope)
 133   {
 134     OMSTREAM out = IO::mstdout;
 135     out.setfloatwidth(30);
 136     out.outset(cmd);
 137     volts_save(cmd, out, Scope);
 138     out.outreset();
 139   }
 140 } p2;
 141 DISPATCHER<CMD>::INSTALL d2(&command_dispatcher, "vdump|vsave", &p2);
 142 /*--------------------------------------------------------------------------*/
 143 }
 144 /*--------------------------------------------------------------------------*/
 145 /*--------------------------------------------------------------------------*/