1 /*******************************************************************************
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 /* Linux PRO/1000 Ethernet Driver main header file */
42 #include <gpxe/malloc.h>
43 #include <gpxe/if_ether.h>
44 #include <gpxe/ethernet.h>
45 #include <gpxe/iobuf.h>
46 #include <gpxe/netdevice.h>
56 /* Supported Rx Buffer Sizes */
57 #define E1000_RXBUFFER_128 128 /* Used for packet split */
58 #define E1000_RXBUFFER_256 256 /* Used for packet split */
59 #define E1000_RXBUFFER_512 512
60 #define E1000_RXBUFFER_1024 1024
61 #define E1000_RXBUFFER_2048 2048
62 #define E1000_RXBUFFER_4096 4096
63 #define E1000_RXBUFFER_8192 8192
64 #define E1000_RXBUFFER_16384 16384
66 /* SmartSpeed delimiters */
67 #define E1000_SMARTSPEED_DOWNSHIFT 3
68 #define E1000_SMARTSPEED_MAX 15
70 /* Packet Buffer allocations */
71 #define E1000_PBA_BYTES_SHIFT 0xA
72 #define E1000_TX_HEAD_ADDR_SHIFT 7
73 #define E1000_PBA_TX_MASK 0xFFFF0000
75 /* Flow Control Watermarks */
76 #define E1000_FC_HIGH_DIFF 0x1638 /* High: 5688 bytes below Rx FIFO size */
77 #define E1000_FC_LOW_DIFF 0x1640 /* Low: 5696 bytes below Rx FIFO size */
79 #define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */
81 /* How many Tx Descriptors do we need to call netif_wake_queue ? */
82 #define E1000_TX_QUEUE_WAKE 16
83 /* How many Rx Buffers do we bundle into one write to the hardware ? */
84 #define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */
86 #define AUTO_ALL_MODES 0
87 #define E1000_EEPROM_82544_APM 0x0004
88 #define E1000_EEPROM_ICH8_APME 0x0004
89 #define E1000_EEPROM_APME 0x0400
91 #ifndef E1000_MASTER_SLAVE
92 /* Switch to override PHY master/slave setting */
93 #define E1000_MASTER_SLAVE e1000_ms_hw_default
96 /* wrapper around a pointer to a socket buffer,
97 * so a DMA handle can be stored along with the buffer */
100 unsigned long time_stamp
;
102 uint16_t next_to_watch
;
105 struct e1000_tx_ring
{
106 /* pointer to the descriptor ring memory */
108 /* length of descriptor ring in bytes */
110 /* number of descriptors in the ring */
112 /* next descriptor to associate a buffer with */
113 unsigned int next_to_use
;
114 /* next descriptor to check for DD status bit */
115 unsigned int next_to_clean
;
116 /* array of buffer information structs */
117 struct e1000_buffer
*buffer_info
;
121 boolean_t last_tx_tso
;
124 struct e1000_rx_ring
{
125 /* pointer to the descriptor ring memory */
127 /* length of descriptor ring in bytes */
129 /* number of descriptors in the ring */
131 /* next descriptor to associate a buffer with */
132 unsigned int next_to_use
;
133 /* next descriptor to check for DD status bit */
134 unsigned int next_to_clean
;
135 /* array of buffer information structs */
136 struct e1000_buffer
*buffer_info
;
137 /* arrays of page information for packet split */
138 struct e1000_ps_page
*ps_page
;
139 struct e1000_ps_page_dma
*ps_page_dma
;
141 /* cpu for rx queue */
148 #define E1000_DESC_UNUSED(R) \
149 ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
150 (R)->next_to_clean - (R)->next_to_use - 1)
152 #define E1000_RX_DESC_PS(R, i) \
153 (&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
154 #define E1000_RX_DESC_EXT(R, i) \
155 (&(((union e1000_rx_desc_extended *)((R).desc))[i]))
156 #define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i]))
157 #define E1000_RX_DESC(R, i) E1000_GET_DESC(R, i, e1000_rx_desc)
158 #define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc)
159 #define E1000_CONTEXT_DESC(R, i) E1000_GET_DESC(R, i, e1000_context_desc)
161 /* board specific private data structure */
163 struct e1000_adapter
{
164 struct vlan_group
*vlgrp
;
165 uint16_t mng_vlan_id
;
167 uint32_t rx_buffer_len
;
172 uint16_t link_duplex
;
174 unsigned int total_tx_bytes
;
175 unsigned int total_tx_packets
;
176 unsigned int total_rx_bytes
;
177 unsigned int total_rx_packets
;
178 /* Interrupt Throttle Rate */
180 uint32_t itr_setting
;
186 unsigned long led_status
;
189 struct e1000_tx_ring
*tx_ring
; /* One per active queue */
190 unsigned int restart_queue
;
191 unsigned long tx_queue_len
;
193 uint32_t tx_int_delay
;
194 uint32_t tx_abs_int_delay
;
199 uint32_t tx_timeout_count
;
200 uint32_t tx_fifo_head
;
201 uint32_t tx_head_addr
;
202 uint32_t tx_fifo_size
;
203 uint8_t tx_timeout_factor
;
204 boolean_t pcix_82544
;
205 boolean_t detect_tx_hung
;
208 boolean_t (*clean_rx
) (struct e1000_adapter
*adapter
,
209 struct e1000_rx_ring
*rx_ring
);
210 void (*alloc_rx_buf
) (struct e1000_adapter
*adapter
,
211 struct e1000_rx_ring
*rx_ring
,
213 struct e1000_rx_ring
*rx_ring
; /* One per active queue */
217 uint64_t hw_csum_err
;
218 uint64_t hw_csum_good
;
219 uint64_t rx_hdr_split
;
220 uint32_t alloc_rx_buff_failed
;
221 uint32_t rx_int_delay
;
222 uint32_t rx_abs_int_delay
;
224 unsigned int rx_ps_pages
;
227 uint16_t rx_ps_bsize0
;
230 /* OS defined structs */
231 struct net_device
*netdev
;
232 struct pci_device
*pdev
;
233 struct net_device_stats net_stats
;
235 /* structs defined in e1000_hw.h */
237 struct e1000_hw_stats stats
;
238 struct e1000_phy_info phy_info
;
239 struct e1000_phy_stats phy_stats
;
242 struct e1000_tx_ring test_tx_ring
;
243 struct e1000_rx_ring test_rx_ring
;
248 /* to not mess up cache alignment, always add to the bottom */
250 boolean_t smart_power_down
; /* phy smart power down */
251 boolean_t quad_port_a
;
255 #define NUM_TX_DESC 8
256 #define NUM_RX_DESC 8
261 struct io_buffer
*tx_iobuf
[NUM_TX_DESC
];
262 struct io_buffer
*rx_iobuf
[NUM_RX_DESC
];
264 struct e1000_tx_desc
*tx_desc
[NUM_TX_DESC
];
265 struct e1000_rx_desc
*rx_desc
[NUM_RX_DESC
];
267 struct e1000_tx_desc
*tx_base
;
268 struct e1000_rx_desc
*rx_base
;
272 uint32_t tx_fill_ctr
;
286 #define E1000_MNG2HOST_PORT_623 (1 << 5)
287 #define E1000_MNG2HOST_PORT_664 (1 << 6)
289 #define E1000_ERT_2048 0x100
291 #define IORESOURCE_IO 0x00000100
292 #define IORESOURCE_MEM 0x00000200
293 #define IORESOURCE_PREFETCH 0x00001000
295 #endif /* _E1000_H_ */