Remove *_fill_nic() calls, and directly set nic->ioaddr and nic->irqno .
[gpxe.git] / src / drivers / net / tulip.c
blob53cfb85f9b0fe9353c31b6fd0cfad4c8993674a5
1 /* -*- Mode:C; c-basic-offset:4; -*- */
3 /*
4 Tulip and clone Etherboot Driver
6 By Marty Connor (mdc@etherboot.org)
7 Copyright (C) 2001 Entity Cyber, Inc.
9 This software may be used and distributed according to the terms
10 of the GNU Public License, incorporated herein by reference.
12 As of April 2001 this driver should support most tulip cards that
13 the Linux tulip driver supports because Donald Becker's Linux media
14 detection code is now included.
16 Based on Ken Yap's Tulip Etherboot Driver and Donald Becker's
17 Linux Tulip Driver. Supports N-Way speed auto-configuration on
18 MX98715, MX98715A and MX98725. Support inexpensive PCI 10/100 cards
19 based on the Macronix MX987x5 chip, such as the SOHOware Fast
20 model SFA110A, and the LinkSYS model LNE100TX. The NetGear
21 model FA310X, based on the LC82C168 chip is supported.
22 The TRENDnet TE100-PCIA NIC which uses a genuine Intel 21143-PD
23 chipset is supported. Also, Davicom DM9102's.
25 Documentation and source code used:
26 Source for Etherboot driver at
27 http://etherboot.sourceforge.net/
28 MX98715A Data Sheet and MX98715A Application Note
29 on http://www.macronix.com/ (PDF format files)
30 Source for Linux tulip driver at
31 http://cesdis.gsfc.nasa.gov/linux/drivers/tulip.html
33 Adapted by Ken Yap from
34 FreeBSD netboot DEC 21143 driver
35 Author: David Sharp
36 date: Nov/98
38 Some code fragments were taken from verious places, Ken Yap's
39 etherboot, FreeBSD's if_de.c, and various Linux related files.
40 DEC's manuals for the 21143 and SROM format were very helpful.
41 The Linux de driver development page has a number of links to
42 useful related information. Have a look at:
43 ftp://cesdis.gsfc.nasa.gov/pub/linux/drivers/tulip-devel.html
46 /*********************************************************************/
47 /* Revision History */
48 /*********************************************************************/
51 08 Feb 2005 Ramesh Chander chhabaramesh at yahoo.co.in added table entries
52 for SGThomson STE10/100A
53 07 Sep 2003 timlegge Multicast Support Added
54 11 Apr 2001 mdc [patch to etherboot 4.7.24]
55 Major rewrite to include Linux tulip driver media detection
56 code. This driver should support a lot more cards now.
57 16 Jul 2000 mdc 0.75b11
58 Added support for ADMtek 0985 Centaur-P, a "Comet" tulip clone
59 which is used on the LinkSYS LNE100TX v4.x cards. We already
60 support LNE100TX v2.0 cards, which use a different controller.
61 04 Jul 2000 jam ?
62 Added test of status after receiving a packet from the card.
63 Also uncommented the tulip_disable routine. Stray packets
64 seemed to be causing problems.
65 27 Apr 2000 njl ?
66 29 Feb 2000 mdc 0.75b7
67 Increased reset delay to 3 seconds because Macronix cards seem to
68 need more reset time before card comes back to a usable state.
69 26 Feb 2000 mdc 0.75b6
70 Added a 1 second delay after initializing the transmitter because
71 some cards seem to need the time or they drop the first packet
72 transmitted.
73 23 Feb 2000 mdc 0.75b5
74 removed udelay code and used currticks() for more reliable delay
75 code in reset pause and sanity timeouts. Added function prototypes
76 and TX debugging code.
77 21 Feb 2000 mdc patch to Etherboot 4.4.3
78 Incorporated patches from Bob Edwards and Paul Mackerras of
79 Linuxcare's OZLabs to deal with inefficiencies in tulip_transmit
80 and udelay. We now wait for packet transmission to complete
81 (or sanity timeout).
82 04 Feb 2000 Robert.Edwards@anu.edu.au patch to Etherboot 4.4.2
83 patch to tulip.c that implements the automatic selection of the MII
84 interface on cards using the Intel/DEC 21143 reference design, in
85 particular, the TRENDnet TE100-PCIA NIC which uses a genuine Intel
86 21143-PD chipset.
87 11 Jan 2000 mdc 0.75b4
88 Added support for NetGear FA310TX card based on the LC82C168
89 chip. This should also support Lite-On LC82C168 boards.
90 Added simple MII support. Re-arranged code to better modularize
91 initializations.
92 04 Dec 1999 mdc 0.75b3
93 Added preliminary support for LNE100TX PCI cards. Should work for
94 PNIC2 cards. No MII support, but single interface (RJ45) tulip
95 cards seem to not care.
96 03 Dec 1999 mdc 0.75b2
97 Renamed from mx987x5 to tulip, merged in original tulip init code
98 from tulip.c to support other tulip compatible cards.
99 02 Dec 1999 mdc 0.75b1
100 Released Beta MX987x5 Driver for code review and testing to netboot
101 and thinguin mailing lists.
105 /*********************************************************************/
106 /* Declarations */
107 /*********************************************************************/
109 #include "etherboot.h"
110 #include "nic.h"
112 #include <gpxe/ethernet.h>
113 #include <gpxe/pci.h>
115 /* User settable parameters */
117 #undef TULIP_DEBUG
118 #undef TULIP_DEBUG_WHERE
119 #ifdef TULIP_DEBUG
120 static int tulip_debug = 2; /* 1 normal messages, 0 quiet .. 7 verbose. */
121 #endif
123 #define TX_TIME_OUT 2*TICKS_PER_SEC
125 /* helpful macros if on a big_endian machine for changing byte order.
126 not strictly needed on Intel */
127 #define get_unaligned(ptr) (*(ptr))
128 #define put_unaligned(val, ptr) ((void)( *(ptr) = (val) ))
129 #define get_u16(ptr) (*(u16 *)(ptr))
130 #define virt_to_le32desc(addr) virt_to_bus(addr)
132 #define TULIP_IOTYPE PCI_USES_MASTER | PCI_USES_IO | PCI_ADDR0
133 #define TULIP_SIZE 0x80
135 /* This is a mysterious value that can be written to CSR11 in the 21040 (only)
136 to support a pre-NWay full-duplex signaling mechanism using short frames.
137 No one knows what it should be, but if left at its default value some
138 10base2(!) packets trigger a full-duplex-request interrupt. */
139 #define FULL_DUPLEX_MAGIC 0x6969
141 static const int csr0 = 0x01A00000 | 0x8000;
143 /* The possible media types that can be set in options[] are: */
144 #define MEDIA_MASK 31
145 static const char * const medianame[32] = {
146 "10baseT", "10base2", "AUI", "100baseTx",
147 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
148 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
149 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
150 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
153 /* This much match tulip_tbl[]! Note 21142 == 21143. */
154 enum tulip_chips {
155 DC21040=0, DC21041=1, DC21140=2, DC21142=3, DC21143=3,
156 LC82C168, MX98713, MX98715, MX98725, AX88141, AX88140, PNIC2, COMET,
157 COMPEX9881, I21145, XIRCOM, SGThomson, /*Ramesh Chander*/
160 enum pci_id_flags_bits {
161 /* Set PCI command register bits before calling probe1(). */
162 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
163 /* Read and map the single following PCI BAR. */
164 PCI_ADDR0=0<<4, PCI_ADDR1=1<<4, PCI_ADDR2=2<<4, PCI_ADDR3=3<<4,
165 PCI_ADDR_64BITS=0x100, PCI_NO_ACPI_WAKE=0x200, PCI_NO_MIN_LATENCY=0x400,
166 PCI_UNUSED_IRQ=0x800,
169 struct pci_id_info {
170 char *name;
171 struct match_info {
172 u32 pci, pci_mask, subsystem, subsystem_mask;
173 u32 revision, revision_mask; /* Only 8 bits. */
174 } id;
175 enum pci_id_flags_bits pci_flags;
176 int io_size; /* Needed for I/O region check or ioremap(). */
177 int drv_flags; /* Driver use, intended as capability flags. */
180 static const struct pci_id_info pci_id_tbl[] = {
181 { "Digital DC21040 Tulip", { 0x00021011, 0xffffffff, 0, 0, 0, 0 },
182 TULIP_IOTYPE, 0x80, DC21040 },
183 { "Digital DC21041 Tulip", { 0x00141011, 0xffffffff, 0, 0, 0, 0 },
184 TULIP_IOTYPE, 0x80, DC21041 },
185 { "Digital DS21140A Tulip", { 0x00091011, 0xffffffff, 0,0, 0x20,0xf0 },
186 TULIP_IOTYPE, 0x80, DC21140 },
187 { "Digital DS21140 Tulip", { 0x00091011, 0xffffffff, 0, 0, 0, 0 },
188 TULIP_IOTYPE, 0x80, DC21140 },
189 { "Digital DS21143 Tulip", { 0x00191011, 0xffffffff, 0,0, 65,0xff },
190 TULIP_IOTYPE, TULIP_SIZE, DC21142 },
191 { "Digital DS21142 Tulip", { 0x00191011, 0xffffffff, 0, 0, 0, 0 },
192 TULIP_IOTYPE, TULIP_SIZE, DC21142 },
193 { "Kingston KNE110tx (PNIC)", { 0x000211AD, 0xffffffff, 0xf0022646, 0xffffffff, 0, 0 },
194 TULIP_IOTYPE, 256, LC82C168 },
195 { "Lite-On 82c168 PNIC", { 0x000211AD, 0xffffffff, 0, 0, 0, 0 },
196 TULIP_IOTYPE, 256, LC82C168 },
197 { "Macronix 98713 PMAC", { 0x051210d9, 0xffffffff, 0, 0, 0, 0 },
198 TULIP_IOTYPE, 256, MX98713 },
199 { "Macronix 98715 PMAC", { 0x053110d9, 0xffffffff, 0, 0, 0, 0 },
200 TULIP_IOTYPE, 256, MX98715 },
201 { "Macronix 98725 PMAC", { 0x053110d9, 0xffffffff, 0, 0, 0, 0 },
202 TULIP_IOTYPE, 256, MX98725 },
203 { "ASIX AX88141", { 0x1400125B, 0xffffffff, 0,0, 0x10, 0xf0 },
204 TULIP_IOTYPE, 128, AX88141 },
205 { "ASIX AX88140", { 0x1400125B, 0xffffffff, 0, 0, 0, 0 },
206 TULIP_IOTYPE, 128, AX88140 },
207 { "Lite-On LC82C115 PNIC-II", { 0xc11511AD, 0xffffffff, 0, 0, 0, 0 },
208 TULIP_IOTYPE, 256, PNIC2 },
209 { "ADMtek AN981 Comet", { 0x09811317, 0xffffffff, 0, 0, 0, 0 },
210 TULIP_IOTYPE, 256, COMET },
211 { "ADMTek AN983 Comet", { 0x12161113, 0xffffffff, 0, 0, 0, 0 },
212 TULIP_IOTYPE, 256, COMET },
213 { "ADMTek Comet AN983b", { 0x95111317, 0xffffffff, 0, 0, 0, 0 },
214 TULIP_IOTYPE, 256, COMET },
215 { "ADMtek Centaur-P", { 0x09851317, 0xffffffff, 0, 0, 0, 0 },
216 TULIP_IOTYPE, 256, COMET },
217 { "ADMtek Centaur-C", { 0x19851317, 0xffffffff, 0, 0, 0, 0 },
218 TULIP_IOTYPE, 256, COMET },
219 { "Compex RL100-TX", { 0x988111F6, 0xffffffff, 0, 0, 0, 0 },
220 TULIP_IOTYPE, 128, COMPEX9881 },
221 { "Intel 21145 Tulip", { 0x00398086, 0xffffffff, 0, 0, 0, 0 },
222 TULIP_IOTYPE, 128, I21145 },
223 { "Xircom Tulip clone", { 0x0003115d, 0xffffffff, 0, 0, 0, 0 },
224 TULIP_IOTYPE, 128, XIRCOM },
225 { "Davicom DM9102", { 0x91021282, 0xffffffff, 0, 0, 0, 0 },
226 TULIP_IOTYPE, 0x80, DC21140 },
227 { "Davicom DM9100", { 0x91001282, 0xffffffff, 0, 0, 0, 0 },
228 TULIP_IOTYPE, 0x80, DC21140 },
229 { "Macronix mxic-98715 (EN1217)", { 0x12171113, 0xffffffff, 0, 0, 0, 0 },
230 TULIP_IOTYPE, 256, MX98715 },
231 { "3Com 3cSOHO100B-TX (ADMtek Centuar)", { 0x930010b7, 0xffffffff, 0, 0, 0, 0 },
232 TULIP_IOTYPE, TULIP_SIZE, COMET },
233 { "SG Thomson STE10/100A", { 0x2774104a, 0xffffffff, 0, 0, 0, 0 },
234 TULIP_IOTYPE, 256, COMET }, /*Ramesh Chander*/
235 { 0, { 0, 0, 0, 0, 0, 0 }, 0, 0, 0 },
238 enum tbl_flag {
239 HAS_MII=1, HAS_MEDIA_TABLE=2, CSR12_IN_SROM=4, ALWAYS_CHECK_MII=8,
240 HAS_PWRDWN=0x10, MC_HASH_ONLY=0x20, /* Hash-only multicast filter. */
241 HAS_PNICNWAY=0x80, HAS_NWAY=0x40, /* Uses internal NWay xcvr. */
242 HAS_INTR_MITIGATION=0x100, IS_ASIX=0x200, HAS_8023X=0x400,
245 /* Note: this table must match enum tulip_chips above. */
246 static struct tulip_chip_table {
247 char *chip_name;
248 int flags;
249 } tulip_tbl[] = {
250 { "Digital DC21040 Tulip", 0},
251 { "Digital DC21041 Tulip", HAS_MEDIA_TABLE | HAS_NWAY },
252 { "Digital DS21140 Tulip", HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM },
253 { "Digital DS21143 Tulip", HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII
254 | HAS_PWRDWN | HAS_NWAY | HAS_INTR_MITIGATION },
255 { "Lite-On 82c168 PNIC", HAS_MII | HAS_PNICNWAY },
256 { "Macronix 98713 PMAC", HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM },
257 { "Macronix 98715 PMAC", HAS_MEDIA_TABLE },
258 { "Macronix 98725 PMAC", HAS_MEDIA_TABLE },
259 { "ASIX AX88140", HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM
260 | MC_HASH_ONLY | IS_ASIX },
261 { "ASIX AX88141", HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY
262 | IS_ASIX },
263 { "Lite-On PNIC-II", HAS_MII | HAS_NWAY | HAS_8023X },
264 { "ADMtek Comet", HAS_MII | MC_HASH_ONLY },
265 { "Compex 9881 PMAC", HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM },
266 { "Intel DS21145 Tulip", HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII
267 | HAS_PWRDWN | HAS_NWAY },
268 { "Xircom tulip work-alike", HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII
269 | HAS_PWRDWN | HAS_NWAY },
270 { "SGThomson STE10/100A", HAS_MII | MC_HASH_ONLY }, /*Ramesh Chander*/
271 { 0, 0 },
274 /* A full-duplex map for media types. */
275 enum MediaIs {
276 MediaIsFD = 1, MediaAlwaysFD=2, MediaIsMII=4, MediaIsFx=8,
277 MediaIs100=16};
279 static const char media_cap[32] =
280 {0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 20,31,0,0, };
281 static u8 t21040_csr13[] = {2,0x0C,8,4, 4,0,0,0, 0,0,0,0, 4,0,0,0};
283 /* 21041 transceiver register settings: 10-T, 10-2, AUI, 10-T, 10T-FD */
284 static u16 t21041_csr13[] = { 0xEF01, 0xEF09, 0xEF09, 0xEF01, 0xEF09, };
285 static u16 t21041_csr14[] = { 0xFFFF, 0xF7FD, 0xF7FD, 0x7F3F, 0x7F3D, };
286 static u16 t21041_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, };
288 /* not used
289 static u16 t21142_csr13[] = { 0x0001, 0x0009, 0x0009, 0x0000, 0x0001, };
291 static u16 t21142_csr14[] = { 0xFFFF, 0x0705, 0x0705, 0x0000, 0x7F3D, };
292 /* not used
293 static u16 t21142_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, };
296 /* Offsets to the Command and Status Registers, "CSRs". All accesses
297 must be longword instructions and quadword aligned. */
298 enum tulip_offsets {
299 CSR0=0, CSR1=0x08, CSR2=0x10, CSR3=0x18, CSR4=0x20, CSR5=0x28,
300 CSR6=0x30, CSR7=0x38, CSR8=0x40, CSR9=0x48, CSR10=0x50, CSR11=0x58,
301 CSR12=0x60, CSR13=0x68, CSR14=0x70, CSR15=0x78, CSR16=0x80, CSR20=0xA0
304 /* The bits in the CSR5 status registers, mostly interrupt sources. */
305 enum status_bits {
306 TimerInt=0x800, TPLnkFail=0x1000, TPLnkPass=0x10,
307 NormalIntr=0x10000, AbnormalIntr=0x8000,
308 RxJabber=0x200, RxDied=0x100, RxNoBuf=0x80, RxIntr=0x40,
309 TxFIFOUnderflow=0x20, TxJabber=0x08, TxNoBuf=0x04, TxDied=0x02, TxIntr=0x01,
312 /* The configuration bits in CSR6. */
313 enum csr6_mode_bits {
314 TxOn=0x2000, RxOn=0x0002, FullDuplex=0x0200,
315 AcceptBroadcast=0x0100, AcceptAllMulticast=0x0080,
316 AcceptAllPhys=0x0040, AcceptRunt=0x0008,
320 enum desc_status_bits {
321 DescOwnded=0x80000000, RxDescFatalErr=0x8000, RxWholePkt=0x0300,
324 struct medialeaf {
325 u8 type;
326 u8 media;
327 unsigned char *leafdata;
330 struct mediatable {
331 u16 defaultmedia;
332 u8 leafcount, csr12dir; /* General purpose pin directions. */
333 unsigned has_mii:1, has_nonmii:1, has_reset:6;
334 u32 csr15dir, csr15val; /* 21143 NWay setting. */
335 struct medialeaf mleaf[0];
338 struct mediainfo {
339 struct mediainfo *next;
340 int info_type;
341 int index;
342 unsigned char *info;
345 /* EEPROM Address width definitions */
346 #define EEPROM_ADDRLEN 6
347 #define EEPROM_SIZE 128 /* 2 << EEPROM_ADDRLEN */
349 /* The EEPROM commands include the alway-set leading bit. */
350 #define EE_WRITE_CMD (5 << addr_len)
351 #define EE_READ_CMD (6 << addr_len)
352 #define EE_ERASE_CMD (7 << addr_len)
354 /* EEPROM_Ctrl bits. */
355 #define EE_SHIFT_CLK 0x02 /* EEPROM shift clock. */
356 #define EE_CS 0x01 /* EEPROM chip select. */
357 #define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */
358 #define EE_WRITE_0 0x01
359 #define EE_WRITE_1 0x05
360 #define EE_DATA_READ 0x08 /* EEPROM chip data out. */
361 #define EE_ENB (0x4800 | EE_CS)
363 /* Delay between EEPROM clock transitions. Even at 33Mhz current PCI
364 implementations don't overrun the EEPROM clock. We add a bus
365 turn-around to insure that this remains true. */
366 #define eeprom_delay() inl(ee_addr)
368 /* Size of transmit and receive buffers */
369 #define BUFLEN 1536
371 /* Ring-wrap flag in length field, use for last ring entry.
372 0x01000000 means chain on buffer2 address,
373 0x02000000 means use the ring start address in CSR2/3.
374 Note: Some work-alike chips do not function correctly in chained mode.
375 The ASIX chip works only in chained mode.
376 Thus we indicate ring mode, but always write the 'next' field for
377 chained mode as well. */
378 #define DESC_RING_WRAP 0x02000000
380 /* transmit and receive descriptor format */
381 struct tulip_rx_desc {
382 volatile u32 status;
383 u32 length;
384 u32 buffer1, buffer2;
387 struct tulip_tx_desc {
388 volatile u32 status;
389 u32 length;
390 u32 buffer1, buffer2;
393 /*********************************************************************/
394 /* Global Storage */
395 /*********************************************************************/
397 static u32 ioaddr;
399 struct tulip_private {
400 int cur_rx;
401 int chip_id; /* index into tulip_tbl[] */
402 int pci_id_idx; /* index into pci_id_tbl[] */
403 int revision;
404 int flags;
405 unsigned short vendor_id; /* PCI card vendor code */
406 unsigned short dev_id; /* PCI card device code */
407 unsigned char ehdr[ETH_HLEN]; /* buffer for ethernet header */
408 const char *nic_name;
409 unsigned int csr0, csr6; /* Current CSR0, CSR6 settings. */
410 unsigned int if_port;
411 unsigned int full_duplex; /* Full-duplex operation requested. */
412 unsigned int full_duplex_lock;
413 unsigned int medialock; /* Do not sense media type. */
414 unsigned int mediasense; /* Media sensing in progress. */
415 unsigned int nway, nwayset; /* 21143 internal NWay. */
416 unsigned int default_port;
417 unsigned char eeprom[EEPROM_SIZE]; /* Serial EEPROM contents. */
418 u8 media_table_storage[(sizeof(struct mediatable) + 32*sizeof(struct medialeaf))];
419 u16 sym_advertise, mii_advertise; /* NWay to-advertise. */
420 struct mediatable *mtable;
421 u16 lpar; /* 21143 Link partner ability. */
422 u16 advertising[4]; /* MII advertise, from SROM table. */
423 signed char phys[4], mii_cnt; /* MII device addresses. */
424 int cur_index; /* Current media index. */
425 int saved_if_port;
428 /* Note: transmit and receive buffers must be longword aligned and
429 longword divisable */
431 #define TX_RING_SIZE 2
432 #define RX_RING_SIZE 4
433 struct {
434 struct tulip_tx_desc tx_ring[TX_RING_SIZE];
435 unsigned char txb[BUFLEN];
436 struct tulip_rx_desc rx_ring[RX_RING_SIZE];
437 unsigned char rxb[RX_RING_SIZE * BUFLEN];
438 struct tulip_private tpx;
439 } tulip_bss __shared __attribute__ ((aligned(4)));
440 #define tx_ring tulip_bss.tx_ring
441 #define txb tulip_bss.txb
442 #define rx_ring tulip_bss.rx_ring
443 #define rxb tulip_bss.rxb
445 static struct tulip_private *tp;
447 /* Known cards that have old-style EEPROMs.
448 Writing this table is described at
449 http://cesdis.gsfc.nasa.gov/linux/drivers/tulip-drivers/tulip-media.html */
450 static struct fixups {
451 char *name;
452 unsigned char addr0, addr1, addr2;
453 u16 newtable[32]; /* Max length below. */
454 } eeprom_fixups[] = {
455 {"Asante", 0, 0, 0x94, {0x1e00, 0x0000, 0x0800, 0x0100, 0x018c,
456 0x0000, 0x0000, 0xe078, 0x0001, 0x0050, 0x0018 }},
457 {"SMC9332DST", 0, 0, 0xC0, { 0x1e00, 0x0000, 0x0800, 0x041f,
458 0x0000, 0x009E, /* 10baseT */
459 0x0004, 0x009E, /* 10baseT-FD */
460 0x0903, 0x006D, /* 100baseTx */
461 0x0905, 0x006D, /* 100baseTx-FD */ }},
462 {"Cogent EM100", 0, 0, 0x92, { 0x1e00, 0x0000, 0x0800, 0x063f,
463 0x0107, 0x8021, /* 100baseFx */
464 0x0108, 0x8021, /* 100baseFx-FD */
465 0x0100, 0x009E, /* 10baseT */
466 0x0104, 0x009E, /* 10baseT-FD */
467 0x0103, 0x006D, /* 100baseTx */
468 0x0105, 0x006D, /* 100baseTx-FD */ }},
469 {"Maxtech NX-110", 0, 0, 0xE8, { 0x1e00, 0x0000, 0x0800, 0x0513,
470 0x1001, 0x009E, /* 10base2, CSR12 0x10*/
471 0x0000, 0x009E, /* 10baseT */
472 0x0004, 0x009E, /* 10baseT-FD */
473 0x0303, 0x006D, /* 100baseTx, CSR12 0x03 */
474 0x0305, 0x006D, /* 100baseTx-FD CSR12 0x03 */}},
475 {"Accton EN1207", 0, 0, 0xE8, { 0x1e00, 0x0000, 0x0800, 0x051F,
476 0x1B01, 0x0000, /* 10base2, CSR12 0x1B */
477 0x0B00, 0x009E, /* 10baseT, CSR12 0x0B */
478 0x0B04, 0x009E, /* 10baseT-FD,CSR12 0x0B */
479 0x1B03, 0x006D, /* 100baseTx, CSR12 0x1B */
480 0x1B05, 0x006D, /* 100baseTx-FD CSR12 0x1B */
482 {0, 0, 0, 0, {}}};
484 static const char * block_name[] = {"21140 non-MII", "21140 MII PHY",
485 "21142 Serial PHY", "21142 MII PHY", "21143 SYM PHY", "21143 reset method"};
488 /*********************************************************************/
489 /* Function Prototypes */
490 /*********************************************************************/
491 static int mdio_read(struct nic *nic, int phy_id, int location);
492 static void mdio_write(struct nic *nic, int phy_id, int location, int value);
493 static int read_eeprom(unsigned long ioaddr, int location, int addr_len);
494 static void parse_eeprom(struct nic *nic);
495 static int tulip_probe(struct nic *nic,struct pci_device *pci);
496 static void tulip_init_ring(struct nic *nic);
497 static void tulip_reset(struct nic *nic);
498 static void tulip_transmit(struct nic *nic, const char *d, unsigned int t,
499 unsigned int s, const char *p);
500 static int tulip_poll(struct nic *nic, int retrieve);
501 static void tulip_disable(struct nic *nic);
502 static void nway_start(struct nic *nic);
503 static void pnic_do_nway(struct nic *nic);
504 static void select_media(struct nic *nic, int startup);
505 static void init_media(struct nic *nic);
506 static void start_link(struct nic *nic);
507 static int tulip_check_duplex(struct nic *nic);
509 static void tulip_wait(unsigned int nticks);
511 #ifdef TULIP_DEBUG_WHERE
512 static void whereami(const char *str);
513 #endif
515 #ifdef TULIP_DEBUG
516 static void tulip_more(void);
517 #endif
520 /*********************************************************************/
521 /* Utility Routines */
522 /*********************************************************************/
524 #ifdef TULIP_DEBUG_WHERE
525 static void whereami (const char *str, struct pci_device *pci)
527 printf("%s: %s\n", tp->nic_name, str);
528 /* sleep(2); */
530 #endif
532 #ifdef TULIP_DEBUG
533 static void tulip_more(void)
535 printf("\n\n-- more --");
536 while (!iskey())
537 /* wait */;
538 getchar();
539 printf("\n\n");
541 #endif /* TULIP_DEBUG */
543 static void tulip_wait(unsigned int nticks)
545 unsigned int to = currticks() + nticks;
546 while (currticks() < to)
547 /* wait */ ;
551 /*********************************************************************/
552 /* Media Descriptor Code */
553 /*********************************************************************/
555 /* MII transceiver control section.
556 Read and write the MII registers using software-generated serial
557 MDIO protocol. See the MII specifications or DP83840A data sheet
558 for details. */
560 /* The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
561 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
562 "overclocking" issues or future 66Mhz PCI. */
563 #define mdio_delay() inl(mdio_addr)
565 /* Read and write the MII registers using software-generated serial
566 MDIO protocol. It is just different enough from the EEPROM protocol
567 to not share code. The maxium data clock rate is 2.5 Mhz. */
568 #define MDIO_SHIFT_CLK 0x10000
569 #define MDIO_DATA_WRITE0 0x00000
570 #define MDIO_DATA_WRITE1 0x20000
571 #define MDIO_ENB 0x00000 /* Ignore the 0x02000 databook setting. */
572 #define MDIO_ENB_IN 0x40000
573 #define MDIO_DATA_READ 0x80000
575 /* MII transceiver control section.
576 Read and write the MII registers using software-generated serial
577 MDIO protocol. See the MII specifications or DP83840A data sheet
578 for details. */
580 int mdio_read(struct nic *nic __unused, int phy_id, int location)
582 int i;
583 int read_cmd = (0xf6 << 10) | (phy_id << 5) | location;
584 int retval = 0;
585 long mdio_addr = ioaddr + CSR9;
587 #ifdef TULIP_DEBUG_WHERE
588 whereami("mdio_read\n");
589 #endif
591 if (tp->chip_id == LC82C168) {
592 int i = 1000;
593 outl(0x60020000 + (phy_id<<23) + (location<<18), ioaddr + 0xA0);
594 inl(ioaddr + 0xA0);
595 inl(ioaddr + 0xA0);
596 while (--i > 0)
597 if ( ! ((retval = inl(ioaddr + 0xA0)) & 0x80000000))
598 return retval & 0xffff;
599 return 0xffff;
602 if (tp->chip_id == COMET) {
603 if (phy_id == 1) {
604 if (location < 7)
605 return inl(ioaddr + 0xB4 + (location<<2));
606 else if (location == 17)
607 return inl(ioaddr + 0xD0);
608 else if (location >= 29 && location <= 31)
609 return inl(ioaddr + 0xD4 + ((location-29)<<2));
611 return 0xffff;
614 /* Establish sync by sending at least 32 logic ones. */
615 for (i = 32; i >= 0; i--) {
616 outl(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr);
617 mdio_delay();
618 outl(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
619 mdio_delay();
621 /* Shift the read command bits out. */
622 for (i = 15; i >= 0; i--) {
623 int dataval = (read_cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;
625 outl(MDIO_ENB | dataval, mdio_addr);
626 mdio_delay();
627 outl(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr);
628 mdio_delay();
630 /* Read the two transition, 16 data, and wire-idle bits. */
631 for (i = 19; i > 0; i--) {
632 outl(MDIO_ENB_IN, mdio_addr);
633 mdio_delay();
634 retval = (retval << 1) | ((inl(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
635 outl(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
636 mdio_delay();
638 return (retval>>1) & 0xffff;
641 void mdio_write(struct nic *nic __unused, int phy_id, int location, int value)
643 int i;
644 int cmd = (0x5002 << 16) | (phy_id << 23) | (location<<18) | value;
645 long mdio_addr = ioaddr + CSR9;
647 #ifdef TULIP_DEBUG_WHERE
648 whereami("mdio_write\n");
649 #endif
651 if (tp->chip_id == LC82C168) {
652 int i = 1000;
653 outl(cmd, ioaddr + 0xA0);
655 if ( ! (inl(ioaddr + 0xA0) & 0x80000000))
656 break;
657 while (--i > 0);
658 return;
661 if (tp->chip_id == COMET) {
662 if (phy_id != 1)
663 return;
664 if (location < 7)
665 outl(value, ioaddr + 0xB4 + (location<<2));
666 else if (location == 17)
667 outl(value, ioaddr + 0xD0);
668 else if (location >= 29 && location <= 31)
669 outl(value, ioaddr + 0xD4 + ((location-29)<<2));
670 return;
673 /* Establish sync by sending 32 logic ones. */
674 for (i = 32; i >= 0; i--) {
675 outl(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr);
676 mdio_delay();
677 outl(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
678 mdio_delay();
680 /* Shift the command bits out. */
681 for (i = 31; i >= 0; i--) {
682 int dataval = (cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;
683 outl(MDIO_ENB | dataval, mdio_addr);
684 mdio_delay();
685 outl(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr);
686 mdio_delay();
688 /* Clear out extra bits. */
689 for (i = 2; i > 0; i--) {
690 outl(MDIO_ENB_IN, mdio_addr);
691 mdio_delay();
692 outl(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
693 mdio_delay();
698 /*********************************************************************/
699 /* EEPROM Reading Code */
700 /*********************************************************************/
701 /* EEPROM routines adapted from the Linux Tulip Code */
702 /* Reading a serial EEPROM is a "bit" grungy, but we work our way
703 through:->.
705 static int read_eeprom(unsigned long ioaddr, int location, int addr_len)
707 int i;
708 unsigned short retval = 0;
709 long ee_addr = ioaddr + CSR9;
710 int read_cmd = location | EE_READ_CMD;
712 #ifdef TULIP_DEBUG_WHERE
713 whereami("read_eeprom\n");
714 #endif
716 outl(EE_ENB & ~EE_CS, ee_addr);
717 outl(EE_ENB, ee_addr);
719 /* Shift the read command bits out. */
720 for (i = 4 + addr_len; i >= 0; i--) {
721 short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
722 outl(EE_ENB | dataval, ee_addr);
723 eeprom_delay();
724 outl(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
725 eeprom_delay();
727 outl(EE_ENB, ee_addr);
729 for (i = 16; i > 0; i--) {
730 outl(EE_ENB | EE_SHIFT_CLK, ee_addr);
731 eeprom_delay();
732 retval = (retval << 1) | ((inl(ee_addr) & EE_DATA_READ) ? 1 : 0);
733 outl(EE_ENB, ee_addr);
734 eeprom_delay();
737 /* Terminate the EEPROM access. */
738 outl(EE_ENB & ~EE_CS, ee_addr);
739 return retval;
743 /*********************************************************************/
744 /* EEPROM Parsing Code */
745 /*********************************************************************/
746 static void parse_eeprom(struct nic *nic)
748 unsigned char *p, *ee_data = tp->eeprom;
749 int new_advertise = 0;
750 int i;
752 #ifdef TULIP_DEBUG_WHERE
753 whereami("parse_eeprom\n");
754 #endif
756 tp->mtable = 0;
757 /* Detect an old-style (SA only) EEPROM layout:
758 memcmp(ee_data, ee_data+16, 8). */
759 for (i = 0; i < 8; i ++)
760 if (ee_data[i] != ee_data[16+i])
761 break;
762 if (i >= 8) {
763 /* Do a fix-up based on the vendor half of the station address. */
764 for (i = 0; eeprom_fixups[i].name; i++) {
765 if (nic->node_addr[0] == eeprom_fixups[i].addr0
766 && nic->node_addr[1] == eeprom_fixups[i].addr1
767 && nic->node_addr[2] == eeprom_fixups[i].addr2) {
768 if (nic->node_addr[2] == 0xE8 && ee_data[0x1a] == 0x55)
769 i++; /* An Accton EN1207, not an outlaw Maxtech. */
770 memcpy(ee_data + 26, eeprom_fixups[i].newtable,
771 sizeof(eeprom_fixups[i].newtable));
772 #ifdef TULIP_DEBUG
773 printf("%s: Old format EEPROM on '%s' board.\n%s: Using substitute media control info.\n",
774 tp->nic_name, eeprom_fixups[i].name, tp->nic_name);
775 #endif
776 break;
779 if (eeprom_fixups[i].name == NULL) { /* No fixup found. */
780 #ifdef TULIP_DEBUG
781 printf("%s: Old style EEPROM with no media selection information.\n",
782 tp->nic_name);
783 #endif
784 return;
788 if (ee_data[19] > 1) {
789 #ifdef TULIP_DEBUG
790 printf("%s: Multiport cards (%d ports) may not work correctly.\n",
791 tp->nic_name, ee_data[19]);
792 #endif
795 p = (void *)ee_data + ee_data[27];
797 if (ee_data[27] == 0) { /* No valid media table. */
798 #ifdef TULIP_DEBUG
799 if (tulip_debug > 1) {
800 printf("%s: No Valid Media Table. ee_data[27] = %hhX\n",
801 tp->nic_name, ee_data[27]);
803 #endif
804 } else if (tp->chip_id == DC21041) {
805 int media = get_u16(p);
806 int count = p[2];
807 p += 3;
809 printf("%s: 21041 Media table, default media %hX (%s).\n",
810 tp->nic_name, media,
811 media & 0x0800 ? "Autosense" : medianame[media & 15]);
812 for (i = 0; i < count; i++) {
813 unsigned char media_block = *p++;
814 int media_code = media_block & MEDIA_MASK;
815 if (media_block & 0x40)
816 p += 6;
817 switch(media_code) {
818 case 0: new_advertise |= 0x0020; break;
819 case 4: new_advertise |= 0x0040; break;
821 printf("%s: 21041 media #%d, %s.\n",
822 tp->nic_name, media_code, medianame[media_code]);
824 } else {
825 unsigned char csr12dir = 0;
826 int count;
827 struct mediatable *mtable;
828 u16 media = get_u16(p);
830 p += 2;
831 if (tp->flags & CSR12_IN_SROM)
832 csr12dir = *p++;
833 count = *p++;
835 tp->mtable = mtable = (struct mediatable *)&tp->media_table_storage[0];
837 mtable->defaultmedia = media;
838 mtable->leafcount = count;
839 mtable->csr12dir = csr12dir;
840 mtable->has_nonmii = mtable->has_mii = mtable->has_reset = 0;
841 mtable->csr15dir = mtable->csr15val = 0;
843 printf("%s: EEPROM default media type %s.\n", tp->nic_name,
844 media & 0x0800 ? "Autosense" : medianame[media & MEDIA_MASK]);
846 for (i = 0; i < count; i++) {
847 struct medialeaf *leaf = &mtable->mleaf[i];
849 if ((p[0] & 0x80) == 0) { /* 21140 Compact block. */
850 leaf->type = 0;
851 leaf->media = p[0] & 0x3f;
852 leaf->leafdata = p;
853 if ((p[2] & 0x61) == 0x01) /* Bogus, but Znyx boards do it. */
854 mtable->has_mii = 1;
855 p += 4;
856 } else {
857 switch(leaf->type = p[1]) {
858 case 5:
859 mtable->has_reset = i;
860 leaf->media = p[2] & 0x0f;
861 break;
862 case 1: case 3:
863 mtable->has_mii = 1;
864 leaf->media = 11;
865 break;
866 case 2:
867 if ((p[2] & 0x3f) == 0) {
868 u32 base15 = (p[2] & 0x40) ? get_u16(p + 7) : 0x0008;
869 u16 *p1 = (u16 *)(p + (p[2] & 0x40 ? 9 : 3));
870 mtable->csr15dir = (get_unaligned(p1 + 0)<<16) + base15;
871 mtable->csr15val = (get_unaligned(p1 + 1)<<16) + base15;
873 /* Fall through. */
874 case 0: case 4:
875 mtable->has_nonmii = 1;
876 leaf->media = p[2] & MEDIA_MASK;
877 switch (leaf->media) {
878 case 0: new_advertise |= 0x0020; break;
879 case 4: new_advertise |= 0x0040; break;
880 case 3: new_advertise |= 0x0080; break;
881 case 5: new_advertise |= 0x0100; break;
882 case 6: new_advertise |= 0x0200; break;
884 break;
885 default:
886 leaf->media = 19;
888 leaf->leafdata = p + 2;
889 p += (p[0] & 0x3f) + 1;
891 #ifdef TULIP_DEBUG
892 if (tulip_debug > 1 && leaf->media == 11) {
893 unsigned char *bp = leaf->leafdata;
894 printf("%s: MII interface PHY %d, setup/reset sequences %d/%d long, capabilities %hhX %hhX.\n",
895 tp->nic_name, bp[0], bp[1], bp[2 + bp[1]*2],
896 bp[5 + bp[2 + bp[1]*2]*2], bp[4 + bp[2 + bp[1]*2]*2]);
898 #endif
899 printf("%s: Index #%d - Media %s (#%d) described "
900 "by a %s (%d) block.\n",
901 tp->nic_name, i, medianame[leaf->media], leaf->media,
902 leaf->type < 6 ? block_name[leaf->type] : "UNKNOWN",
903 leaf->type);
905 if (new_advertise)
906 tp->sym_advertise = new_advertise;
911 /*********************************************************************/
912 /* tulip_init_ring - setup the tx and rx descriptors */
913 /*********************************************************************/
914 static void tulip_init_ring(struct nic *nic __unused)
916 int i;
918 #ifdef TULIP_DEBUG_WHERE
919 whereami("tulip_init_ring\n");
920 #endif
922 tp->cur_rx = 0;
924 for (i = 0; i < RX_RING_SIZE; i++) {
925 rx_ring[i].status = cpu_to_le32(0x80000000);
926 rx_ring[i].length = cpu_to_le32(BUFLEN);
927 rx_ring[i].buffer1 = virt_to_le32desc(&rxb[i * BUFLEN]);
928 rx_ring[i].buffer2 = virt_to_le32desc(&rx_ring[i+1]);
930 /* Mark the last entry as wrapping the ring. */
931 rx_ring[i-1].length = cpu_to_le32(DESC_RING_WRAP | BUFLEN);
932 rx_ring[i-1].buffer2 = virt_to_le32desc(&rx_ring[0]);
934 /* We only use 1 transmit buffer, but we use 2 descriptors so
935 transmit engines have somewhere to point to if they feel the need */
937 tx_ring[0].status = 0x00000000;
938 tx_ring[0].buffer1 = virt_to_le32desc(&txb[0]);
939 tx_ring[0].buffer2 = virt_to_le32desc(&tx_ring[1]);
941 /* this descriptor should never get used, since it will never be owned
942 by the machine (status will always == 0) */
943 tx_ring[1].status = 0x00000000;
944 tx_ring[1].buffer1 = virt_to_le32desc(&txb[0]);
945 tx_ring[1].buffer2 = virt_to_le32desc(&tx_ring[0]);
947 /* Mark the last entry as wrapping the ring, though this should never happen */
948 tx_ring[1].length = cpu_to_le32(DESC_RING_WRAP | BUFLEN);
952 static void set_rx_mode(struct nic *nic __unused) {
953 int csr6 = inl(ioaddr + CSR6) & ~0x00D5;
955 tp->csr6 &= ~0x00D5;
957 /* !IFF_PROMISC */
958 tp->csr6 |= AcceptAllMulticast;
959 csr6 |= AcceptAllMulticast;
961 outl(csr6, ioaddr + CSR6);
967 /*********************************************************************/
968 /* eth_reset - Reset adapter */
969 /*********************************************************************/
970 static void tulip_reset(struct nic *nic)
972 int i;
973 unsigned long to;
975 #ifdef TULIP_DEBUG_WHERE
976 whereami("tulip_reset\n");
977 #endif
979 /* Stop Tx and RX */
980 outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6);
982 /* On some chip revs we must set the MII/SYM port before the reset!? */
983 if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii)) {
984 outl(0x814C0000, ioaddr + CSR6);
987 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
988 outl(0x00000001, ioaddr + CSR0);
989 tulip_wait(1);
991 /* turn off reset and set cache align=16lword, burst=unlimit */
992 outl(tp->csr0, ioaddr + CSR0);
994 /* Wait the specified 50 PCI cycles after a reset */
995 tulip_wait(1);
997 /* set up transmit and receive descriptors */
998 tulip_init_ring(nic);
1000 if (tp->chip_id == PNIC2) {
1001 u32 addr_high = (nic->node_addr[1]<<8) + (nic->node_addr[0]<<0);
1002 /* This address setting does not appear to impact chip operation?? */
1003 outl((nic->node_addr[5]<<8) + nic->node_addr[4] +
1004 (nic->node_addr[3]<<24) + (nic->node_addr[2]<<16),
1005 ioaddr + 0xB0);
1006 outl(addr_high + (addr_high<<16), ioaddr + 0xB8);
1009 /* MC_HASH_ONLY boards don't support setup packets */
1010 if (tp->flags & MC_HASH_ONLY) {
1011 u32 addr_low = cpu_to_le32(get_unaligned((u32 *)nic->node_addr));
1012 u32 addr_high = cpu_to_le32(get_unaligned((u16 *)(nic->node_addr+4)));
1014 /* clear multicast hash filters and setup MAC address filters */
1015 if (tp->flags & IS_ASIX) {
1016 outl(0, ioaddr + CSR13);
1017 outl(addr_low, ioaddr + CSR14);
1018 outl(1, ioaddr + CSR13);
1019 outl(addr_high, ioaddr + CSR14);
1020 outl(2, ioaddr + CSR13);
1021 outl(0, ioaddr + CSR14);
1022 outl(3, ioaddr + CSR13);
1023 outl(0, ioaddr + CSR14);
1024 } else if (tp->chip_id == COMET) {
1025 outl(addr_low, ioaddr + 0xA4);
1026 outl(addr_high, ioaddr + 0xA8);
1027 outl(0, ioaddr + 0xAC);
1028 outl(0, ioaddr + 0xB0);
1030 } else {
1031 /* for other boards we send a setup packet to initialize
1032 the filters */
1033 u32 tx_flags = 0x08000000 | 192;
1035 /* construct perfect filter frame with mac address as first match
1036 and broadcast address for all others */
1037 for (i=0; i<192; i++)
1038 txb[i] = 0xFF;
1039 txb[0] = nic->node_addr[0];
1040 txb[1] = nic->node_addr[1];
1041 txb[4] = nic->node_addr[2];
1042 txb[5] = nic->node_addr[3];
1043 txb[8] = nic->node_addr[4];
1044 txb[9] = nic->node_addr[5];
1046 tx_ring[0].length = cpu_to_le32(tx_flags);
1047 tx_ring[0].buffer1 = virt_to_le32desc(&txb[0]);
1048 tx_ring[0].status = cpu_to_le32(0x80000000);
1051 /* Point to rx and tx descriptors */
1052 outl(virt_to_le32desc(&rx_ring[0]), ioaddr + CSR3);
1053 outl(virt_to_le32desc(&tx_ring[0]), ioaddr + CSR4);
1055 init_media(nic);
1057 /* set the chip's operating mode (but don't turn on xmit and recv yet) */
1058 outl((tp->csr6 & ~0x00002002), ioaddr + CSR6);
1060 /* send setup packet for cards that support it */
1061 if (!(tp->flags & MC_HASH_ONLY)) {
1062 /* enable transmit wait for completion */
1063 outl(tp->csr6 | 0x00002000, ioaddr + CSR6);
1064 /* immediate transmit demand */
1065 outl(0, ioaddr + CSR1);
1067 to = currticks() + TX_TIME_OUT;
1068 while ((tx_ring[0].status & 0x80000000) && (currticks() < to))
1069 /* wait */ ;
1071 if (currticks() >= to) {
1072 printf ("%s: TX Setup Timeout.\n", tp->nic_name);
1076 if (tp->chip_id == LC82C168)
1077 tulip_check_duplex(nic);
1079 set_rx_mode(nic);
1081 /* enable transmit and receive */
1082 outl(tp->csr6 | 0x00002002, ioaddr + CSR6);
1086 /*********************************************************************/
1087 /* eth_transmit - Transmit a frame */
1088 /*********************************************************************/
1089 static void tulip_transmit(struct nic *nic, const char *d, unsigned int t,
1090 unsigned int s, const char *p)
1092 u16 nstype;
1093 u32 to;
1094 u32 csr6 = inl(ioaddr + CSR6);
1096 #ifdef TULIP_DEBUG_WHERE
1097 whereami("tulip_transmit\n");
1098 #endif
1100 /* Disable Tx */
1101 outl(csr6 & ~0x00002000, ioaddr + CSR6);
1103 memcpy(txb, d, ETH_ALEN);
1104 memcpy(txb + ETH_ALEN, nic->node_addr, ETH_ALEN);
1105 nstype = htons((u16) t);
1106 memcpy(txb + 2 * ETH_ALEN, (u8 *)&nstype, 2);
1107 memcpy(txb + ETH_HLEN, p, s);
1109 s += ETH_HLEN;
1110 s &= 0x0FFF;
1112 /* pad to minimum packet size */
1113 while (s < ETH_ZLEN)
1114 txb[s++] = '\0';
1116 #ifdef TULIP_DEBUG
1117 if (tulip_debug > 1)
1118 printf("%s: sending %d bytes ethtype %hX\n", tp->nic_name, s, t);
1119 #endif
1121 /* setup the transmit descriptor */
1122 /* 0x60000000 = no interrupt on completion */
1123 tx_ring[0].length = cpu_to_le32(0x60000000 | s);
1124 tx_ring[0].status = cpu_to_le32(0x80000000);
1126 /* Point to transmit descriptor */
1127 outl(virt_to_le32desc(&tx_ring[0]), ioaddr + CSR4);
1129 /* Enable Tx */
1130 outl(csr6 | 0x00002000, ioaddr + CSR6);
1131 /* immediate transmit demand */
1132 outl(0, ioaddr + CSR1);
1134 to = currticks() + TX_TIME_OUT;
1135 while ((tx_ring[0].status & 0x80000000) && (currticks() < to))
1136 /* wait */ ;
1138 if (currticks() >= to) {
1139 printf ("TX Timeout!\n");
1142 /* Disable Tx */
1143 outl(csr6 & ~0x00002000, ioaddr + CSR6);
1146 /*********************************************************************/
1147 /* eth_poll - Wait for a frame */
1148 /*********************************************************************/
1149 static int tulip_poll(struct nic *nic, int retrieve)
1152 #ifdef TULIP_DEBUG_WHERE
1153 whereami("tulip_poll\n");
1154 #endif
1156 /* no packet waiting. packet still owned by NIC */
1157 if (rx_ring[tp->cur_rx].status & 0x80000000)
1158 return 0;
1160 if ( ! retrieve ) return 1;
1162 #ifdef TULIP_DEBUG_WHERE
1163 whereami("tulip_poll got one\n");
1164 #endif
1166 nic->packetlen = (rx_ring[tp->cur_rx].status & 0x3FFF0000) >> 16;
1168 /* if we get a corrupted packet. throw it away and move on */
1169 if (rx_ring[tp->cur_rx].status & 0x00008000) {
1170 /* return the descriptor and buffer to receive ring */
1171 rx_ring[tp->cur_rx].status = 0x80000000;
1172 tp->cur_rx = (++tp->cur_rx) % RX_RING_SIZE;
1173 return 0;
1176 /* copy packet to working buffer */
1177 memcpy(nic->packet, rxb + tp->cur_rx * BUFLEN, nic->packetlen);
1179 /* return the descriptor and buffer to receive ring */
1180 rx_ring[tp->cur_rx].status = 0x80000000;
1181 tp->cur_rx = (++tp->cur_rx) % RX_RING_SIZE;
1183 return 1;
1186 /*********************************************************************/
1187 /* eth_disable - Disable the interface */
1188 /*********************************************************************/
1189 static void tulip_disable ( struct nic *nic ) {
1191 #ifdef TULIP_DEBUG_WHERE
1192 whereami("tulip_disable\n");
1193 #endif
1195 tulip_reset(nic);
1197 /* disable interrupts */
1198 outl(0x00000000, ioaddr + CSR7);
1200 /* Stop the chip's Tx and Rx processes. */
1201 outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6);
1203 /* Clear the missed-packet counter. */
1204 (volatile unsigned long)inl(ioaddr + CSR8);
1207 /*********************************************************************/
1208 /*IRQ - Enable, Disable, or Force interrupts */
1209 /*********************************************************************/
1210 static void tulip_irq(struct nic *nic __unused, irq_action_t action __unused)
1212 switch ( action ) {
1213 case DISABLE :
1214 break;
1215 case ENABLE :
1216 break;
1217 case FORCE :
1218 break;
1222 static struct nic_operations tulip_operations = {
1223 .connect = dummy_connect,
1224 .poll = tulip_poll,
1225 .transmit = tulip_transmit,
1226 .irq = tulip_irq,
1230 /*********************************************************************/
1231 /* eth_probe - Look for an adapter */
1232 /*********************************************************************/
1233 static int tulip_probe ( struct nic *nic, struct pci_device *pci ) {
1235 u32 i;
1236 u8 chip_rev;
1237 u8 ee_data[EEPROM_SIZE];
1238 unsigned short sum;
1239 int chip_idx;
1240 static unsigned char last_phys_addr[ETH_ALEN] = {0x00, 'L', 'i', 'n', 'u', 'x'};
1242 if (pci->ioaddr == 0)
1243 return 0;
1245 ioaddr = pci->ioaddr;
1246 nic->ioaddr = pci->ioaddr & ~3;
1247 nic->irqno = 0;
1249 /* point to private storage */
1250 tp = &tulip_bss.tpx;
1252 tp->vendor_id = pci->vendor;
1253 tp->dev_id = pci->device;
1254 tp->nic_name = pci->driver_name;
1256 tp->if_port = 0;
1257 tp->default_port = 0;
1259 adjust_pci_device(pci);
1261 /* disable interrupts */
1262 outl(0x00000000, ioaddr + CSR7);
1264 /* Stop the chip's Tx and Rx processes. */
1265 outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6);
1267 /* Clear the missed-packet counter. */
1268 (volatile unsigned long)inl(ioaddr + CSR8);
1270 printf("\n"); /* so we start on a fresh line */
1271 #ifdef TULIP_DEBUG_WHERE
1272 whereami("tulip_probe\n");
1273 #endif
1275 #ifdef TULIP_DEBUG
1276 if (tulip_debug > 1)
1277 printf ("%s: Looking for Tulip Chip: Vendor=%hX Device=%hX\n", tp->nic_name,
1278 tp->vendor, tp->dev_id);
1279 #endif
1281 /* Figure out which chip we're dealing with */
1282 i = 0;
1283 chip_idx = -1;
1285 while (pci_id_tbl[i].name) {
1286 if ( (((u32) tp->dev_id << 16) | tp->vendor_id) ==
1287 (pci_id_tbl[i].id.pci & pci_id_tbl[i].id.pci_mask) ) {
1288 chip_idx = pci_id_tbl[i].drv_flags;
1289 break;
1291 i++;
1294 if (chip_idx == -1) {
1295 printf ("%s: Unknown Tulip Chip: Vendor=%hX Device=%hX\n", tp->nic_name,
1296 tp->vendor_id, tp->dev_id);
1297 return 0;
1300 tp->pci_id_idx = i;
1301 tp->flags = tulip_tbl[chip_idx].flags;
1303 #ifdef TULIP_DEBUG
1304 if (tulip_debug > 1) {
1305 printf ("%s: tp->pci_id_idx == %d, name == %s\n", tp->nic_name,
1306 tp->pci_id_idx, pci_id_tbl[tp->pci_id_idx].name);
1307 printf ("%s: chip_idx == %d, name == %s\n", tp->nic_name, chip_idx,
1308 tulip_tbl[chip_idx].chip_name);
1310 #endif
1312 /* Bring the 21041/21143 out of sleep mode.
1313 Caution: Snooze mode does not work with some boards! */
1314 if (tp->flags & HAS_PWRDWN)
1315 pci_write_config_dword(pci, 0x40, 0x00000000);
1317 if (inl(ioaddr + CSR5) == 0xFFFFFFFF) {
1318 printf("%s: The Tulip chip at %X is not functioning.\n",
1319 tp->nic_name, (unsigned int) ioaddr);
1320 return 0;
1323 pci_read_config_byte(pci, PCI_REVISION, &chip_rev);
1325 printf("%s: [chip: %s] rev %d at %hX\n", tp->nic_name,
1326 tulip_tbl[chip_idx].chip_name, chip_rev, (unsigned int) ioaddr);
1327 printf("%s: Vendor=%hX Device=%hX", tp->nic_name, tp->vendor_id, tp->dev_id);
1329 if (chip_idx == DC21041 && inl(ioaddr + CSR9) & 0x8000) {
1330 printf(" 21040 compatible mode.");
1331 chip_idx = DC21040;
1334 printf("\n");
1336 /* The SROM/EEPROM interface varies dramatically. */
1337 sum = 0;
1338 if (chip_idx == DC21040) {
1339 outl(0, ioaddr + CSR9); /* Reset the pointer with a dummy write. */
1340 for (i = 0; i < ETH_ALEN; i++) {
1341 int value, boguscnt = 100000;
1343 value = inl(ioaddr + CSR9);
1344 while (value < 0 && --boguscnt > 0);
1345 nic->node_addr[i] = value;
1346 sum += value & 0xff;
1348 } else if (chip_idx == LC82C168) {
1349 for (i = 0; i < 3; i++) {
1350 int value, boguscnt = 100000;
1351 outl(0x600 | i, ioaddr + 0x98);
1353 value = inl(ioaddr + CSR9);
1354 while (value < 0 && --boguscnt > 0);
1355 put_unaligned(le16_to_cpu(value), ((u16*)nic->node_addr) + i);
1356 sum += value & 0xffff;
1358 } else if (chip_idx == COMET) {
1359 /* No need to read the EEPROM. */
1360 put_unaligned(inl(ioaddr + 0xA4), (u32 *)nic->node_addr);
1361 put_unaligned(inl(ioaddr + 0xA8), (u16 *)(nic->node_addr + 4));
1362 for (i = 0; i < ETH_ALEN; i ++)
1363 sum += nic->node_addr[i];
1364 } else {
1365 /* A serial EEPROM interface, we read now and sort it out later. */
1366 int sa_offset = 0;
1367 int ee_addr_size = read_eeprom(ioaddr, 0xff, 8) & 0x40000 ? 8 : 6;
1369 for (i = 0; i < sizeof(ee_data)/2; i++)
1370 ((u16 *)ee_data)[i] =
1371 le16_to_cpu(read_eeprom(ioaddr, i, ee_addr_size));
1373 /* DEC now has a specification (see Notes) but early board makers
1374 just put the address in the first EEPROM locations. */
1375 /* This does memcmp(eedata, eedata+16, 8) */
1376 for (i = 0; i < 8; i ++)
1377 if (ee_data[i] != ee_data[16+i])
1378 sa_offset = 20;
1379 if (ee_data[0] == 0xff && ee_data[1] == 0xff && ee_data[2] == 0) {
1380 sa_offset = 2; /* Grrr, damn Matrox boards. */
1382 for (i = 0; i < ETH_ALEN; i ++) {
1383 nic->node_addr[i] = ee_data[i + sa_offset];
1384 sum += ee_data[i + sa_offset];
1387 /* Lite-On boards have the address byte-swapped. */
1388 if ((nic->node_addr[0] == 0xA0 || nic->node_addr[0] == 0xC0)
1389 && nic->node_addr[1] == 0x00)
1390 for (i = 0; i < ETH_ALEN; i+=2) {
1391 char tmp = nic->node_addr[i];
1392 nic->node_addr[i] = nic->node_addr[i+1];
1393 nic->node_addr[i+1] = tmp;
1396 if (sum == 0 || sum == ETH_ALEN*0xff) {
1397 printf("%s: EEPROM not present!\n", tp->nic_name);
1398 for (i = 0; i < ETH_ALEN-1; i++)
1399 nic->node_addr[i] = last_phys_addr[i];
1400 nic->node_addr[i] = last_phys_addr[i] + 1;
1403 for (i = 0; i < ETH_ALEN; i++)
1404 last_phys_addr[i] = nic->node_addr[i];
1406 DBG ( "%s: %s at ioaddr %hX\n", tp->nic_name, eth_ntoa ( nic->node_addr ),
1407 (unsigned int) ioaddr );
1409 tp->chip_id = chip_idx;
1410 tp->revision = chip_rev;
1411 tp->csr0 = csr0;
1413 /* BugFixes: The 21143-TD hangs with PCI Write-and-Invalidate cycles.
1414 And the ASIX must have a burst limit or horrible things happen. */
1415 if (chip_idx == DC21143 && chip_rev == 65)
1416 tp->csr0 &= ~0x01000000;
1417 else if (tp->flags & IS_ASIX)
1418 tp->csr0 |= 0x2000;
1420 if (media_cap[tp->default_port] & MediaIsMII) {
1421 static const u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60,
1422 0x80, 0x100, 0x200 };
1423 tp->mii_advertise = media2advert[tp->default_port - 9];
1424 tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
1427 /* This is logically part of the probe routine, but too complex
1428 to write inline. */
1429 if (tp->flags & HAS_MEDIA_TABLE) {
1430 memcpy(tp->eeprom, ee_data, sizeof(tp->eeprom));
1431 parse_eeprom(nic);
1434 start_link(nic);
1436 /* reset the device and make ready for tx and rx of packets */
1437 tulip_reset(nic);
1438 nic->nic_op = &tulip_operations;
1440 /* give the board a chance to reset before returning */
1441 tulip_wait(4*TICKS_PER_SEC);
1443 return 1;
1446 static void start_link(struct nic *nic)
1448 int i;
1450 #ifdef TULIP_DEBUG_WHERE
1451 whereami("start_link\n");
1452 #endif
1454 if ((tp->flags & ALWAYS_CHECK_MII) ||
1455 (tp->mtable && tp->mtable->has_mii) ||
1456 ( ! tp->mtable && (tp->flags & HAS_MII))) {
1457 unsigned int phy, phy_idx;
1458 if (tp->mtable && tp->mtable->has_mii) {
1459 for (i = 0; i < tp->mtable->leafcount; i++)
1460 if (tp->mtable->mleaf[i].media == 11) {
1461 tp->cur_index = i;
1462 tp->saved_if_port = tp->if_port;
1463 select_media(nic, 2);
1464 tp->if_port = tp->saved_if_port;
1465 break;
1469 /* Find the connected MII xcvrs. */
1470 for (phy = 0, phy_idx = 0; phy < 32 && phy_idx < sizeof(tp->phys);
1471 phy++) {
1472 int mii_status = mdio_read(nic, phy, 1);
1473 if ((mii_status & 0x8301) == 0x8001 ||
1474 ((mii_status & 0x8000) == 0 && (mii_status & 0x7800) != 0)) {
1475 int mii_reg0 = mdio_read(nic, phy, 0);
1476 int mii_advert = mdio_read(nic, phy, 4);
1477 int to_advert;
1479 if (tp->mii_advertise)
1480 to_advert = tp->mii_advertise;
1481 else if (tp->advertising[phy_idx])
1482 to_advert = tp->advertising[phy_idx];
1483 else /* Leave unchanged. */
1484 tp->mii_advertise = to_advert = mii_advert;
1486 tp->phys[phy_idx++] = phy;
1487 printf("%s: MII transceiver %d config %hX status %hX advertising %hX.\n",
1488 tp->nic_name, phy, mii_reg0, mii_status, mii_advert);
1489 /* Fixup for DLink with miswired PHY. */
1490 if (mii_advert != to_advert) {
1491 printf("%s: Advertising %hX on PHY %d previously advertising %hX.\n",
1492 tp->nic_name, to_advert, phy, mii_advert);
1493 mdio_write(nic, phy, 4, to_advert);
1495 /* Enable autonegotiation: some boards default to off. */
1496 mdio_write(nic, phy, 0, mii_reg0 |
1497 (tp->full_duplex ? 0x1100 : 0x1000) |
1498 (media_cap[tp->default_port]&MediaIs100 ? 0x2000:0));
1501 tp->mii_cnt = phy_idx;
1502 if (tp->mtable && tp->mtable->has_mii && phy_idx == 0) {
1503 printf("%s: ***WARNING***: No MII transceiver found!\n",
1504 tp->nic_name);
1505 tp->phys[0] = 1;
1509 /* Reset the xcvr interface and turn on heartbeat. */
1510 switch (tp->chip_id) {
1511 case DC21040:
1512 outl(0x00000000, ioaddr + CSR13);
1513 outl(0x00000004, ioaddr + CSR13);
1514 break;
1515 case DC21041:
1516 /* This is nway_start(). */
1517 if (tp->sym_advertise == 0)
1518 tp->sym_advertise = 0x0061;
1519 outl(0x00000000, ioaddr + CSR13);
1520 outl(0xFFFFFFFF, ioaddr + CSR14);
1521 outl(0x00000008, ioaddr + CSR15); /* Listen on AUI also. */
1522 outl(inl(ioaddr + CSR6) | 0x0200, ioaddr + CSR6);
1523 outl(0x0000EF01, ioaddr + CSR13);
1524 break;
1525 case DC21140: default:
1526 if (tp->mtable)
1527 outl(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
1528 break;
1529 case DC21142:
1530 case PNIC2:
1531 if (tp->mii_cnt || media_cap[tp->if_port] & MediaIsMII) {
1532 outl(0x82020000, ioaddr + CSR6);
1533 outl(0x0000, ioaddr + CSR13);
1534 outl(0x0000, ioaddr + CSR14);
1535 outl(0x820E0000, ioaddr + CSR6);
1536 } else
1537 nway_start(nic);
1538 break;
1539 case LC82C168:
1540 if ( ! tp->mii_cnt) {
1541 tp->nway = 1;
1542 tp->nwayset = 0;
1543 outl(0x00420000, ioaddr + CSR6);
1544 outl(0x30, ioaddr + CSR12);
1545 outl(0x0001F078, ioaddr + 0xB8);
1546 outl(0x0201F078, ioaddr + 0xB8); /* Turn on autonegotiation. */
1548 break;
1549 case MX98713: case COMPEX9881:
1550 outl(0x00000000, ioaddr + CSR6);
1551 outl(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
1552 outl(0x00000001, ioaddr + CSR13);
1553 break;
1554 case MX98715: case MX98725:
1555 outl(0x01a80000, ioaddr + CSR6);
1556 outl(0xFFFFFFFF, ioaddr + CSR14);
1557 outl(0x00001000, ioaddr + CSR12);
1558 break;
1559 case COMET:
1560 /* No initialization necessary. */
1561 break;
1565 static void nway_start(struct nic *nic __unused)
1567 int csr14 = ((tp->sym_advertise & 0x0780) << 9) |
1568 ((tp->sym_advertise&0x0020)<<1) | 0xffbf;
1570 #ifdef TULIP_DEBUG_WHERE
1571 whereami("nway_start\n");
1572 #endif
1574 tp->if_port = 0;
1575 tp->nway = tp->mediasense = 1;
1576 tp->nwayset = tp->lpar = 0;
1577 if (tp->chip_id == PNIC2) {
1578 tp->csr6 = 0x01000000 | (tp->sym_advertise & 0x0040 ? 0x0200 : 0);
1579 return;
1581 #ifdef TULIP_DEBUG
1582 if (tulip_debug > 1)
1583 printf("%s: Restarting internal NWay autonegotiation, %X.\n",
1584 tp->nic_name, csr14);
1585 #endif
1586 outl(0x0001, ioaddr + CSR13);
1587 outl(csr14, ioaddr + CSR14);
1588 tp->csr6 = 0x82420000 | (tp->sym_advertise & 0x0040 ? 0x0200 : 0);
1589 outl(tp->csr6, ioaddr + CSR6);
1590 if (tp->mtable && tp->mtable->csr15dir) {
1591 outl(tp->mtable->csr15dir, ioaddr + CSR15);
1592 outl(tp->mtable->csr15val, ioaddr + CSR15);
1593 } else if (tp->chip_id != PNIC2)
1594 outw(0x0008, ioaddr + CSR15);
1595 if (tp->chip_id == DC21041) /* Trigger NWAY. */
1596 outl(0xEF01, ioaddr + CSR12);
1597 else
1598 outl(0x1301, ioaddr + CSR12);
1601 static void init_media(struct nic *nic)
1603 int i;
1605 #ifdef TULIP_DEBUG_WHERE
1606 whereami("init_media\n");
1607 #endif
1609 tp->saved_if_port = tp->if_port;
1610 if (tp->if_port == 0)
1611 tp->if_port = tp->default_port;
1613 /* Allow selecting a default media. */
1614 i = 0;
1615 if (tp->mtable == NULL)
1616 goto media_picked;
1617 if (tp->if_port) {
1618 int looking_for = media_cap[tp->if_port] & MediaIsMII ? 11 :
1619 (tp->if_port == 12 ? 0 : tp->if_port);
1620 for (i = 0; i < tp->mtable->leafcount; i++)
1621 if (tp->mtable->mleaf[i].media == looking_for) {
1622 printf("%s: Using user-specified media %s.\n",
1623 tp->nic_name, medianame[tp->if_port]);
1624 goto media_picked;
1627 if ((tp->mtable->defaultmedia & 0x0800) == 0) {
1628 int looking_for = tp->mtable->defaultmedia & 15;
1629 for (i = 0; i < tp->mtable->leafcount; i++)
1630 if (tp->mtable->mleaf[i].media == looking_for) {
1631 printf("%s: Using EEPROM-set media %s.\n",
1632 tp->nic_name, medianame[looking_for]);
1633 goto media_picked;
1636 /* Start sensing first non-full-duplex media. */
1637 for (i = tp->mtable->leafcount - 1;
1638 (media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--)
1640 media_picked:
1642 tp->csr6 = 0;
1643 tp->cur_index = i;
1644 tp->nwayset = 0;
1646 if (tp->if_port) {
1647 if (tp->chip_id == DC21143 && media_cap[tp->if_port] & MediaIsMII) {
1648 /* We must reset the media CSRs when we force-select MII mode. */
1649 outl(0x0000, ioaddr + CSR13);
1650 outl(0x0000, ioaddr + CSR14);
1651 outl(0x0008, ioaddr + CSR15);
1653 select_media(nic, 1);
1654 return;
1656 switch(tp->chip_id) {
1657 case DC21041:
1658 /* tp->nway = 1;*/
1659 nway_start(nic);
1660 break;
1661 case DC21142:
1662 if (tp->mii_cnt) {
1663 select_media(nic, 1);
1664 #ifdef TULIP_DEBUG
1665 if (tulip_debug > 1)
1666 printf("%s: Using MII transceiver %d, status %hX.\n",
1667 tp->nic_name, tp->phys[0], mdio_read(nic, tp->phys[0], 1));
1668 #endif
1669 outl(0x82020000, ioaddr + CSR6);
1670 tp->csr6 = 0x820E0000;
1671 tp->if_port = 11;
1672 outl(0x0000, ioaddr + CSR13);
1673 outl(0x0000, ioaddr + CSR14);
1674 } else
1675 nway_start(nic);
1676 break;
1677 case PNIC2:
1678 nway_start(nic);
1679 break;
1680 case LC82C168:
1681 if (tp->mii_cnt) {
1682 tp->if_port = 11;
1683 tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0);
1684 outl(0x0001, ioaddr + CSR15);
1685 } else if (inl(ioaddr + CSR5) & TPLnkPass)
1686 pnic_do_nway(nic);
1687 else {
1688 /* Start with 10mbps to do autonegotiation. */
1689 outl(0x32, ioaddr + CSR12);
1690 tp->csr6 = 0x00420000;
1691 outl(0x0001B078, ioaddr + 0xB8);
1692 outl(0x0201B078, ioaddr + 0xB8);
1694 break;
1695 case MX98713: case COMPEX9881:
1696 tp->if_port = 0;
1697 tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0);
1698 outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80);
1699 break;
1700 case MX98715: case MX98725:
1701 /* Provided by BOLO, Macronix - 12/10/1998. */
1702 tp->if_port = 0;
1703 tp->csr6 = 0x01a80200;
1704 outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80);
1705 outl(0x11000 | inw(ioaddr + 0xa0), ioaddr + 0xa0);
1706 break;
1707 case COMET:
1708 /* Enable automatic Tx underrun recovery */
1709 outl(inl(ioaddr + 0x88) | 1, ioaddr + 0x88);
1710 tp->if_port = 0;
1711 tp->csr6 = 0x00040000;
1712 break;
1713 case AX88140: case AX88141:
1714 tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
1715 break;
1716 default:
1717 select_media(nic, 1);
1721 static void pnic_do_nway(struct nic *nic __unused)
1723 u32 phy_reg = inl(ioaddr + 0xB8);
1724 u32 new_csr6 = tp->csr6 & ~0x40C40200;
1726 #ifdef TULIP_DEBUG_WHERE
1727 whereami("pnic_do_nway\n");
1728 #endif
1730 if (phy_reg & 0x78000000) { /* Ignore baseT4 */
1731 if (phy_reg & 0x20000000) tp->if_port = 5;
1732 else if (phy_reg & 0x40000000) tp->if_port = 3;
1733 else if (phy_reg & 0x10000000) tp->if_port = 4;
1734 else if (phy_reg & 0x08000000) tp->if_port = 0;
1735 tp->nwayset = 1;
1736 new_csr6 = (tp->if_port & 1) ? 0x01860000 : 0x00420000;
1737 outl(0x32 | (tp->if_port & 1), ioaddr + CSR12);
1738 if (tp->if_port & 1)
1739 outl(0x1F868, ioaddr + 0xB8);
1740 if (phy_reg & 0x30000000) {
1741 tp->full_duplex = 1;
1742 new_csr6 |= 0x00000200;
1744 #ifdef TULIP_DEBUG
1745 if (tulip_debug > 1)
1746 printf("%s: PNIC autonegotiated status %X, %s.\n",
1747 tp->nic_name, phy_reg, medianame[tp->if_port]);
1748 #endif
1749 if (tp->csr6 != new_csr6) {
1750 tp->csr6 = new_csr6;
1751 outl(tp->csr6 | 0x0002, ioaddr + CSR6); /* Restart Tx */
1752 outl(tp->csr6 | 0x2002, ioaddr + CSR6);
1757 /* Set up the transceiver control registers for the selected media type. */
1758 static void select_media(struct nic *nic, int startup)
1760 struct mediatable *mtable = tp->mtable;
1761 u32 new_csr6;
1762 int i;
1764 #ifdef TULIP_DEBUG_WHERE
1765 whereami("select_media\n");
1766 #endif
1768 if (mtable) {
1769 struct medialeaf *mleaf = &mtable->mleaf[tp->cur_index];
1770 unsigned char *p = mleaf->leafdata;
1771 switch (mleaf->type) {
1772 case 0: /* 21140 non-MII xcvr. */
1773 #ifdef TULIP_DEBUG
1774 if (tulip_debug > 1)
1775 printf("%s: Using a 21140 non-MII transceiver"
1776 " with control setting %hhX.\n",
1777 tp->nic_name, p[1]);
1778 #endif
1779 tp->if_port = p[0];
1780 if (startup)
1781 outl(mtable->csr12dir | 0x100, ioaddr + CSR12);
1782 outl(p[1], ioaddr + CSR12);
1783 new_csr6 = 0x02000000 | ((p[2] & 0x71) << 18);
1784 break;
1785 case 2: case 4: {
1786 u16 setup[5];
1787 u32 csr13val, csr14val, csr15dir, csr15val;
1788 for (i = 0; i < 5; i++)
1789 setup[i] = get_u16(&p[i*2 + 1]);
1791 tp->if_port = p[0] & 15;
1792 if (media_cap[tp->if_port] & MediaAlwaysFD)
1793 tp->full_duplex = 1;
1795 if (startup && mtable->has_reset) {
1796 struct medialeaf *rleaf = &mtable->mleaf[mtable->has_reset];
1797 unsigned char *rst = rleaf->leafdata;
1798 #ifdef TULIP_DEBUG
1799 if (tulip_debug > 1)
1800 printf("%s: Resetting the transceiver.\n",
1801 tp->nic_name);
1802 #endif
1803 for (i = 0; i < rst[0]; i++)
1804 outl(get_u16(rst + 1 + (i<<1)) << 16, ioaddr + CSR15);
1806 #ifdef TULIP_DEBUG
1807 if (tulip_debug > 1)
1808 printf("%s: 21143 non-MII %s transceiver control "
1809 "%hX/%hX.\n",
1810 tp->nic_name, medianame[tp->if_port], setup[0], setup[1]);
1811 #endif
1812 if (p[0] & 0x40) { /* SIA (CSR13-15) setup values are provided. */
1813 csr13val = setup[0];
1814 csr14val = setup[1];
1815 csr15dir = (setup[3]<<16) | setup[2];
1816 csr15val = (setup[4]<<16) | setup[2];
1817 outl(0, ioaddr + CSR13);
1818 outl(csr14val, ioaddr + CSR14);
1819 outl(csr15dir, ioaddr + CSR15); /* Direction */
1820 outl(csr15val, ioaddr + CSR15); /* Data */
1821 outl(csr13val, ioaddr + CSR13);
1822 } else {
1823 csr13val = 1;
1824 csr14val = 0x0003FF7F;
1825 csr15dir = (setup[0]<<16) | 0x0008;
1826 csr15val = (setup[1]<<16) | 0x0008;
1827 if (tp->if_port <= 4)
1828 csr14val = t21142_csr14[tp->if_port];
1829 if (startup) {
1830 outl(0, ioaddr + CSR13);
1831 outl(csr14val, ioaddr + CSR14);
1833 outl(csr15dir, ioaddr + CSR15); /* Direction */
1834 outl(csr15val, ioaddr + CSR15); /* Data */
1835 if (startup) outl(csr13val, ioaddr + CSR13);
1837 #ifdef TULIP_DEBUG
1838 if (tulip_debug > 1)
1839 printf("%s: Setting CSR15 to %X/%X.\n",
1840 tp->nic_name, csr15dir, csr15val);
1841 #endif
1842 if (mleaf->type == 4)
1843 new_csr6 = 0x82020000 | ((setup[2] & 0x71) << 18);
1844 else
1845 new_csr6 = 0x82420000;
1846 break;
1848 case 1: case 3: {
1849 int phy_num = p[0];
1850 int init_length = p[1];
1851 u16 *misc_info;
1853 tp->if_port = 11;
1854 new_csr6 = 0x020E0000;
1855 if (mleaf->type == 3) { /* 21142 */
1856 u16 *init_sequence = (u16*)(p+2);
1857 u16 *reset_sequence = &((u16*)(p+3))[init_length];
1858 int reset_length = p[2 + init_length*2];
1859 misc_info = reset_sequence + reset_length;
1860 if (startup)
1861 for (i = 0; i < reset_length; i++)
1862 outl(get_u16(&reset_sequence[i]) << 16, ioaddr + CSR15);
1863 for (i = 0; i < init_length; i++)
1864 outl(get_u16(&init_sequence[i]) << 16, ioaddr + CSR15);
1865 } else {
1866 u8 *init_sequence = p + 2;
1867 u8 *reset_sequence = p + 3 + init_length;
1868 int reset_length = p[2 + init_length];
1869 misc_info = (u16*)(reset_sequence + reset_length);
1870 if (startup) {
1871 outl(mtable->csr12dir | 0x100, ioaddr + CSR12);
1872 for (i = 0; i < reset_length; i++)
1873 outl(reset_sequence[i], ioaddr + CSR12);
1875 for (i = 0; i < init_length; i++)
1876 outl(init_sequence[i], ioaddr + CSR12);
1878 tp->advertising[phy_num] = get_u16(&misc_info[1]) | 1;
1879 if (startup < 2) {
1880 if (tp->mii_advertise == 0)
1881 tp->mii_advertise = tp->advertising[phy_num];
1882 #ifdef TULIP_DEBUG
1883 if (tulip_debug > 1)
1884 printf("%s: Advertising %hX on MII %d.\n",
1885 tp->nic_name, tp->mii_advertise, tp->phys[phy_num]);
1886 #endif
1887 mdio_write(nic, tp->phys[phy_num], 4, tp->mii_advertise);
1889 break;
1891 default:
1892 printf("%s: Invalid media table selection %d.\n",
1893 tp->nic_name, mleaf->type);
1894 new_csr6 = 0x020E0000;
1896 #ifdef TULIP_DEBUG
1897 if (tulip_debug > 1)
1898 printf("%s: Using media type %s, CSR12 is %hhX.\n",
1899 tp->nic_name, medianame[tp->if_port],
1900 inl(ioaddr + CSR12) & 0xff);
1901 #endif
1902 } else if (tp->chip_id == DC21041) {
1903 int port = tp->if_port <= 4 ? tp->if_port : 0;
1904 #ifdef TULIP_DEBUG
1905 if (tulip_debug > 1)
1906 printf("%s: 21041 using media %s, CSR12 is %hX.\n",
1907 tp->nic_name, medianame[port == 3 ? 12: port],
1908 inl(ioaddr + CSR12));
1909 #endif
1910 outl(0x00000000, ioaddr + CSR13); /* Reset the serial interface */
1911 outl(t21041_csr14[port], ioaddr + CSR14);
1912 outl(t21041_csr15[port], ioaddr + CSR15);
1913 outl(t21041_csr13[port], ioaddr + CSR13);
1914 new_csr6 = 0x80020000;
1915 } else if (tp->chip_id == LC82C168) {
1916 if (startup && ! tp->medialock)
1917 tp->if_port = tp->mii_cnt ? 11 : 0;
1918 #ifdef TULIP_DEBUG
1919 if (tulip_debug > 1)
1920 printf("%s: PNIC PHY status is %hX, media %s.\n",
1921 tp->nic_name, inl(ioaddr + 0xB8), medianame[tp->if_port]);
1922 #endif
1923 if (tp->mii_cnt) {
1924 new_csr6 = 0x810C0000;
1925 outl(0x0001, ioaddr + CSR15);
1926 outl(0x0201B07A, ioaddr + 0xB8);
1927 } else if (startup) {
1928 /* Start with 10mbps to do autonegotiation. */
1929 outl(0x32, ioaddr + CSR12);
1930 new_csr6 = 0x00420000;
1931 outl(0x0001B078, ioaddr + 0xB8);
1932 outl(0x0201B078, ioaddr + 0xB8);
1933 } else if (tp->if_port == 3 || tp->if_port == 5) {
1934 outl(0x33, ioaddr + CSR12);
1935 new_csr6 = 0x01860000;
1936 /* Trigger autonegotiation. */
1937 outl(startup ? 0x0201F868 : 0x0001F868, ioaddr + 0xB8);
1938 } else {
1939 outl(0x32, ioaddr + CSR12);
1940 new_csr6 = 0x00420000;
1941 outl(0x1F078, ioaddr + 0xB8);
1943 } else if (tp->chip_id == DC21040) { /* 21040 */
1944 /* Turn on the xcvr interface. */
1945 #ifdef TULIP_DEBUG
1946 int csr12 = inl(ioaddr + CSR12);
1947 if (tulip_debug > 1)
1948 printf("%s: 21040 media type is %s, CSR12 is %hhX.\n",
1949 tp->nic_name, medianame[tp->if_port], csr12);
1950 #endif
1951 if (media_cap[tp->if_port] & MediaAlwaysFD)
1952 tp->full_duplex = 1;
1953 new_csr6 = 0x20000;
1954 /* Set the full duplux match frame. */
1955 outl(FULL_DUPLEX_MAGIC, ioaddr + CSR11);
1956 outl(0x00000000, ioaddr + CSR13); /* Reset the serial interface */
1957 if (t21040_csr13[tp->if_port] & 8) {
1958 outl(0x0705, ioaddr + CSR14);
1959 outl(0x0006, ioaddr + CSR15);
1960 } else {
1961 outl(0xffff, ioaddr + CSR14);
1962 outl(0x0000, ioaddr + CSR15);
1964 outl(0x8f01 | t21040_csr13[tp->if_port], ioaddr + CSR13);
1965 } else { /* Unknown chip type with no media table. */
1966 if (tp->default_port == 0)
1967 tp->if_port = tp->mii_cnt ? 11 : 3;
1968 if (media_cap[tp->if_port] & MediaIsMII) {
1969 new_csr6 = 0x020E0000;
1970 } else if (media_cap[tp->if_port] & MediaIsFx) {
1971 new_csr6 = 0x028600000;
1972 } else
1973 new_csr6 = 0x038600000;
1974 #ifdef TULIP_DEBUG
1975 if (tulip_debug > 1)
1976 printf("%s: No media description table, assuming "
1977 "%s transceiver, CSR12 %hhX.\n",
1978 tp->nic_name, medianame[tp->if_port],
1979 inl(ioaddr + CSR12));
1980 #endif
1983 tp->csr6 = new_csr6 | (tp->csr6 & 0xfdff) | (tp->full_duplex ? 0x0200 : 0);
1984 return;
1988 Check the MII negotiated duplex and change the CSR6 setting if
1989 required.
1990 Return 0 if everything is OK.
1991 Return < 0 if the transceiver is missing or has no link beat.
1993 static int tulip_check_duplex(struct nic *nic)
1995 unsigned int bmsr, lpa, negotiated, new_csr6;
1997 bmsr = mdio_read(nic, tp->phys[0], 1);
1998 lpa = mdio_read(nic, tp->phys[0], 5);
2000 #ifdef TULIP_DEBUG
2001 if (tulip_debug > 1)
2002 printf("%s: MII status %#x, Link partner report "
2003 "%#x.\n", tp->nic_name, bmsr, lpa);
2004 #endif
2006 if (bmsr == 0xffff)
2007 return -2;
2008 if ((bmsr & 4) == 0) {
2009 int new_bmsr = mdio_read(nic, tp->phys[0], 1);
2010 if ((new_bmsr & 4) == 0) {
2011 #ifdef TULIP_DEBUG
2012 if (tulip_debug > 1)
2013 printf("%s: No link beat on the MII interface,"
2014 " status %#x.\n", tp->nic_name,
2015 new_bmsr);
2016 #endif
2017 return -1;
2020 tp->full_duplex = lpa & 0x140;
2022 new_csr6 = tp->csr6;
2023 negotiated = lpa & tp->advertising[0];
2025 if(negotiated & 0x380) new_csr6 &= ~0x400000;
2026 else new_csr6 |= 0x400000;
2027 if (tp->full_duplex) new_csr6 |= 0x200;
2028 else new_csr6 &= ~0x200;
2030 if (new_csr6 != tp->csr6) {
2031 tp->csr6 = new_csr6;
2033 #ifdef TULIP_DEBUG
2034 if (tulip_debug > 0)
2035 printf("%s: Setting %s-duplex based on MII"
2036 "#%d link partner capability of %#x.\n",
2037 tp->nic_name,
2038 tp->full_duplex ? "full" : "half",
2039 tp->phys[0], lpa);
2040 #endif
2041 return 1;
2044 return 0;
2047 static struct pci_device_id tulip_nics[] = {
2048 PCI_ROM(0x1011, 0x0002, "dc21040", "Digital Tulip"),
2049 PCI_ROM(0x1011, 0x0009, "ds21140", "Digital Tulip Fast"),
2050 PCI_ROM(0x1011, 0x0014, "dc21041", "Digital Tulip+"),
2051 PCI_ROM(0x1011, 0x0019, "ds21142", "Digital Tulip 21142"),
2052 PCI_ROM(0x10b7, 0x9300, "3csoho100b-tx","3ComSOHO100B-TX"),
2053 PCI_ROM(0x10b9, 0x5261, "ali1563", "ALi 1563 integrated ethernet"),
2054 PCI_ROM(0x10d9, 0x0512, "mx98713", "Macronix MX987x3"),
2055 PCI_ROM(0x10d9, 0x0531, "mx98715", "Macronix MX987x5"),
2056 PCI_ROM(0x1113, 0x1217, "mxic-98715", "Macronix MX987x5"),
2057 PCI_ROM(0x11ad, 0xc115, "lc82c115", "LinkSys LNE100TX"),
2058 PCI_ROM(0x11ad, 0x0002, "82c168", "Netgear FA310TX"),
2059 PCI_ROM(0x1282, 0x9100, "dm9100", "Davicom 9100"),
2060 PCI_ROM(0x1282, 0x9102, "dm9102", "Davicom 9102"),
2061 PCI_ROM(0x1282, 0x9009, "dm9009", "Davicom 9009"),
2062 PCI_ROM(0x1282, 0x9132, "dm9132", "Davicom 9132"),
2063 PCI_ROM(0x1317, 0x0985, "centaur-p", "ADMtek Centaur-P"),
2064 PCI_ROM(0x1317, 0x0981, "an981", "ADMtek AN981 Comet"), /* ADMTek Centaur-P (stmicro) */
2065 PCI_ROM(0x1113, 0x1216, "an983", "ADMTek AN983 Comet"),
2066 PCI_ROM(0x1317, 0x9511, "an983b", "ADMTek Comet 983b"),
2067 PCI_ROM(0x1317, 0x1985, "centaur-c", "ADMTek Centaur-C"),
2068 PCI_ROM(0x8086, 0x0039, "intel21145", "Intel Tulip"),
2069 PCI_ROM(0x125b, 0x1400, "ax88140", "ASIX AX88140"),
2070 PCI_ROM(0x11f6, 0x9881, "rl100tx", "Compex RL100-TX"),
2071 PCI_ROM(0x115d, 0x0003, "xircomtulip", "Xircom Tulip"),
2072 PCI_ROM(0x104a, 0x0981, "tulip-0981", "Tulip 0x104a 0x0981"),
2073 PCI_ROM(0x104a, 0x2774, "SGThomson-STE10100A", "Tulip 0x104a 0x2774"), /*Modified by Ramesh Chander*/
2074 PCI_ROM(0x1113, 0x9511, "tulip-9511", "Tulip 0x1113 0x9511"),
2075 PCI_ROM(0x1186, 0x1561, "tulip-1561", "Tulip 0x1186 0x1561"),
2076 PCI_ROM(0x1259, 0xa120, "tulip-a120", "Tulip 0x1259 0xa120"),
2077 PCI_ROM(0x13d1, 0xab02, "tulip-ab02", "Tulip 0x13d1 0xab02"),
2078 PCI_ROM(0x13d1, 0xab03, "tulip-ab03", "Tulip 0x13d1 0xab03"),
2079 PCI_ROM(0x13d1, 0xab08, "tulip-ab08", "Tulip 0x13d1 0xab08"),
2080 PCI_ROM(0x14f1, 0x1803, "lanfinity", "Conexant LANfinity"),
2081 PCI_ROM(0x1626, 0x8410, "tulip-8410", "Tulip 0x1626 0x8410"),
2082 PCI_ROM(0x1737, 0xab08, "tulip-1737-ab08","Tulip 0x1737 0xab08"),
2083 PCI_ROM(0x1737, 0xab09, "tulip-ab09", "Tulip 0x1737 0xab09"),
2086 PCI_DRIVER ( tulip_driver, tulip_nics, PCI_NO_CLASS );
2088 DRIVER ( "Tulip", nic_driver, pci_driver, tulip_driver,
2089 tulip_probe, tulip_disable );
2092 * Local variables:
2093 * c-basic-offset: 8
2094 * c-indent-level: 8
2095 * tab-width: 8
2096 * End: