src/drivers/net/igb/igb_osdep.h

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2009 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 FILE_LICENCE ( GPL2_ONLY );
  29
  30 /* glue for the OS independent part of e1000
  31  * includes register access macros
  32  */
  33
  34 #ifndef _IGB_OSDEP_H_
  35 #define _IGB_OSDEP_H_
  36
  37 /* Begin OS Dependencies */
  38
  39 #define u8         unsigned char
  40 #define bool       boolean_t
  41 #define dma_addr_t unsigned long
  42 #define __le16     uint16_t
  43 #define __le32     uint32_t
  44 #define __le64     uint64_t
  45
  46 #define __iomem
  47 #define __devinit
  48
  49 #define msleep(x) mdelay(x)
  50
  51 #define ETH_FCS_LEN 4
  52
  53 typedef int spinlock_t;
  54 typedef enum {
  55     false = 0,
  56     true = 1
  57 } boolean_t;
  58
  59 #define TRUE  1
  60 #define FALSE 0
  61
  62 #define usec_delay(x) udelay(x)
  63 #define msec_delay(x) mdelay(x)
  64 #define msec_delay_irq(x) mdelay(x)
  65
  66 /* End OS Dependencies */
  67
  68 #define PCI_COMMAND_REGISTER   PCI_COMMAND
  69 #define CMD_MEM_WRT_INVALIDATE PCI_COMMAND_INVALIDATE
  70 #define ETH_ADDR_LEN           ETH_ALEN
  71
  72 #define DEBUGOUT(S) if (0) { printf(S); }
  73 #define DEBUGOUT1(S, A...) if (0) { printf(S, A); }
  74
  75 #define DEBUGFUNC(F) DEBUGOUT(F "\n")
  76 #define DEBUGOUT2 DEBUGOUT1
  77 #define DEBUGOUT3 DEBUGOUT2
  78 #define DEBUGOUT7 DEBUGOUT3
  79
  80 #define E1000_REGISTER(a, reg) (reg)
  81
  82 #define E1000_WRITE_REG(a, reg, value) do {  \
  83                 writel((value), ((a)->hw_addr + E1000_REGISTER(a, reg))); } while (0)
  84
  85 #define E1000_READ_REG(a, reg) (readl((a)->hw_addr + E1000_REGISTER(a, reg)))
  86
  87 #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) do { \
  88           writel((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2))); } while (0);
  89
  90 #define E1000_READ_REG_ARRAY(a, reg, offset) ( \
  91     readl((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2)))
  92
  93 #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
  94 #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
  95
  96 #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
  97     writew((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1))))
  98
  99 #define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \
 100     readw((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1)))
 101
 102 #define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \
 103     writeb((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + (offset))))
 104
 105 #define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \
 106     readb((a)->hw_addr + E1000_REGISTER(a, reg) + (offset)))
 107
 108 #define E1000_WRITE_REG_IO(a, reg, offset) do { \
 109     outl(reg, ((a)->io_base));                  \
 110     outl(offset, ((a)->io_base + 4));      } while (0)
 111
 112 #define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, E1000_STATUS)
 113
 114 #define E1000_WRITE_FLASH_REG(a, reg, value) ( \
 115     writel((value), ((a)->flash_address + reg)))
 116
 117 #define E1000_WRITE_FLASH_REG16(a, reg, value) ( \
 118     writew((value), ((a)->flash_address + reg)))
 119
 120 #define E1000_READ_FLASH_REG(a, reg) (readl((a)->flash_address + reg))
 121
 122 #define E1000_READ_FLASH_REG16(a, reg) (readw((a)->flash_address + reg))
 123
 124 #endif /* _IGB_OSDEP_H_ */