src/drivers/net/e1000/e1000_osdep.h

   1 /*******************************************************************************
   2
   3   Intel PRO/1000 Linux driver
   4   Copyright(c) 1999 - 2008 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 FILE_LICENCE ( GPL2_OR_LATER );
  30
  31 /* glue for the OS-dependent part of e1000
  32  * includes register access macros
  33  */
  34
  35 #ifndef _E1000_OSDEP_H_
  36 #define _E1000_OSDEP_H_
  37
  38 #define u8         unsigned char
  39 #define bool       boolean_t
  40 #define dma_addr_t unsigned long
  41 #define __le16     uint16_t
  42 #define __le32     uint32_t
  43 #define __le64     uint64_t
  44
  45 #define __iomem
  46
  47 #define ETH_FCS_LEN 4
  48
  49 typedef int spinlock_t;
  50 typedef enum {
  51     false = 0,
  52     true = 1
  53 } boolean_t;
  54
  55 #define usec_delay(x) udelay(x)
  56 #define msec_delay(x) mdelay(x)
  57 #define msec_delay_irq(x) mdelay(x)
  58
  59 #define PCI_COMMAND_REGISTER   PCI_COMMAND
  60 #define CMD_MEM_WRT_INVALIDATE PCI_COMMAND_INVALIDATE
  61 #define ETH_ADDR_LEN           ETH_ALEN
  62
  63 #define DEBUGFUNC(F) DBG(F "\n")
  64
  65 #define DEBUGOUT(S)             DBG(S)
  66 #define DEBUGOUT1(S, A...)      DBG(S, A)
  67
  68 #define DEBUGOUT2 DEBUGOUT1
  69 #define DEBUGOUT3 DEBUGOUT2
  70 #define DEBUGOUT7 DEBUGOUT3
  71
  72 #define E1000_REGISTER(a, reg) (((a)->mac.type >= e1000_82543) \
  73                                ? reg                           \
  74                                : e1000_translate_register_82542(reg))
  75
  76 #define E1000_WRITE_REG(a, reg, value) \
  77     writel((value), ((a)->hw_addr + E1000_REGISTER(a, reg)))
  78
  79 #define E1000_READ_REG(a, reg) (readl((a)->hw_addr + E1000_REGISTER(a, reg)))
  80
  81 #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) \
  82     writel((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2)))
  83
  84 #define E1000_READ_REG_ARRAY(a, reg, offset) ( \
  85     readl((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2)))
  86
  87 #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
  88 #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
  89
  90 #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
  91     writew((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1))))
  92
  93 #define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \
  94     readw((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1)))
  95
  96 #define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \
  97     writeb((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + (offset))))
  98
  99 #define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \
 100     readb((a)->hw_addr + E1000_REGISTER(a, reg) + (offset)))
 101
 102 #define E1000_WRITE_REG_IO(a, reg, offset) do { \
 103     outl(reg, ((a)->io_base));                  \
 104     outl(offset, ((a)->io_base + 4));      } while(0)
 105
 106 #define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, E1000_STATUS)
 107
 108 #define E1000_WRITE_FLASH_REG(a, reg, value) ( \
 109     writel((value), ((a)->flash_address + reg)))
 110
 111 #define E1000_WRITE_FLASH_REG16(a, reg, value) ( \
 112     writew((value), ((a)->flash_address + reg)))
 113
 114 #define E1000_READ_FLASH_REG(a, reg) (readl((a)->flash_address + reg))
 115
 116 #define E1000_READ_FLASH_REG16(a, reg) (readw((a)->flash_address + reg))
 117
 118 #endif /* _E1000_OSDEP_H_ */