src/include/gpxe/i2c.h

   1 #ifndef _GPXE_I2C_H
   2 #define _GPXE_I2C_H
   3
   4 /** @file
   5  *
   6  * I2C interface
   7  *
   8  */
   9
  10 FILE_LICENCE ( GPL2_OR_LATER );
  11
  12 #include <stdint.h>
  13 #include <gpxe/bitbash.h>
  14
  15 /** An I2C device
  16  *
  17  * An I2C device represents a specific slave device on an I2C bus.  It
  18  * is accessed via an I2C interface.
  19  */
  20 struct i2c_device {
  21         /** Address of this device
  22          *
  23          * The actual address sent on the bus will look like
  24          *
  25          *    <start> <device address> <word address overflow> <r/w>
  26          *
  27          * The "word address overflow" is any excess bits from the
  28          * word address, i.e. any portion that does not fit within the
  29          * defined word address length.
  30          */
  31         unsigned int dev_addr;
  32         /** Device address length, in bytes
  33          *
  34          * This is the number of bytes that comprise the device
  35          * address, defined to be the portion that terminates with the
  36          * read/write bit.
  37          */
  38         unsigned int dev_addr_len;
  39         /** Word adddress length, in bytes
  40          *
  41          * This is the number of bytes that comprise the word address,
  42          * defined to be the portion that starts after the read/write
  43          * bit and ends before the first data byte.
  44          *
  45          * For some devices, this length will be zero (i.e. the word
  46          * address is contained entirely within the "word address
  47          * overflow").
  48          */
  49         unsigned int word_addr_len;
  50 };
  51
  52 /** An I2C interface
  53  *
  54  * An I2C interface provides access to an I2C bus, via which I2C
  55  * devices may be reached.
  56  */
  57 struct i2c_interface {
  58         /**
  59          * Read data from I2C device
  60          *
  61          * @v i2c               I2C interface
  62          * @v i2cdev            I2C device
  63          * @v offset            Starting offset within the device
  64          * @v data              Data buffer
  65          * @v len               Length of data buffer
  66          * @ret rc              Return status code
  67          */
  68         int ( * read ) ( struct i2c_interface *i2c, struct i2c_device *i2cdev,
  69                          unsigned int offset, uint8_t *data,
  70                          unsigned int len );
  71         /**
  72          * Write data to I2C device
  73          *
  74          * @v i2c               I2C interface
  75          * @v i2cdev            I2C device
  76          * @v offset            Starting offset within the device
  77          * @v data              Data buffer
  78          * @v len               Length of data buffer
  79          * @ret rc              Return status code
  80          */
  81         int ( * write ) ( struct i2c_interface *i2c, struct i2c_device *i2cdev,
  82                           unsigned int offset, const uint8_t *data,
  83                           unsigned int len );
  84 };
  85
  86 /** A bit-bashing I2C interface
  87  *
  88  * This provides a standardised way to construct I2C buses via a
  89  * bit-bashing interface.
  90  */
  91 struct i2c_bit_basher {
  92         /** I2C interface */
  93         struct i2c_interface i2c;
  94         /** Bit-bashing interface */
  95         struct bit_basher basher;
  96 };
  97
  98 /** Ten-bit address marker
  99  *
 100  * This value is ORed with the I2C device address to indicate a
 101  * ten-bit address format on the bus.
 102  */
 103 #define I2C_TENBIT_ADDRESS 0x7800
 104
 105 /** An I2C write command */
 106 #define I2C_WRITE 0
 107
 108 /** An I2C read command */
 109 #define I2C_READ 1
 110
 111 /** Bit indices used for I2C bit-bashing interface */
 112 enum {
 113         /** Serial clock */
 114         I2C_BIT_SCL = 0,
 115         /** Serial data */
 116         I2C_BIT_SDA,
 117 };
 118
 119 /** Delay required for bit-bashing operation */
 120 #define I2C_UDELAY 5
 121
 122 /** Maximum number of cycles to use when attempting a bus reset */
 123 #define I2C_RESET_MAX_CYCLES 32
 124
 125 /**
 126  * Check presence of I2C device
 127  *
 128  * @v i2c               I2C interface
 129  * @v i2cdev            I2C device
 130  * @ret rc              Return status code
 131  *
 132  * Checks for the presence of the device on the I2C bus by attempting
 133  * a zero-length write.
 134  */
 135 static inline int i2c_check_presence ( struct i2c_interface *i2c,
 136                                        struct i2c_device *i2cdev ) {
 137         return i2c->write ( i2c, i2cdev, 0, NULL, 0 );
 138 }
 139
 140 extern int init_i2c_bit_basher ( struct i2c_bit_basher *i2cbit,
 141                                  struct bit_basher_operations *bash_op );
 142
 143 /**
 144  * Initialise generic I2C EEPROM device
 145  *
 146  * @v i2cdev            I2C device
 147  */
 148 static inline __always_inline void
 149 init_i2c_eeprom ( struct i2c_device *i2cdev, unsigned int dev_addr ) {
 150         i2cdev->dev_addr = dev_addr;
 151         i2cdev->dev_addr_len = 1;
 152         i2cdev->word_addr_len = 1;
 153 }
 154
 155 /**
 156  * Initialise Atmel AT24C11
 157  *
 158  * @v i2cdev            I2C device
 159  */
 160 static inline __always_inline void
 161 init_at24c11 ( struct i2c_device *i2cdev ) {
 162         /* This chip has no device address; it must be the only chip
 163          * on the bus.  The word address is contained entirely within
 164          * the device address field.
 165          */
 166         i2cdev->dev_addr = 0;
 167         i2cdev->dev_addr_len = 1;
 168         i2cdev->word_addr_len = 0;
 169 }
 170
 171 #endif /* _GPXE_I2C_H */