5 #include <gpxe/blockdev.h>
6 #include <gpxe/uaccess.h>
7 #include <gpxe/refcnt.h>
16 * An ATA Logical Block Address
18 * ATA controllers have three byte-wide registers for specifying the
19 * block address: LBA Low, LBA Mid and LBA High. This allows for a
20 * 24-bit address. Some devices support the "48-bit address feature
21 * set" (LBA48), in which case each of these byte-wide registers is
22 * actually a two-entry FIFO, and the "previous" byte pushed into the
23 * FIFO is used as the corresponding high-order byte. So, to set up
24 * the 48-bit address 0x123456abcdef, you would issue
26 * 0x56 -> LBA Low register
27 * 0xef -> LBA Low register
28 * 0x34 -> LBA Mid register
29 * 0xcd -> LBA Mid register
30 * 0x12 -> LBA High register
31 * 0xab -> LBA High register
33 * This structure encapsulates this information by providing a single
34 * 64-bit integer in native byte order, unioned with bytes named so
35 * that the sequence becomes
37 * low_prev -> LBA Low register
38 * low_cur -> LBA Low register
39 * mid_prev -> LBA Mid register
40 * mid_cur -> LBA Mid register
41 * high_prev -> LBA High register
42 * high_cur -> LBA High register
44 * Just to complicate matters further, in non-LBA48 mode it is
45 * possible to have a 28-bit address, in which case bits 27:24 must be
46 * written into the low four bits of the Device register.
49 /** LBA as a 64-bit integer in native-endian order */
53 #if __BYTE_ORDER == __LITTLE_ENDIAN
61 #elif __BYTE_ORDER == __BIG_ENDIAN
70 #error "I need a byte order"
75 /** An ATA 2-byte FIFO register */
77 /** Value in native-endian order */
81 #if __BYTE_ORDER == __LITTLE_ENDIAN
84 #elif __BYTE_ORDER == __BIG_ENDIAN
88 #error "I need a byte order"
93 /** ATA command block */
95 /** Logical block address */
99 /** Error/feature register */
100 union ata_fifo err_feat
;
101 /** Device register */
103 /** Command/status register */
105 /** LBA48 addressing flag */
109 /** Obsolete bits in the ATA device register */
110 #define ATA_DEV_OBSOLETE 0xa0
112 /** LBA flag in the ATA device register */
113 #define ATA_DEV_LBA 0x40
115 /** Slave ("device 1") flag in the ATA device register */
116 #define ATA_DEV_SLAVE 0x10
118 /** Master ("device 0") flag in the ATA device register */
119 #define ATA_DEV_MASTER 0x00
121 /** Mask of non-LBA portion of device register */
122 #define ATA_DEV_MASK 0xf0
124 /** "Read sectors" command */
125 #define ATA_CMD_READ 0x20
127 /** "Read sectors (ext)" command */
128 #define ATA_CMD_READ_EXT 0x24
130 /** "Write sectors" command */
131 #define ATA_CMD_WRITE 0x30
133 /** "Write sectors (ext)" command */
134 #define ATA_CMD_WRITE_EXT 0x34
136 /** "Identify" command */
137 #define ATA_CMD_IDENTIFY 0xec
139 /** An ATA command */
141 /** ATA command block */
143 /** Data-out buffer (may be NULL)
145 * If non-NULL, this buffer must be ata_command::cb::count
149 /** Data-in buffer (may be NULL)
151 * If non-NULL, this buffer must be ata_command::cb::count
158 * Structure returned by ATA IDENTIFY command
160 * This is a huge structure with many fields that we don't care about,
161 * so we implement only a few fields.
163 struct ata_identity
{
164 uint16_t ignore_a
[60]; /* words 0-59 */
165 uint32_t lba_sectors
; /* words 60-61 */
166 uint16_t ignore_b
[21]; /* words 62-82 */
167 uint16_t supports_lba48
; /* word 83 */
168 uint16_t ignore_c
[16]; /* words 84-99 */
169 uint64_t lba48_sectors
; /* words 100-103 */
170 uint16_t ignore_d
[152]; /* words 104-255 */
173 /** Supports LBA48 flag */
174 #define ATA_SUPPORTS_LBA48 ( 1 << 10 )
176 /** ATA sector size */
177 #define ATA_SECTOR_SIZE 512
181 /** Block device interface */
182 struct block_device blockdev
;
185 * Must be ATA_DEV_MASTER or ATA_DEV_SLAVE.
188 /** LBA48 extended addressing */
194 * @v command ATA command
195 * @ret rc Return status code
197 int ( * command
) ( struct ata_device
*ata
,
198 struct ata_command
*command
);
199 /** Backing device */
200 struct refcnt
*backend
;
203 extern int init_atadev ( struct ata_device
*ata
);
205 #endif /* _GPXE_ATA_H */