2 * Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of the
7 * License, or any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <gpxe/threewire.h>
26 * Three-wire serial devices
31 * Read data from three-wire device
34 * @v address Address from which to read
36 * @v len Length of data buffer
37 * @ret rc Return status code
39 int threewire_read ( struct nvs_device
*nvs
, unsigned int address
,
40 void *data
, size_t len
) {
41 struct spi_device
*device
= nvs_to_spi ( nvs
);
42 struct spi_bus
*bus
= device
->bus
;
44 assert ( bus
->mode
== SPI_MODE_THREEWIRE
);
46 DBG ( "3wire %p reading %d bytes at %04x\n", device
, len
, address
);
48 return bus
->rw ( bus
, device
, THREEWIRE_READ
, address
,
53 * Write data to three-wire device
56 * @v address Address from which to read
58 * @v len Length of data buffer
59 * @ret rc Return status code
61 int threewire_write ( struct nvs_device
*nvs
, unsigned int address
,
62 const void *data
, size_t len
) {
63 struct spi_device
*device
= nvs_to_spi ( nvs
);
64 struct spi_bus
*bus
= device
->bus
;
67 assert ( bus
->mode
== SPI_MODE_THREEWIRE
);
69 DBG ( "3wire %p writing %d bytes at %04x\n", device
, len
, address
);
71 /* Enable device for writing */
72 if ( ( rc
= bus
->rw ( bus
, device
, THREEWIRE_EWEN
,
73 THREEWIRE_EWEN_ADDRESS
, NULL
, NULL
, 0 ) ) != 0 )
77 if ( ( rc
= bus
->rw ( bus
, device
, THREEWIRE_WRITE
, address
,
78 data
, NULL
, len
) ) != 0 )
81 /* Our model of an SPI bus doesn't provide a mechanism for
82 * "assert CS, wait for MISO to become high, so just wait for
83 * long enough to ensure that the write has completed.
85 mdelay ( THREEWIRE_WRITE_MDELAY
);