Make gpxe build.
[gpxe/hramrach.git] / src / drivers / net / e1000e / e1000e_main.c
blob0aececd6c9d663e5761b8d6883feb53bd996ba8a
1 /*******************************************************************************
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
6 Portions Copyright(c) 2010 Marty Connor <mdc@etherboot.org>
7 Portions Copyright(c) 2010 Entity Cyber, Inc.
8 Portions Copyright(c) 2010 Northrop Grumman Corporation
10 This program is free software; you can redistribute it and/or modify it
11 under the terms and conditions of the GNU General Public License,
12 version 2, as published by the Free Software Foundation.
14 This program is distributed in the hope it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 more details.
19 You should have received a copy of the GNU General Public License along with
20 this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
23 The full GNU General Public License is included in this distribution in
24 the file called "COPYING".
26 Contact Information:
27 Linux NICS <linux.nics@intel.com>
28 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
29 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *******************************************************************************/
33 FILE_LICENCE ( GPL2_OR_LATER );
35 #include "e1000e.h"
37 static s32 e1000e_get_variants_82571(struct e1000_adapter *adapter)
39 struct e1000_hw *hw = &adapter->hw;
40 static int global_quad_port_a; /* global port a indication */
41 struct pci_device *pdev = adapter->pdev;
42 u16 eeprom_data = 0;
43 int is_port_b = er32(STATUS) & E1000_STATUS_FUNC_1;
45 /* tag quad port adapters first, it's used below */
46 switch (pdev->device) {
47 case E1000_DEV_ID_82571EB_QUAD_COPPER:
48 case E1000_DEV_ID_82571EB_QUAD_FIBER:
49 case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
50 case E1000_DEV_ID_82571PT_QUAD_COPPER:
51 adapter->flags |= FLAG_IS_QUAD_PORT;
52 /* mark the first port */
53 if (global_quad_port_a == 0)
54 adapter->flags |= FLAG_IS_QUAD_PORT_A;
55 /* Reset for multiple quad port adapters */
56 global_quad_port_a++;
57 if (global_quad_port_a == 4)
58 global_quad_port_a = 0;
59 break;
60 default:
61 break;
64 switch (adapter->hw.mac.type) {
65 case e1000_82571:
66 /* these dual ports don't have WoL on port B at all */
67 if (((pdev->device == E1000_DEV_ID_82571EB_FIBER) ||
68 (pdev->device == E1000_DEV_ID_82571EB_SERDES) ||
69 (pdev->device == E1000_DEV_ID_82571EB_COPPER)) &&
70 (is_port_b))
71 adapter->flags &= ~FLAG_HAS_WOL;
72 /* quad ports only support WoL on port A */
73 if (adapter->flags & FLAG_IS_QUAD_PORT &&
74 (!(adapter->flags & FLAG_IS_QUAD_PORT_A)))
75 adapter->flags &= ~FLAG_HAS_WOL;
76 /* Does not support WoL on any port */
77 if (pdev->device == E1000_DEV_ID_82571EB_SERDES_QUAD)
78 adapter->flags &= ~FLAG_HAS_WOL;
79 break;
81 case e1000_82573:
82 if (pdev->device == E1000_DEV_ID_82573L) {
83 if (e1000e_read_nvm(&adapter->hw, NVM_INIT_3GIO_3, 1,
84 &eeprom_data) < 0)
85 break;
86 if (!(eeprom_data & NVM_WORD1A_ASPM_MASK)) {
87 adapter->flags |= FLAG_HAS_JUMBO_FRAMES;
88 adapter->max_hw_frame_size = DEFAULT_JUMBO;
91 break;
93 default:
94 break;
97 return 0;
100 static struct e1000_info e1000_82571_info = {
101 .mac = e1000_82571,
102 .flags = FLAG_HAS_HW_VLAN_FILTER
103 | FLAG_HAS_JUMBO_FRAMES
104 | FLAG_HAS_WOL
105 | FLAG_APME_IN_CTRL3
106 | FLAG_RX_CSUM_ENABLED
107 | FLAG_HAS_CTRLEXT_ON_LOAD
108 | FLAG_HAS_SMART_POWER_DOWN
109 | FLAG_RESET_OVERWRITES_LAA /* errata */
110 | FLAG_TARC_SPEED_MODE_BIT /* errata */
111 | FLAG_APME_CHECK_PORT_B,
112 .pba = 38,
113 .max_hw_frame_size = DEFAULT_JUMBO,
114 .init_ops = e1000e_init_function_pointers_82571,
115 .get_variants = e1000e_get_variants_82571,
118 static struct e1000_info e1000_82572_info = {
119 .mac = e1000_82572,
120 .flags = FLAG_HAS_HW_VLAN_FILTER
121 | FLAG_HAS_JUMBO_FRAMES
122 | FLAG_HAS_WOL
123 | FLAG_APME_IN_CTRL3
124 | FLAG_RX_CSUM_ENABLED
125 | FLAG_HAS_CTRLEXT_ON_LOAD
126 | FLAG_TARC_SPEED_MODE_BIT, /* errata */
127 .pba = 38,
128 .max_hw_frame_size = DEFAULT_JUMBO,
129 .init_ops = e1000e_init_function_pointers_82571,
130 .get_variants = e1000e_get_variants_82571,
133 static struct e1000_info e1000_82573_info = {
134 .mac = e1000_82573,
135 .flags = FLAG_HAS_HW_VLAN_FILTER
136 | FLAG_HAS_WOL
137 | FLAG_APME_IN_CTRL3
138 | FLAG_RX_CSUM_ENABLED
139 | FLAG_HAS_SMART_POWER_DOWN
140 | FLAG_HAS_AMT
141 | FLAG_HAS_ERT
142 | FLAG_HAS_SWSM_ON_LOAD,
143 .pba = 20,
144 .max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN,
145 .init_ops = e1000e_init_function_pointers_82571,
146 .get_variants = e1000e_get_variants_82571,
149 static struct e1000_info e1000_82574_info = {
150 .mac = e1000_82574,
151 .flags = FLAG_HAS_HW_VLAN_FILTER
152 #ifdef CONFIG_E1000E_MSIX
153 | FLAG_HAS_MSIX
154 #endif
155 | FLAG_HAS_JUMBO_FRAMES
156 | FLAG_HAS_WOL
157 | FLAG_APME_IN_CTRL3
158 | FLAG_RX_CSUM_ENABLED
159 | FLAG_HAS_SMART_POWER_DOWN
160 | FLAG_HAS_AMT
161 | FLAG_HAS_CTRLEXT_ON_LOAD,
162 .pba = 20,
163 .max_hw_frame_size = DEFAULT_JUMBO,
164 .init_ops = e1000e_init_function_pointers_82571,
165 .get_variants = e1000e_get_variants_82571,
168 static struct e1000_info e1000_82583_info = {
169 .mac = e1000_82583,
170 .flags = FLAG_HAS_HW_VLAN_FILTER
171 | FLAG_HAS_WOL
172 | FLAG_APME_IN_CTRL3
173 | FLAG_RX_CSUM_ENABLED
174 | FLAG_HAS_SMART_POWER_DOWN
175 | FLAG_HAS_AMT
176 | FLAG_HAS_CTRLEXT_ON_LOAD,
177 .pba = 20,
178 .max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN,
179 .init_ops = e1000e_init_function_pointers_82571,
180 .get_variants = e1000e_get_variants_82571,
183 static struct e1000_info e1000_es2_info = {
184 .mac = e1000_80003es2lan,
185 .flags = FLAG_HAS_HW_VLAN_FILTER
186 | FLAG_HAS_JUMBO_FRAMES
187 | FLAG_HAS_WOL
188 | FLAG_APME_IN_CTRL3
189 | FLAG_RX_CSUM_ENABLED
190 | FLAG_HAS_CTRLEXT_ON_LOAD
191 | FLAG_RX_NEEDS_RESTART /* errata */
192 | FLAG_TARC_SET_BIT_ZERO /* errata */
193 | FLAG_APME_CHECK_PORT_B
194 | FLAG_DISABLE_FC_PAUSE_TIME /* errata */
195 | FLAG_TIPG_MEDIUM_FOR_80003ESLAN,
196 .pba = 38,
197 .max_hw_frame_size = DEFAULT_JUMBO,
198 .init_ops = e1000e_init_function_pointers_80003es2lan,
199 .get_variants = NULL,
202 static s32 e1000e_get_variants_ich8lan(struct e1000_adapter *adapter)
204 if (adapter->hw.phy.type == e1000_phy_ife) {
205 adapter->flags &= ~FLAG_HAS_JUMBO_FRAMES;
206 adapter->max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN;
209 if ((adapter->hw.mac.type == e1000_ich8lan) &&
210 (adapter->hw.phy.type == e1000_phy_igp_3))
211 adapter->flags |= FLAG_LSC_GIG_SPEED_DROP;
213 return 0;
216 static struct e1000_info e1000_ich8_info = {
217 .mac = e1000_ich8lan,
218 .flags = FLAG_HAS_WOL
219 | FLAG_IS_ICH
220 | FLAG_RX_CSUM_ENABLED
221 | FLAG_HAS_CTRLEXT_ON_LOAD
222 | FLAG_HAS_AMT
223 | FLAG_HAS_FLASH
224 | FLAG_APME_IN_WUC,
225 .pba = 8,
226 .max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN,
227 .init_ops = e1000e_init_function_pointers_ich8lan,
228 .get_variants = e1000e_get_variants_ich8lan,
231 static struct e1000_info e1000_ich9_info = {
232 .mac = e1000_ich9lan,
233 .flags = FLAG_HAS_JUMBO_FRAMES
234 | FLAG_IS_ICH
235 | FLAG_HAS_WOL
236 | FLAG_RX_CSUM_ENABLED
237 | FLAG_HAS_CTRLEXT_ON_LOAD
238 | FLAG_HAS_AMT
239 | FLAG_HAS_ERT
240 | FLAG_HAS_FLASH
241 | FLAG_APME_IN_WUC,
242 .pba = 10,
243 .max_hw_frame_size = DEFAULT_JUMBO,
244 .init_ops = e1000e_init_function_pointers_ich8lan,
245 .get_variants = e1000e_get_variants_ich8lan,
248 static struct e1000_info e1000_ich10_info = {
249 .mac = e1000_ich10lan,
250 .flags = FLAG_HAS_JUMBO_FRAMES
251 | FLAG_IS_ICH
252 | FLAG_HAS_WOL
253 | FLAG_RX_CSUM_ENABLED
254 | FLAG_HAS_CTRLEXT_ON_LOAD
255 | FLAG_HAS_AMT
256 | FLAG_HAS_ERT
257 | FLAG_HAS_FLASH
258 | FLAG_APME_IN_WUC,
259 .pba = 10,
260 .max_hw_frame_size = DEFAULT_JUMBO,
261 .init_ops = e1000e_init_function_pointers_ich8lan,
262 .get_variants = e1000e_get_variants_ich8lan,
265 static struct e1000_info e1000_pch_info = {
266 .mac = e1000_pchlan,
267 .flags = FLAG_IS_ICH
268 | FLAG_HAS_WOL
269 | FLAG_RX_CSUM_ENABLED
270 | FLAG_HAS_CTRLEXT_ON_LOAD
271 | FLAG_HAS_AMT
272 | FLAG_HAS_FLASH
273 | FLAG_HAS_JUMBO_FRAMES
274 | FLAG_DISABLE_FC_PAUSE_TIME /* errata */
275 | FLAG_APME_IN_WUC,
276 .pba = 26,
277 .max_hw_frame_size = 4096,
278 .init_ops = e1000e_init_function_pointers_ich8lan,
279 .get_variants = e1000e_get_variants_ich8lan,
282 static const struct e1000_info *e1000_info_tbl[] = {
283 [board_82571] = &e1000_82571_info,
284 [board_82572] = &e1000_82572_info,
285 [board_82573] = &e1000_82573_info,
286 [board_82574] = &e1000_82574_info,
287 [board_82583] = &e1000_82583_info,
288 [board_80003es2lan] = &e1000_es2_info,
289 [board_ich8lan] = &e1000_ich8_info,
290 [board_ich9lan] = &e1000_ich9_info,
291 [board_ich10lan] = &e1000_ich10_info,
292 [board_pchlan] = &e1000_pch_info,
295 /* Low-level support routines */
297 s32 e1000e_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
299 u16 cap_offset;
301 cap_offset = pci_find_capability(hw->adapter->pdev, PCI_CAP_ID_EXP);
302 if (!cap_offset)
303 return -E1000_ERR_CONFIG;
305 pci_read_config_word(hw->adapter->pdev, cap_offset + reg, value);
307 return E1000_SUCCESS;
311 * e1000e_irq_disable - Mask off interrupt generation on the NIC
313 static void e1000e_irq_disable(struct e1000_adapter *adapter)
315 struct e1000_hw *hw = &adapter->hw;
317 ew32(IMC, ~0);
318 e1e_flush();
322 * e1000e_irq_enable - Enable default interrupt generation settings
324 static void e1000e_irq_enable(struct e1000_adapter *adapter)
326 struct e1000_hw *hw = &adapter->hw;
328 ew32(IMS, IMS_ENABLE_MASK);
329 e1e_flush();
333 * e1000_get_hw_control - get control of the h/w from f/w
334 * @adapter: address of board private structure
336 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
337 * For ASF and Pass Through versions of f/w this means that
338 * the driver is loaded. For AMT version (only with 82573)
339 * of the f/w this means that the network i/f is open.
341 static void e1000e_get_hw_control(struct e1000_adapter *adapter)
343 struct e1000_hw *hw = &adapter->hw;
344 u32 ctrl_ext;
345 u32 swsm;
347 /* Let firmware know the driver has taken over */
348 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
349 swsm = er32(SWSM);
350 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
351 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
352 ctrl_ext = er32(CTRL_EXT);
353 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
358 * e1000e_power_up_phy - restore link in case the phy was powered down
359 * @adapter: address of board private structure
361 * The phy may be powered down to save power and turn off link when the
362 * driver is unloaded and wake on lan is not enabled (among others)
363 * *** this routine MUST be followed by a call to e1000e_reset ***
365 void e1000e_power_up_phy(struct e1000_adapter *adapter)
367 if (adapter->hw.phy.ops.power_up)
368 adapter->hw.phy.ops.power_up(&adapter->hw);
370 adapter->hw.mac.ops.setup_link(&adapter->hw);
374 * e1000_power_down_phy - Power down the PHY
376 * Power down the PHY so no link is implied when interface is down.
377 * The PHY cannot be powered down if management or WoL is active.
379 void e1000e_power_down_phy(struct e1000_adapter *adapter)
381 /* WoL is enabled */
382 if (adapter->wol)
383 return;
385 if (adapter->hw.phy.ops.power_down)
386 adapter->hw.phy.ops.power_down(&adapter->hw);
390 * e1000e_reset - bring the hardware into a known good state
392 * This function boots the hardware and enables some settings that
393 * require a configuration cycle of the hardware - those cannot be
394 * set/changed during runtime. After reset the device needs to be
395 * properly configured for Rx, Tx etc.
397 void e1000e_reset(struct e1000_adapter *adapter)
399 struct e1000_mac_info *mac = &adapter->hw.mac;
400 struct e1000_fc_info *fc = &adapter->hw.fc;
401 u32 pba = adapter->pba;
402 struct e1000_hw *hw = &adapter->hw;
404 /* Reset Packet Buffer Allocation to default */
405 ew32(PBA, pba);
407 hw->fc.requested_mode = e1000_fc_none;
408 fc->current_mode = fc->requested_mode;
410 /* Allow time for pending master requests to run */
411 mac->ops.reset_hw(hw);
414 * For parts with AMT enabled, let the firmware know
415 * that the network interface is in control
417 if (adapter->flags & FLAG_HAS_AMT)
418 e1000e_get_hw_control(adapter);
420 ew32(WUC, 0);
421 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
422 e1e_wphy(&adapter->hw, BM_WUC, 0);
424 if (mac->ops.init_hw(hw))
425 DBG("Hardware Error\n");
427 /* additional part of the flow-control workaround above */
428 if (hw->mac.type == e1000_pchlan)
429 ew32(FCRTV_PCH, 0x1000);
431 e1000e_reset_adaptive(hw);
433 e1000e_get_phy_info(hw);
435 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
436 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
437 u16 phy_data = 0;
439 * speed up time to link by disabling smart power down, ignore
440 * the return value of this function because there is nothing
441 * different we would do if it failed
443 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
444 phy_data &= ~IGP02E1000_PM_SPD;
445 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
449 static int e1000e_sw_init(struct e1000_adapter *adapter)
451 s32 rc;
453 /* Set various function pointers */
454 adapter->ei->init_ops(&adapter->hw);
456 rc = adapter->hw.mac.ops.init_params(&adapter->hw);
457 if (rc)
458 return rc;
460 rc = adapter->hw.nvm.ops.init_params(&adapter->hw);
461 if (rc)
462 return rc;
464 rc = adapter->hw.phy.ops.init_params(&adapter->hw);
465 if (rc)
466 return rc;
468 /* Explicitly disable IRQ since the NIC can be in any state. */
469 e1000e_irq_disable(adapter);
471 return E1000_SUCCESS;
474 /* TX support routines */
477 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
479 * @v adapter e1000 private structure
481 * @ret rc Returns 0 on success, negative on failure
483 static int e1000e_setup_tx_resources ( struct e1000_adapter *adapter )
485 DBGP ( "e1000_setup_tx_resources\n" );
487 /* Allocate transmit descriptor ring memory.
488 It must not cross a 64K boundary because of hardware errata #23
489 so we use malloc_dma() requesting a 128 byte block that is
490 128 byte aligned. This should guarantee that the memory
491 allocated will not cross a 64K boundary, because 128 is an
492 even multiple of 65536 ( 65536 / 128 == 512 ), so all possible
493 allocations of 128 bytes on a 128 byte boundary will not
494 cross 64K bytes.
497 adapter->tx_base =
498 malloc_dma ( adapter->tx_ring_size, adapter->tx_ring_size );
500 if ( ! adapter->tx_base ) {
501 return -ENOMEM;
504 memset ( adapter->tx_base, 0, adapter->tx_ring_size );
506 DBG ( "adapter->tx_base = %#08lx\n", virt_to_bus ( adapter->tx_base ) );
508 return 0;
512 * e1000_process_tx_packets - process transmitted packets
514 * @v netdev network interface device structure
516 static void e1000e_process_tx_packets ( struct net_device *netdev )
518 struct e1000_adapter *adapter = netdev_priv ( netdev );
519 uint32_t i;
520 uint32_t tx_status;
521 struct e1000_tx_desc *tx_curr_desc;
523 /* Check status of transmitted packets
525 DBG ( "process_tx_packets: tx_head = %d, tx_tail = %d\n", adapter->tx_head,
526 adapter->tx_tail );
528 while ( ( i = adapter->tx_head ) != adapter->tx_tail ) {
530 tx_curr_desc = ( void * ) ( adapter->tx_base ) +
531 ( i * sizeof ( *adapter->tx_base ) );
533 tx_status = tx_curr_desc->upper.data;
535 DBG ( " tx_curr_desc = %#08lx\n", virt_to_bus ( tx_curr_desc ) );
536 DBG ( " tx_status = %#08x\n", tx_status );
538 /* if the packet at tx_head is not owned by hardware it is for us */
539 if ( ! ( tx_status & E1000_TXD_STAT_DD ) )
540 break;
542 DBG ( "Sent packet. tx_head: %d tx_tail: %d tx_status: %#08x\n",
543 adapter->tx_head, adapter->tx_tail, tx_status );
545 if ( tx_status & ( E1000_TXD_STAT_EC | E1000_TXD_STAT_LC |
546 E1000_TXD_STAT_TU ) ) {
547 netdev_tx_complete_err ( netdev, adapter->tx_iobuf[i], -EINVAL );
548 DBG ( "Error transmitting packet, tx_status: %#08x\n",
549 tx_status );
550 } else {
551 netdev_tx_complete ( netdev, adapter->tx_iobuf[i] );
552 DBG ( "Success transmitting packet, tx_status: %#08x\n",
553 tx_status );
556 /* Decrement count of used descriptors, clear this descriptor
558 adapter->tx_fill_ctr--;
559 memset ( tx_curr_desc, 0, sizeof ( *tx_curr_desc ) );
561 adapter->tx_head = ( adapter->tx_head + 1 ) % NUM_TX_DESC;
565 static void e1000e_free_tx_resources ( struct e1000_adapter *adapter )
567 DBGP ( "e1000_free_tx_resources\n" );
569 free_dma ( adapter->tx_base, adapter->tx_ring_size );
573 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
574 * @adapter: board private structure
576 * Configure the Tx unit of the MAC after a reset.
578 static void e1000e_configure_tx ( struct e1000_adapter *adapter )
580 struct e1000_hw *hw = &adapter->hw;
581 u32 tctl, tipg, tarc;
582 u32 ipgr1, ipgr2;
584 DBGP ( "e1000_configure_tx\n" );
586 /* disable transmits while setting up the descriptors */
587 tctl = E1000_READ_REG ( hw, E1000_TCTL );
588 E1000_WRITE_REG ( hw, E1000_TCTL, tctl & ~E1000_TCTL_EN );
589 e1e_flush();
590 mdelay(10);
592 E1000_WRITE_REG ( hw, E1000_TDBAH(0), 0 );
593 E1000_WRITE_REG ( hw, E1000_TDBAL(0), virt_to_bus ( adapter->tx_base ) );
594 E1000_WRITE_REG ( hw, E1000_TDLEN(0), adapter->tx_ring_size );
596 DBG ( "E1000_TDBAL(0): %#08x\n", E1000_READ_REG ( hw, E1000_TDBAL(0) ) );
597 DBG ( "E1000_TDLEN(0): %d\n", E1000_READ_REG ( hw, E1000_TDLEN(0) ) );
599 /* Setup the HW Tx Head and Tail descriptor pointers */
600 E1000_WRITE_REG ( hw, E1000_TDH(0), 0 );
601 E1000_WRITE_REG ( hw, E1000_TDT(0), 0 );
603 adapter->tx_head = 0;
604 adapter->tx_tail = 0;
605 adapter->tx_fill_ctr = 0;
607 /* Set the default values for the Tx Inter Packet Gap timer */
608 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
609 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
610 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
612 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
613 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
615 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
616 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
617 ew32(TIPG, tipg);
619 /* Program the Transmit Control Register */
620 tctl = er32(TCTL);
621 tctl &= ~E1000_TCTL_CT;
622 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
623 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
625 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
626 tarc = er32(TARC(0));
628 * set the speed mode bit, we'll clear it if we're not at
629 * gigabit link later
631 #define SPEED_MODE_BIT (1 << 21)
632 tarc |= SPEED_MODE_BIT;
633 ew32(TARC(0), tarc);
636 /* errata: program both queues to unweighted RR */
637 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
638 tarc = er32(TARC(0));
639 tarc |= 1;
640 ew32(TARC(0), tarc);
641 tarc = er32(TARC(1));
642 tarc |= 1;
643 ew32(TARC(1), tarc);
646 /* Setup Transmit Descriptor Settings for eop descriptor */
647 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
649 /* enable Report Status bit */
650 adapter->txd_cmd |= E1000_TXD_CMD_RS;
653 * enable transmits in the hardware, need to do this
654 * after setting TARC(0)
656 tctl |= E1000_TCTL_EN;
657 ew32(TCTL, tctl);
658 e1e_flush();
660 e1000e_config_collision_dist(hw);
663 /* RX support routines */
665 static void e1000e_free_rx_resources ( struct e1000_adapter *adapter )
667 int i;
669 DBGP ( "e1000_free_rx_resources\n" );
671 free_dma ( adapter->rx_base, adapter->rx_ring_size );
673 for ( i = 0; i < NUM_RX_DESC; i++ ) {
674 free_iob ( adapter->rx_iobuf[i] );
679 * e1000_refill_rx_ring - allocate Rx io_buffers
681 * @v adapter e1000 private structure
683 * @ret rc Returns 0 on success, negative on failure
685 static int e1000e_refill_rx_ring ( struct e1000_adapter *adapter )
687 int i, rx_curr;
688 int rc = 0;
689 struct e1000_rx_desc *rx_curr_desc;
690 struct e1000_hw *hw = &adapter->hw;
691 struct io_buffer *iob;
693 DBGP ("e1000_refill_rx_ring\n");
695 for ( i = 0; i < NUM_RX_DESC; i++ ) {
696 rx_curr = ( ( adapter->rx_curr + i ) % NUM_RX_DESC );
697 rx_curr_desc = adapter->rx_base + rx_curr;
699 if ( rx_curr_desc->status & E1000_RXD_STAT_DD )
700 continue;
702 if ( adapter->rx_iobuf[rx_curr] != NULL )
703 continue;
705 DBG2 ( "Refilling rx desc %d\n", rx_curr );
707 iob = alloc_iob ( MAXIMUM_ETHERNET_VLAN_SIZE );
708 adapter->rx_iobuf[rx_curr] = iob;
710 if ( ! iob ) {
711 DBG ( "alloc_iob failed\n" );
712 rc = -ENOMEM;
713 break;
714 } else {
715 rx_curr_desc->buffer_addr = virt_to_bus ( iob->data );
717 E1000_WRITE_REG ( hw, E1000_RDT(0), rx_curr );
720 return rc;
724 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
726 * @v adapter e1000 private structure
728 * @ret rc Returns 0 on success, negative on failure
730 static int e1000e_setup_rx_resources ( struct e1000_adapter *adapter )
732 int i, rc = 0;
734 DBGP ( "e1000_setup_rx_resources\n" );
736 /* Allocate receive descriptor ring memory.
737 It must not cross a 64K boundary because of hardware errata
740 adapter->rx_base =
741 malloc_dma ( adapter->rx_ring_size, adapter->rx_ring_size );
743 if ( ! adapter->rx_base ) {
744 return -ENOMEM;
746 memset ( adapter->rx_base, 0, adapter->rx_ring_size );
748 for ( i = 0; i < NUM_RX_DESC; i++ ) {
749 /* let e1000_refill_rx_ring() io_buffer allocations */
750 adapter->rx_iobuf[i] = NULL;
753 /* allocate io_buffers */
754 rc = e1000e_refill_rx_ring ( adapter );
755 if ( rc < 0 )
756 e1000e_free_rx_resources ( adapter );
758 return rc;
762 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
763 * @adapter: board private structure
765 * Configure the Rx unit of the MAC after a reset.
767 static void e1000e_configure_rx ( struct e1000_adapter *adapter )
769 struct e1000_hw *hw = &adapter->hw;
770 uint32_t rctl;
772 DBGP ( "e1000_configure_rx\n" );
774 /* disable receives while setting up the descriptors */
775 rctl = E1000_READ_REG ( hw, E1000_RCTL );
776 E1000_WRITE_REG ( hw, E1000_RCTL, rctl & ~E1000_RCTL_EN );
777 e1e_flush();
778 mdelay(10);
780 adapter->rx_curr = 0;
782 /* Setup the HW Rx Head and Tail Descriptor Pointers and
783 * the Base and Length of the Rx Descriptor Ring */
785 E1000_WRITE_REG ( hw, E1000_RDBAL(0), virt_to_bus ( adapter->rx_base ) );
786 E1000_WRITE_REG ( hw, E1000_RDBAH(0), 0 );
787 E1000_WRITE_REG ( hw, E1000_RDLEN(0), adapter->rx_ring_size );
789 E1000_WRITE_REG ( hw, E1000_RDH(0), 0 );
790 E1000_WRITE_REG ( hw, E1000_RDT(0), NUM_RX_DESC - 1 );
792 /* Enable Receives */
793 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
794 E1000_RCTL_MPE;
795 E1000_WRITE_REG ( hw, E1000_RCTL, rctl );
796 e1e_flush();
798 DBG ( "E1000_RDBAL(0): %#08x\n", E1000_READ_REG ( hw, E1000_RDBAL(0) ) );
799 DBG ( "E1000_RDLEN(0): %d\n", E1000_READ_REG ( hw, E1000_RDLEN(0) ) );
800 DBG ( "E1000_RCTL: %#08x\n", E1000_READ_REG ( hw, E1000_RCTL ) );
804 * e1000_process_rx_packets - process received packets
806 * @v netdev network interface device structure
808 static void e1000e_process_rx_packets ( struct net_device *netdev )
810 struct e1000_adapter *adapter = netdev_priv ( netdev );
811 uint32_t i;
812 uint32_t rx_status;
813 uint32_t rx_len;
814 uint32_t rx_err;
815 struct e1000_rx_desc *rx_curr_desc;
817 /* Process received packets
819 while ( 1 ) {
821 i = adapter->rx_curr;
823 rx_curr_desc = ( void * ) ( adapter->rx_base ) +
824 ( i * sizeof ( *adapter->rx_base ) );
825 rx_status = rx_curr_desc->status;
827 DBG2 ( "Before DD Check RX_status: %#08x\n", rx_status );
829 if ( ! ( rx_status & E1000_RXD_STAT_DD ) )
830 break;
832 if ( adapter->rx_iobuf[i] == NULL )
833 break;
835 DBG ( "E1000_RCTL = %#08x\n", E1000_READ_REG ( &adapter->hw, E1000_RCTL ) );
837 rx_len = rx_curr_desc->length;
839 DBG ( "Received packet, rx_curr: %d rx_status: %#08x rx_len: %d\n",
840 i, rx_status, rx_len );
842 rx_err = rx_curr_desc->errors;
844 iob_put ( adapter->rx_iobuf[i], rx_len );
846 if ( rx_err & E1000_RXD_ERR_FRAME_ERR_MASK ) {
848 netdev_rx_err ( netdev, adapter->rx_iobuf[i], -EINVAL );
849 DBG ( "e1000_poll: Corrupted packet received!"
850 " rx_err: %#08x\n", rx_err );
851 } else {
852 /* Add this packet to the receive queue. */
853 netdev_rx ( netdev, adapter->rx_iobuf[i] );
855 adapter->rx_iobuf[i] = NULL;
857 memset ( rx_curr_desc, 0, sizeof ( *rx_curr_desc ) );
859 adapter->rx_curr = ( adapter->rx_curr + 1 ) % NUM_RX_DESC;
863 /** Functions that implement the gPXE driver API **/
866 * e1000_close - Disables a network interface
868 * @v netdev network interface device structure
871 static void e1000e_close ( struct net_device *netdev )
873 struct e1000_adapter *adapter = netdev_priv ( netdev );
874 struct e1000_hw *hw = &adapter->hw;
875 uint32_t rctl;
877 DBGP ( "e1000_close\n" );
879 /* Acknowledge interrupts */
880 E1000_READ_REG ( hw, E1000_ICR );
882 e1000e_irq_disable ( adapter );
884 /* disable receives */
885 rctl = E1000_READ_REG ( hw, E1000_RCTL );
886 E1000_WRITE_REG ( hw, E1000_RCTL, rctl & ~E1000_RCTL_EN );
887 e1e_flush();
889 e1000e_reset ( adapter );
891 e1000e_free_tx_resources ( adapter );
892 e1000e_free_rx_resources ( adapter );
896 * e1000_transmit - Transmit a packet
898 * @v netdev Network device
899 * @v iobuf I/O buffer
901 * @ret rc Returns 0 on success, negative on failure
903 static int e1000e_transmit ( struct net_device *netdev, struct io_buffer *iobuf )
905 struct e1000_adapter *adapter = netdev_priv( netdev );
906 struct e1000_hw *hw = &adapter->hw;
907 uint32_t tx_curr = adapter->tx_tail;
908 struct e1000_tx_desc *tx_curr_desc;
910 DBGP ("e1000_transmit\n");
912 if ( adapter->tx_fill_ctr == NUM_TX_DESC ) {
913 DBG ("TX overflow\n");
914 return -ENOBUFS;
917 /* Save pointer to iobuf we have been given to transmit,
918 netdev_tx_complete() will need it later
920 adapter->tx_iobuf[tx_curr] = iobuf;
922 tx_curr_desc = ( void * ) ( adapter->tx_base ) +
923 ( tx_curr * sizeof ( *adapter->tx_base ) );
925 DBG ( "tx_curr_desc = %#08lx\n", virt_to_bus ( tx_curr_desc ) );
926 DBG ( "tx_curr_desc + 16 = %#08lx\n", virt_to_bus ( tx_curr_desc ) + 16 );
927 DBG ( "iobuf->data = %#08lx\n", virt_to_bus ( iobuf->data ) );
929 /* Add the packet to TX ring
931 tx_curr_desc->buffer_addr = virt_to_bus ( iobuf->data );
932 tx_curr_desc->upper.data = 0;
933 tx_curr_desc->lower.data = adapter->txd_cmd | iob_len ( iobuf );
935 DBG ( "TX fill: %d tx_curr: %d addr: %#08lx len: %zd\n", adapter->tx_fill_ctr,
936 tx_curr, virt_to_bus ( iobuf->data ), iob_len ( iobuf ) );
938 /* Point to next free descriptor */
939 adapter->tx_tail = ( adapter->tx_tail + 1 ) % NUM_TX_DESC;
940 adapter->tx_fill_ctr++;
942 /* Write new tail to NIC, making packet available for transmit
944 E1000_WRITE_REG ( hw, E1000_TDT(0), adapter->tx_tail );
945 e1e_flush();
947 return 0;
951 * e1000_poll - Poll for received packets
953 * @v netdev Network device
955 static void e1000e_poll ( struct net_device *netdev )
957 struct e1000_adapter *adapter = netdev_priv( netdev );
958 struct e1000_hw *hw = &adapter->hw;
960 uint32_t icr;
962 DBGP ( "e1000_poll\n" );
964 /* Acknowledge interrupts */
965 icr = E1000_READ_REG ( hw, E1000_ICR );
966 if ( ! icr )
967 return;
969 DBG ( "e1000_poll: intr_status = %#08x\n", icr );
971 e1000e_process_tx_packets ( netdev );
973 e1000e_process_rx_packets ( netdev );
975 e1000e_refill_rx_ring(adapter);
979 * e1000_irq - enable or Disable interrupts
981 * @v adapter e1000 adapter
982 * @v action requested interrupt action
984 static void e1000e_irq ( struct net_device *netdev, int enable )
986 struct e1000_adapter *adapter = netdev_priv ( netdev );
988 DBGP ( "e1000_irq\n" );
990 if ( enable ) {
991 e1000e_irq_enable ( adapter );
992 } else {
993 e1000e_irq_disable ( adapter );
997 static struct net_device_operations e1000e_operations;
1000 * e1000_probe - Initial configuration of e1000 NIC
1002 * @v pci PCI device
1003 * @v id PCI IDs
1005 * @ret rc Return status code
1007 int e1000e_probe ( struct pci_device *pdev,
1008 const struct pci_device_id *ent)
1010 int i, err;
1011 struct net_device *netdev;
1012 struct e1000_adapter *adapter;
1013 unsigned long mmio_start, mmio_len;
1014 unsigned long flash_start, flash_len;
1015 struct e1000_hw *hw;
1016 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
1018 DBGP ( "e1000_probe\n" );
1020 err = -ENOMEM;
1022 /* Allocate net device ( also allocates memory for netdev->priv
1023 and makes netdev-priv point to it ) */
1024 netdev = alloc_etherdev ( sizeof ( struct e1000_adapter ) );
1025 if ( ! netdev ) {
1026 DBG ( "err_alloc_etherdev\n" );
1027 goto err_alloc_etherdev;
1030 /* Associate e1000-specific network operations operations with
1031 * generic network device layer */
1032 netdev_init ( netdev, &e1000e_operations );
1034 /* Associate this network device with given PCI device */
1035 pci_set_drvdata ( pdev, netdev );
1036 netdev->dev = &pdev->dev;
1038 /* Initialize driver private storage */
1039 adapter = netdev_priv ( netdev );
1040 memset ( adapter, 0, ( sizeof ( *adapter ) ) );
1042 adapter->pdev = pdev;
1044 adapter->ioaddr = pdev->ioaddr;
1045 adapter->hw.io_base = pdev->ioaddr;
1047 hw = &adapter->hw;
1048 hw->device_id = pdev->device;
1050 adapter->irqno = pdev->irq;
1051 adapter->netdev = netdev;
1052 adapter->hw.back = adapter;
1054 adapter->ei = ei;
1055 adapter->pba = ei->pba;
1056 adapter->flags = ei->flags;
1057 adapter->flags2 = ei->flags2;
1059 adapter->hw.adapter = adapter;
1060 adapter->hw.mac.type = ei->mac;
1061 adapter->max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN;
1063 adapter->tx_ring_size = sizeof ( *adapter->tx_base ) * NUM_TX_DESC;
1064 adapter->rx_ring_size = sizeof ( *adapter->rx_base ) * NUM_RX_DESC;
1066 /* Fix up PCI device */
1067 adjust_pci_device ( pdev );
1069 err = -EIO;
1071 mmio_start = pci_bar_start ( pdev, PCI_BASE_ADDRESS_0 );
1072 mmio_len = pci_bar_size ( pdev, PCI_BASE_ADDRESS_0 );
1074 DBG ( "mmio_start: %#08lx\n", mmio_start );
1075 DBG ( "mmio_len: %#08lx\n", mmio_len );
1077 adapter->hw.hw_addr = ioremap ( mmio_start, mmio_len );
1078 DBG ( "adapter->hw.hw_addr: %p\n", adapter->hw.hw_addr );
1080 if ( ! adapter->hw.hw_addr ) {
1081 DBG ( "err_ioremap\n" );
1082 goto err_ioremap;
1085 /* Flash BAR mapping depends on mac_type */
1086 if ( ( adapter->flags & FLAG_HAS_FLASH) && ( pdev->ioaddr ) ) {
1087 flash_start = pci_bar_start ( pdev, PCI_BASE_ADDRESS_1 );
1088 flash_len = pci_bar_size ( pdev, PCI_BASE_ADDRESS_1 );
1089 adapter->hw.flash_address = ioremap ( flash_start, flash_len );
1090 if ( ! adapter->hw.flash_address ) {
1091 DBG ( "err_flashmap\n" );
1092 goto err_flashmap;
1096 /* setup adapter struct */
1097 err = e1000e_sw_init ( adapter );
1098 if (err) {
1099 DBG ( "err_sw_init\n" );
1100 goto err_sw_init;
1103 if (ei->get_variants) {
1104 err = ei->get_variants(adapter);
1105 if (err) {
1106 DBG ( "err_hw_initr\n" );
1107 goto err_hw_init;
1111 /* Copper options */
1112 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
1113 adapter->hw.phy.mdix = AUTO_ALL_MODES;
1114 adapter->hw.phy.disable_polarity_correction = 0;
1115 adapter->hw.phy.ms_type = e1000_ms_hw_default;
1118 DBG ( "adapter->hw.mac.type: %#08x\n", adapter->hw.mac.type );
1120 /* Force auto-negotiation */
1121 adapter->hw.mac.autoneg = 1;
1122 adapter->fc_autoneg = 1;
1123 adapter->hw.phy.autoneg_wait_to_complete = true;
1124 adapter->hw.mac.adaptive_ifs = true;
1125 adapter->hw.fc.requested_mode = e1000_fc_default;
1126 adapter->hw.fc.current_mode = e1000_fc_default;
1129 * before reading the NVM, reset the controller to
1130 * put the device in a known good starting state
1132 adapter->hw.mac.ops.reset_hw(&adapter->hw);
1135 * systems with ASPM and others may see the checksum fail on the first
1136 * attempt. Let's give it a few tries
1138 for (i = 0;; i++) {
1139 if (e1000e_validate_nvm_checksum(&adapter->hw) >= 0)
1140 break;
1141 if (i == 2) {
1142 DBG("The NVM Checksum Is Not Valid\n");
1143 err = -EIO;
1144 goto err_eeprom;
1148 /* copy the MAC address out of the EEPROM */
1149 if ( e1000e_read_mac_addr ( &adapter->hw ) )
1150 DBG ( "EEPROM Read Error\n" );
1152 memcpy ( netdev->hw_addr, adapter->hw.mac.perm_addr, ETH_ALEN );
1154 /* reset the hardware with the new settings */
1155 e1000e_reset ( adapter );
1157 /* Mark as link up; we don't yet handle link state */
1158 netdev_link_up ( netdev );
1160 if ( ( err = register_netdev ( netdev ) ) != 0) {
1161 DBG ( "err_register\n" );
1162 goto err_register;
1165 for (i = 0; i < 6; i++)
1166 DBG ("%02x%s", netdev->ll_addr[i], i == 5 ? "\n" : ":");
1168 DBG ( "e1000e_probe succeeded!\n" );
1170 /* No errors, return success */
1171 return 0;
1173 /* Error return paths */
1174 err_register:
1175 err_hw_init:
1176 err_eeprom:
1177 err_flashmap:
1178 if (!e1000e_check_reset_block(&adapter->hw))
1179 e1000e_phy_hw_reset(&adapter->hw);
1180 if (adapter->hw.flash_address)
1181 iounmap(adapter->hw.flash_address);
1182 err_sw_init:
1183 iounmap ( adapter->hw.hw_addr );
1184 err_ioremap:
1185 netdev_put ( netdev );
1186 err_alloc_etherdev:
1187 return err;
1191 * e1000e_remove - Device Removal Routine
1193 * @v pdev PCI device information struct
1196 void e1000e_remove ( struct pci_device *pdev )
1198 struct net_device *netdev = pci_get_drvdata ( pdev );
1199 struct e1000_adapter *adapter = netdev_priv ( netdev );
1201 DBGP ( "e1000e_remove\n" );
1203 if ( adapter->hw.flash_address )
1204 iounmap ( adapter->hw.flash_address );
1205 if ( adapter->hw.hw_addr )
1206 iounmap ( adapter->hw.hw_addr );
1208 unregister_netdev ( netdev );
1209 e1000e_reset ( adapter );
1210 netdev_nullify ( netdev );
1211 netdev_put ( netdev );
1215 * e1000e_open - Called when a network interface is made active
1217 * @v netdev network interface device structure
1218 * @ret rc Return status code, 0 on success, negative value on failure
1221 static int e1000e_open ( struct net_device *netdev )
1223 struct e1000_adapter *adapter = netdev_priv(netdev);
1224 int err;
1226 DBGP ( "e1000e_open\n" );
1228 /* allocate transmit descriptors */
1229 err = e1000e_setup_tx_resources ( adapter );
1230 if ( err ) {
1231 DBG ( "Error setting up TX resources!\n" );
1232 goto err_setup_tx;
1235 /* allocate receive descriptors */
1236 err = e1000e_setup_rx_resources ( adapter );
1237 if ( err ) {
1238 DBG ( "Error setting up RX resources!\n" );
1239 goto err_setup_rx;
1242 e1000e_configure_tx ( adapter );
1244 e1000e_configure_rx ( adapter );
1246 DBG ( "E1000_RXDCTL(0): %#08x\n", E1000_READ_REG ( &adapter->hw, E1000_RXDCTL(0) ) );
1248 return 0;
1250 err_setup_rx:
1251 DBG ( "err_setup_rx\n" );
1252 e1000e_free_tx_resources ( adapter );
1253 err_setup_tx:
1254 DBG ( "err_setup_tx\n" );
1255 e1000e_reset ( adapter );
1257 return err;
1260 /** e1000e net device operations */
1261 static struct net_device_operations e1000e_operations = {
1262 .open = e1000e_open,
1263 .close = e1000e_close,
1264 .transmit = e1000e_transmit,
1265 .poll = e1000e_poll,
1266 .irq = e1000e_irq,