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36 include(gmxFindFlagsForSource)
38 # Macro that manages setting the respective C and C++ toolchain
39 # variables so that subsequent tests for SIMD support can work.
40 macro(prepare_x86_toolchain TOOLCHAIN_C_FLAGS_VARIABLE TOOLCHAIN_CXX_FLAGS_VARIABLE)
41 # On OS X, we often want to use gcc instead of clang, since gcc
42 # supports OpenMP (until clang 3.8, or so, plus whenever Apple
43 # support it in their version). However, by default gcc uses the
44 # external system assembler, which does not support AVX, so we
45 # need to tell the linker to use the clang compilers assembler
46 # instead - and this has to happen before we detect AVX flags.
47 if(APPLE AND CMAKE_C_COMPILER_ID STREQUAL "GNU")
48 gmx_test_cflag(GNU_C_USE_CLANG_AS "-Wa,-q" ${TOOLCHAIN_C_FLAGS_VARIABLE})
50 if(APPLE AND CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
51 gmx_test_cxxflag(GNU_CXX_USE_CLANG_AS "-Wa,-q" ${TOOLCHAIN_CXX_FLAGS_VARIABLE})
55 # Macro that manages setting the respective C and C++ toolchain
56 # variables so that subsequent tests for SIMD support can work.
57 macro(prepare_power_vsx_toolchain TOOLCHAIN_C_FLAGS_VARIABLE TOOLCHAIN_CXX_FLAGS_VARIABLE)
58 if(${CMAKE_CXX_COMPILER_ID} MATCHES "GNU" OR ${CMAKE_C_COMPILER_ID} MATCHES "GNU")
59 # VSX uses the same function API as Altivec/VMX, so make sure we tune for the current CPU and not VMX.
60 # By putting these flags here rather than in the general compiler flags file we can safely assume
61 # that we are at least on Power7 since that is when VSX appeared.
62 gmx_run_cpu_detection(brand)
63 if(CPU_DETECTION_BRAND MATCHES "POWER7")
64 gmx_test_cflag(GNU_C_VSX_POWER7 "-mcpu=power7 -mtune=power7" ${TOOLCHAIN_C_FLAGS_VARIABLE})
65 gmx_test_cflag(GNU_CXX_VSX_POWER7 "-mcpu=power7 -mtune=power7" ${TOOLCHAIN_CXX_FLAGS_VARIABLE})
67 # Enable power8 vector extensions on all platforms except old Power7.
68 gmx_test_cflag(GNU_C_VSX_POWER8 "-mcpu=power8 -mpower8-vector -mpower8-fusion -mdirect-move" ${TOOLCHAIN_C_FLAGS_VARIABLE})
69 gmx_test_cflag(GNU_CXX_VSX_POWER8 "-mcpu=power8 -mpower8-vector -mpower8-fusion -mdirect-move" ${TOOLCHAIN_CXX_FLAGS_VARIABLE})
71 # Altivec was originally single-only, and it took a while for compilers
72 # to support the double-precision features in VSX.
73 if(GMX_DOUBLE AND CMAKE_CXX_COMPILER_VERSION VERSION_LESS "4.9")
74 message(FATAL_ERROR "Using VSX SIMD in double precision with GCC requires GCC-4.9 or later.")
77 if(${CMAKE_CXX_COMPILER_ID} MATCHES "XL" OR ${CMAKE_C_COMPILER_ID} MATCHES "XL")
78 if(CMAKE_CXX_COMPILER_VERSION VERSION_LESS "13.1.5" OR CMAKE_C_COMPILER_VERSION VERSION_LESS "13.1.5")
79 message(FATAL_ERROR "Using VSX SIMD requires XL compiler version 13.1.5 or later.")
84 # Issue a fatal error with an appropriate message, when the toolchain
85 # was not able to compile code for SIMD support.
88 # SIMD_STRING A string describing the kind of SIMD support that didn't work.
89 # ALTERNATIVE_SUGGESTION A string describing anything the user could try other than getting a new compiler.
90 # SUGGEST_BINUTILS_UPDATE True when there's information that the compiler was OK, but something else was not.
91 function(gmx_give_fatal_error_when_simd_support_not_found SIMD_STRING ALTERNATIVE_SUGGESTION SUGGEST_BINUTILS_UPDATE)
92 if(SUGGEST_BINUTILS_UPDATE)
93 set(_msg "Found a compiler flag for ${SIMD_STRING} support, but some other problem exists. Update your assembler and/or linker, e.g. in the binutils package of your distribution.")
95 set(_msg "Cannot find ${SIMD_STRING} compiler flag. Use a newer compiler, or ${ALTERNATIVE_SUGGESTION}.")
97 message(FATAL_ERROR ${_msg})
100 macro(gmx_manage_simd)
102 set(GMX_SIMD_ACCURACY_BITS_SINGLE 22 CACHE STRING "Target mantissa bits for SIMD single math")
104 # Note that we typically restrict double precision target accuracy to be twice that
105 # of single. This means we only need one more N-R iteration for 1/sqrt(x) and 1(x),
106 # and the first iteration can sometimes be done as a pair in single precision. This should
107 # be plenty enough for Molecular Dynamics applications. Many of our double precision math
108 # functions still achieve very close to full double precision, but we do not guarantee that
109 # they will be able to achieve higher accuracy if you set this beyond 44 bits. GROMACS will
110 # work - but some unit tests might fail.
112 set(GMX_SIMD_ACCURACY_BITS_DOUBLE 44 CACHE STRING "Target mantissa bits for SIMD double math")
113 mark_as_advanced(GMX_SIMD_ACCURACY_BITS_SINGLE)
114 mark_as_advanced(GMX_SIMD_ACCURACY_BITS_DOUBLE)
116 if(${GMX_SIMD_ACCURACY_BITS_SINGLE} GREATER 22)
117 message(STATUS "Note: Full mantissa accuracy (including least significant bit) requested for SIMD single math. Presently we cannot get the least significant bit correct since that would require different algorithms - reducing to 22 bits.")
118 set(GMX_SIMD_ACCURACY_BITS_SINGLE 22 CACHE STRING "Target mantissa bits for SIMD single math" FORCE)
121 if(${GMX_SIMD_ACCURACY_BITS_DOUBLE} GREATER 51)
122 message(STATUS "Note: Full mantissa accuracy (including least significant bit) requested for SIMD double math. Presently we cannot get the least significant bit correct since that would require different algorithms - reducing to 51 bits.")
123 set(GMX_SIMD_ACCURACY_BITS_DOUBLE 51 CACHE STRING "Target mantissa bits for SIMD double math" FORCE)
127 # Section to set (and test) compiler flags for SIMD.
129 # If the user chose the (default) automatic behaviour, then detection
130 # is run to suggest a SIMD choice suitable for the build
131 # host. Otherwise, the users's choice is always honoured. The compiler
132 # flags will be set based on that choice.
135 set(GMX_SIMD_ACTIVE ${GMX_SIMD})
136 if(GMX_SIMD STREQUAL "AUTO")
137 include(gmxDetectSimd)
138 gmx_detect_simd(GMX_SUGGESTED_SIMD)
139 set(GMX_SIMD_ACTIVE ${GMX_SUGGESTED_SIMD})
142 if(GMX_SIMD_ACTIVE STREQUAL "NONE")
143 # nothing to do configuration-wise
144 set(SIMD_STATUS_MESSAGE "SIMD instructions disabled")
145 elseif(GMX_SIMD_ACTIVE STREQUAL "SSE2")
148 "#include<xmmintrin.h>
149 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_rsqrt_ps(x);return _mm_movemask_ps(x);}"
150 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
151 SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS
152 "-msse2" "/arch:SSE2" "-hgnu")
154 if(NOT SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS OR NOT SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS)
155 gmx_give_fatal_error_when_simd_support_not_found("SSE2" "disable SIMD support (slow)" "${SUGGEST_BINUTILS_UPDATE}")
158 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
159 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
160 set(GMX_SIMD_X86_${GMX_SIMD_ACTIVE} 1)
161 set(SIMD_STATUS_MESSAGE "Enabling SSE2 SIMD instructions")
163 elseif(GMX_SIMD_ACTIVE STREQUAL "SSE4.1")
165 # Note: MSVC enables SSE4.1 with the SSE2 flag, so we include that in testing.
167 "#include<smmintrin.h>
168 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_dp_ps(x,x,0x77);return _mm_movemask_ps(x);}"
169 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
170 SIMD_SSE_4_1_C_FLAGS SIMD_SSE_4_1_CXX_FLAGS
171 "-msse4.1" "/arch:SSE4.1" "/arch:SSE2" "-hgnu")
173 if(NOT SIMD_SSE_4_1_C_FLAGS OR NOT SIMD_SSE_4_1_CXX_FLAGS)
174 gmx_give_fatal_error_when_simd_support_not_found("SSE4.1" "choose SSE2 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
177 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
178 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
179 set(GMX_SIMD_X86_SSE4_1 1)
180 set(SIMD_STATUS_MESSAGE "Enabling SSE4.1 SIMD instructions")
182 elseif(GMX_SIMD_ACTIVE STREQUAL "AVX_128_FMA")
184 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
186 # We don't have the full compiler version string yet (BUILD_C_COMPILER),
187 # so we can't distinguish vanilla from Apple clang versions, but catering for a few rare AMD
188 # hackintoshes is not worth the effort.
189 if (APPLE AND (CMAKE_C_COMPILER_ID STREQUAL "Clang" OR
190 CMAKE_CXX_COMPILER_ID STREQUAL "Clang"))
191 message(WARNING "Due to a known compiler bug, Clang up to version 3.2 (and Apple Clang up to version 4.1) produces incorrect code with AVX_128_FMA SIMD. As we cannot work around this bug on OS X, you will have to select a different compiler or SIMD instruction set.")
194 # clang <=3.2 contains a bug that causes incorrect code to be generated for the
195 # vfmaddps instruction and therefore the bug is triggered with AVX_128_FMA.
196 # (see: http://llvm.org/bugs/show_bug.cgi?id=15040).
197 # We can work around this by not using the integrated assembler (except on OS X
198 # which has an outdated assembler that does not support AVX instructions).
199 if (CMAKE_C_COMPILER_ID MATCHES "Clang" AND CMAKE_C_COMPILER_VERSION VERSION_LESS "3.3")
200 # we assume that we have an external assembler that supports AVX
201 message(STATUS "Clang ${CMAKE_C_COMPILER_VERSION} detected, enabling FMA bug workaround")
202 set(TOOLCHAIN_C_FLAGS "${TOOLCHAIN_C_FLAGS} -no-integrated-as")
204 if (CMAKE_CXX_COMPILER_ID MATCHES "Clang" AND CMAKE_CXX_COMPILER_VERSION VERSION_LESS "3.3")
205 # we assume that we have an external assembler that supports AVX
206 message(STATUS "Clang ${CMAKE_CXX_COMPILER_VERSION} detected, enabling FMA bug workaround")
207 set(TOOLCHAIN_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS} -no-integrated-as")
210 # AVX128/FMA on AMD is a bit complicated. We need to do detection in three stages:
211 # 1) Find the flags required for generic AVX support
212 # 2) Find the flags necessary to enable fused-multiply add support
213 # 3) Optional: Find a flag to enable the AMD XOP instructions
215 ### STAGE 1: Find the generic AVX flag
217 "#include<immintrin.h>
218 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_permute_ps(x,1);return 0;}"
219 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
220 SIMD_GENERIC_AVX_C_FLAGS SIMD_GENERIC_AVX_CXX_FLAGS
221 "-mavx" "/arch:AVX" "-hgnu")
223 ### STAGE 2: Find the fused-multiply add flag.
224 # GCC requires x86intrin.h for FMA support. MSVC 2010 requires intrin.h for FMA support.
225 check_include_file(x86intrin.h HAVE_X86INTRIN_H ${SIMD_C_FLAGS})
226 check_include_file(intrin.h HAVE_INTRIN_H ${SIMD_C_FLAGS})
228 set(INCLUDE_X86INTRIN_H "#include <x86intrin.h>")
231 set(INCLUDE_INTRIN_H "#include <xintrin.h>")
235 "#include<immintrin.h>
236 ${INCLUDE_X86INTRIN_H}
238 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_macc_ps(x,x,x);return _mm_movemask_ps(x);}"
239 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
240 SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS
243 # We only need to check the last (FMA) test; that will always fail if the generic AVX test failed
244 if(NOT SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS OR NOT SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS)
245 gmx_give_fatal_error_when_simd_support_not_found("128-bit AVX with FMA support" "choose SSE4.1 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
248 ### STAGE 3: Optional: Find the XOP instruction flag (No point in yelling if this does not work)
250 "#include<immintrin.h>
251 ${INCLUDE_X86INTRIN_H}
253 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_frcz_ps(x);return _mm_movemask_ps(x);}"
254 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
255 SIMD_AVX_128_XOP_C_FLAGS SIMD_AVX_128_XOP_CXX_FLAGS
258 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
259 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
260 set(GMX_SIMD_X86_${GMX_SIMD_ACTIVE} 1)
261 set(SIMD_STATUS_MESSAGE "Enabling 128-bit AVX SIMD GROMACS SIMD (with fused-multiply add)")
263 elseif(GMX_SIMD_ACTIVE STREQUAL "AVX_256")
265 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
268 "#include<immintrin.h>
269 int main(){__m256 x=_mm256_set1_ps(0.5);x=_mm256_add_ps(x,x);return _mm256_movemask_ps(x);}"
270 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
271 SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS
272 "-mavx" "/arch:AVX" "-hgnu")
274 if(NOT SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS OR NOT SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS)
275 gmx_give_fatal_error_when_simd_support_not_found("AVX" "choose SSE4.1 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
278 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
279 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
280 set(GMX_SIMD_X86_${GMX_SIMD_ACTIVE} 1)
281 set(SIMD_STATUS_MESSAGE "Enabling 256-bit AVX SIMD instructions")
283 elseif(GMX_SIMD_ACTIVE MATCHES "AVX2_")
285 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
288 "#include<immintrin.h>
289 int main(){__m256i x=_mm256_set1_epi32(5);x=_mm256_add_epi32(x,x);return _mm256_movemask_epi8(x);}"
290 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
291 SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS
292 "-march=core-avx2" "-mavx2" "/arch:AVX" "-hgnu") # no AVX2-specific flag for MSVC yet
294 if(NOT SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS OR NOT SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS)
295 gmx_give_fatal_error_when_simd_support_not_found("AVX2" "choose AVX SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
298 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
299 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
300 set(GMX_SIMD_X86_${GMX_SIMD_ACTIVE} 1)
302 if(GMX_SIMD_ACTIVE STREQUAL "AVX2_128")
303 set(SIMD_STATUS_MESSAGE "Enabling 128-bit AVX2 SIMD instructions")
305 set(SIMD_STATUS_MESSAGE "Enabling 256-bit AVX2 SIMD instructions")
308 elseif(GMX_SIMD_ACTIVE STREQUAL "MIC")
310 # No flags needed. Not testing.
311 set(GMX_SIMD_X86_MIC 1)
312 set(SIMD_STATUS_MESSAGE "Enabling MIC (Xeon Phi) SIMD instructions")
314 elseif(GMX_SIMD_ACTIVE STREQUAL "AVX_512")
316 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
319 "#include<immintrin.h>
320 int main(){__m512 y,x=_mm512_set1_ps(0.5);y=_mm512_fmadd_ps(x,x,x);return (int)_mm512_cmp_ps_mask(x,y,_CMP_LT_OS);}"
321 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
322 SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS
323 "-xCORE-AVX512" "-mavx512f -mfma" "-mavx512f" "/arch:AVX" "-hgnu") # no AVX_512F flags known for MSVC yet
325 if(NOT SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS OR NOT SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS)
326 gmx_give_fatal_error_when_simd_support_not_found("AVX 512F" "choose a lower level of SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
329 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
330 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
331 set(GMX_SIMD_X86_${GMX_SIMD_ACTIVE} 1)
332 set(SIMD_STATUS_MESSAGE "Enabling 512-bit AVX-512 SIMD instructions")
334 elseif(GMX_SIMD_ACTIVE STREQUAL "AVX_512_KNL")
336 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
339 "#include<immintrin.h>
340 int main(){__m512 y,x=_mm512_set1_ps(0.5);y=_mm512_rsqrt28_ps(x);return (int)_mm512_cmp_ps_mask(x,y,_CMP_LT_OS);}"
341 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
342 SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS
343 "-xMIC-AVX512" "-mavx512er -mfma" "-mavx512er" "/arch:AVX" "-hgnu") # no AVX_512ER flags known for MSVC yet
345 if(NOT SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS OR NOT SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS)
346 gmx_give_fatal_error_when_simd_support_not_found("AVX 512ER" "choose a lower level of SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
349 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
350 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
351 set(GMX_SIMD_X86_${GMX_SIMD_ACTIVE} 1)
352 set(SIMD_STATUS_MESSAGE "Enabling 512-bit AVX-512-KNL SIMD instructions")
354 elseif(GMX_SIMD_ACTIVE STREQUAL "ARM_NEON")
357 message(FATAL_ERROR "ARM_NEON SIMD support is not available for a double precision build because the architecture lacks double-precision support")
361 "#include<arm_neon.h>
362 int main(){float32x4_t x=vdupq_n_f32(0.5);x=vmlaq_f32(x,x,x);return vgetq_lane_f32(x,0)>0;}"
363 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
364 SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS
365 "-mfpu=neon-vfpv4" "-mfpu=neon" "")
367 if(NOT SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS OR NOT SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS)
368 gmx_give_fatal_error_when_simd_support_not_found("ARM NEON" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
371 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
372 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
373 set(GMX_SIMD_${GMX_SIMD_ACTIVE} 1)
374 set(SIMD_STATUS_MESSAGE "Enabling 32-bit ARM NEON SIMD instructions")
376 elseif(GMX_SIMD_ACTIVE STREQUAL "ARM_NEON_ASIMD")
379 "#include<arm_neon.h>
380 int main(){float64x2_t x=vdupq_n_f64(0.5);x=vfmaq_f64(x,x,x);x=vrndnq_f64(x);return vgetq_lane_f64(x,0)>0;}"
381 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
382 SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS
385 if(NOT SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS OR NOT SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS)
386 gmx_give_fatal_error_when_simd_support_not_found("ARM (AArch64) NEON Advanced SIMD" "particularly gcc version 4.9 or later, or disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
389 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
390 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
391 set(GMX_SIMD_${GMX_SIMD_ACTIVE} 1)
392 set(SIMD_STATUS_MESSAGE "Enabling ARM (AArch64) NEON Advanced SIMD instructions")
394 elseif(GMX_SIMD_ACTIVE STREQUAL "IBM_QPX")
396 try_compile(TEST_QPX ${CMAKE_BINARY_DIR}
397 "${CMAKE_SOURCE_DIR}/cmake/TestQPX.c")
400 message(WARNING "IBM QPX SIMD instructions selected. This will work, but SIMD kernels are only available for the Verlet cut-off scheme. The plain C kernels that are used for the group cut-off scheme kernels will be slow, so please consider using the Verlet cut-off scheme.")
401 set(GMX_SIMD_${GMX_SIMD_ACTIVE} 1)
402 set(SIMD_STATUS_MESSAGE "Enabling IBM QPX SIMD instructions")
405 gmx_give_fatal_error_when_simd_support_not_found("IBM QPX" "or 'cmake .. -DCMAKE_TOOLCHAIN_FILE=Platform/BlueGeneQ-static-bgclang-CXX' to set up the tool chain" "${SUGGEST_BINUTILS_UPDATE}")
408 elseif(GMX_SIMD_ACTIVE STREQUAL "IBM_VMX")
412 int main(){vector float x,y=vec_ctf(vec_splat_s32(1),0);x=vec_madd(y,y,y);return vec_all_ge(y,x);}"
413 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
414 SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS
415 "-maltivec -mabi=altivec" "-qarch=auto -qaltivec")
417 if(NOT SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS OR NOT SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS)
418 gmx_give_fatal_error_when_simd_support_not_found("IBM VMX" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
421 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
422 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
423 set(GMX_SIMD_${GMX_SIMD_ACTIVE} 1)
424 set(SIMD_STATUS_MESSAGE "Enabling IBM VMX SIMD instructions")
426 elseif(GMX_SIMD_ACTIVE STREQUAL "IBM_VSX")
428 prepare_power_vsx_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
432 int main(){vector double x,y=vec_splats(1.0);x=vec_madd(y,y,y);return vec_all_ge(y,x);}"
433 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
434 SIMD_${GMX_SIMD_ACTIVE}_C_FLAGS SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS
435 "-mvsx" "-maltivec -mabi=altivec" "-qarch=auto -qaltivec")
437 # Usually we check also for the C compiler here, but a C compiler
438 # is not required for SIMD support on this platform. cmake through
439 # at least version 3.7 cannot pass this check with the C compiler
440 # in the latest xlc 13.1.5, but the C++ compiler has different
441 # behaviour and is OK. See Redmine #2102.
442 if(NOT SIMD_${GMX_SIMD_ACTIVE}_CXX_FLAGS)
443 gmx_give_fatal_error_when_simd_support_not_found("IBM VSX" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
446 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
447 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
448 set(GMX_SIMD_${GMX_SIMD_ACTIVE} 1)
449 set(SIMD_STATUS_MESSAGE "Enabling IBM VSX SIMD instructions")
451 elseif(GMX_SIMD_ACTIVE STREQUAL "SPARC64_HPC_ACE")
453 # Note that GMX_RELAXED_DOUBLE_PRECISION is enabled by default in the top-level CMakeLists.txt
455 set(GMX_SIMD_${GMX_SIMD_ACTIVE} 1)
456 set(SIMD_STATUS_MESSAGE "Enabling Sparc64 HPC-ACE SIMD instructions")
458 elseif(GMX_SIMD_ACTIVE STREQUAL "REFERENCE")
460 # NB: This file handles settings for the SIMD module, so in the interest
461 # of proper modularization, please do NOT put any verlet kernel settings in this file.
463 if(GMX_SIMD_REF_FLOAT_WIDTH)
464 add_definitions(-DGMX_SIMD_REF_FLOAT_WIDTH=${GMX_SIMD_REF_FLOAT_WIDTH})
466 if(GMX_SIMD_REF_DOUBLE_WIDTH)
467 add_definitions(-DGMX_SIMD_REF_DOUBLE_WIDTH=${GMX_SIMD_REF_DOUBLE_WIDTH})
470 set(GMX_SIMD_${GMX_SIMD_ACTIVE} 1)
471 set(SIMD_STATUS_MESSAGE "Enabling reference (emulated) SIMD instructions.")
474 gmx_invalid_option_value(GMX_SIMD_ACTIVE)
478 gmx_check_if_changed(SIMD_CHANGED GMX_SIMD_ACTIVE)
479 if (SIMD_CHANGED AND DEFINED SIMD_STATUS_MESSAGE)
480 message(STATUS "${SIMD_STATUS_MESSAGE}")
483 # By default, 32-bit windows cannot pass SIMD (SSE/AVX) arguments in registers,
484 # and even on 64-bit (all platforms) it is only used for a handful of arguments.
485 # The __vectorcall (MSVC, from MSVC2013) or __regcall (ICC) calling conventions
486 # enable this, which is critical to enable 32-bit SIMD and improves performance
488 # Check if the compiler supports one of these, and in that case set gmx_simdcall
489 # to that string. If we do not have any such calling convention modifier, set it
490 # to an empty string.
492 # Update 2015-11-04: As of version 3.6, clang has added support for __vectorcall
493 # (also on Linux). This appears to be buggy for the reference SIMD
494 # implementation when using the Debug build (when functions are not inlined)
495 # while it seems works fine for the actual SIMD implementations. This is likely
496 # because the reference build ends up passing lots of structures with arrays
497 # rather than actual vector data. For now we disable __vectorcall with clang
498 # when using the reference build.
500 # xlc 13.1.5 does not seem recognize any attribute, and warns about invalid ones
501 # so we avoid searching for any.
503 if(NOT DEFINED GMX_SIMD_CALLING_CONVENTION)
505 set(CALLCONV_LIST " ")
506 elseif(CMAKE_CXX_COMPILER_ID MATCHES "Clang" AND GMX_SIMD_ACTIVE STREQUAL "REFERENCE")
507 set(CALLCONV_LIST __regcall " ")
508 elseif(CMAKE_CXX_COMPILER_ID MATCHES "XL")
509 set(CALLCONV_LIST " ")
511 set(CALLCONV_LIST __vectorcall __regcall " ")
513 foreach(callconv ${CALLCONV_LIST})
514 set(callconv_compile_var "_callconv_${callconv}")
515 check_c_source_compiles("int ${callconv} f(int i) {return i;} int main(void) {return f(0);}" ${callconv_compile_var})
516 if(${callconv_compile_var})
517 set(GMX_SIMD_CALLING_CONVENTION "${callconv}" CACHE INTERNAL "Calling convention for SIMD routines" FORCE)
523 if("${CMAKE_CXX_COMPILER_ID}" STREQUAL "GNU")
524 # GCC bug 49001, 54412 on Windows (just warn, since it might be fixed in later versions)
525 if((CMAKE_CXX_COMPILER_VERSION VERSION_LESS "4.9.0" OR CMAKE_SIZEOF_VOID_P EQUAL 8)
526 AND (WIN32 OR CYGWIN)
527 AND (GMX_SIMD_ACTIVE MATCHES "AVX") AND NOT (GMX_SIMD_ACTIVE STREQUAL "AVX_128_FMA"))
528 message(WARNING "GCC on Windows (GCC older than 4.9 in 32-bit mode, or any version in 64-bit mode) with 256-bit AVX will probably crash. You might want to choose a different GMX_SIMD or a different compiler.")