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[haiku.git] / src / add-ons / kernel / drivers / network / wwan / usb_beceemwmx / DeviceStruct.h
blob883bf53d846ca71b73d6a9e1a23a85f36a354e99
1 /*
2 * Beceem WiMax USB Driver.
3 * Copyright (c) 2010 Alexander von Gluck <kallisti5@unixzen.com>
4 * Distributed under the terms of the MIT license.
5 *
6 * Based on GPL code developed by: Beceem Communications Pvt. Ltd
7 */
8 #ifndef _USB_BECEEM_DEVICE_STRUCT_
9 #define _USB_BECEEM_DEVICE_STRUCT_
10
11
12 #include "Driver.h"
13
14
15 typedef struct FirmwareInfo
16 {
17 void* pvMappedFirmwareAddress;
18 unsigned long u32FirmwareLength;
19 unsigned long u32StartingAddress;
20 }__attribute__((packed)) FIRMWARE_INFO, *PFIRMWARE_INFO;
21
22 /* WARNING: DO NOT edit this struct
23 * This struct is size / location dependant to vendor conf
24 */
25 typedef struct _VENDORCFG
26 {
27 /*
28 Vendor Configuration Versions -- Beceem Internal
29 Clear drivers use version 26
30 # Version 1 - Creation
31 # Version 2 - Major revision - Created the current structure
32 # Version 3 - Renaming to HARQ structure to 'General'. HARQ will be
33 # reintroduced later.
34 # Version 4 - Added enabling of Tx Power Report from config file
35 # Version 5 - Added enabling of Random FA selection
36 # Version 7 - Added the firmware config option
37 # Version 8 - Added the config option for 8.75 or 10 MHz bandwidth
38 # Version 9 - Added the config option for ShutDown Timer
39 # - Removed changes in Version 8
40 # Version 10 - Merged versions 8 and 9
41 # Version 11 - EncrSupport & NumOfSAId added
42 # Version 12 - Radio and PHY Parameters added
43 # Version 13 - options for testing cqich, rang etc
44 # Version 14 - NA
45 # Version 15 - Added Max MAC Data per Frame to be sent in REG-REQ
46 # Version 16 - Added flags to enable Corrigendum 2
47 # Version 17 - IDLE Reserved1 field is changed to idle mode option.
48 # 0 means normal, 1 for CPE special Idle mode
49 # Version 18 - Changes to Radio Parameter, high band support added
50 # Version 19 - Changed Idlemode Enable to powersaving modes enable for Sleep
51 # - Changed Idlemode options to powersaving mode enable for Sleep
52 # Version 20 - Changed Rtps Enable to Minimum Grant size, nRtps Enable to
53 # Maximum Grant size, PC reserved 4 to MimoEnabled
54 # Version 21 - Changed eRtps Enable to PHS Enabled
55 # Version 22 - Removed PC related cfg options (made them unused).
56 # - Added a test option for connect-disconnect testing
57 # Version 23 - Removed the unused parameter from the config file
58 # version 24 - change config file as the latest config file not consistent
59 # version 25 - Added Segmented PUSC config option
60 # version 26 - Updated customize field for Wibro Nw
61 # version 27 - Added Shutdown Related Params
62 # version 28 - Added Band AMC Related Params
63 # version 29 - Updated HostDrvrConfig6 for DDR Memory Clock Frequency
64 # selection & Power Save Mode Selection.
65 # version 30 - Changed the "MAX MAC Data per frame" from 15:4 to 75:0
66 # (to reflect T3 capability - for T2 its still 15:4 this is
67 # handled in MS firmware)
68 # Version 31 - Added CFG option for HARQ channel mapping
69 # Version 32 - Added CFG options for ERTPS
70 # - Removed CFG option for HARQ channel mapping
71 # Version 33 - Sync 4.x and 5.x CFG file
72 # Version 34 - Updated the comments for HostDrvrConfig6.
73 # - Added Cfg options for Enabled Action Trigger and TTWF
74 # values for Sleepmode
75 # Version 35 - Added support for IP retention (bit 1 of customize field)
76 # Version 36 - Renamed the PHS Enable field to CS options. This has now been
77 # made a bit field
78 # Version 37 - Updated HostDrvrConfig4(31:30) and HostDrvrConfig5(31:0) for
79 # WiMAX trigger type and threshold
80 # Version 39 - Using the handoff enable flags to enable/disable HO on signal
81 # fade (Active State Retention feature).
82 # Version 40 - Clean up and add support for MIMO B enable/disable, and
83 # Encryption enable/disable
84 # Version 41 - Added bitwise support for Eth CS
85 # Version 42 - Added support for CFG based purge timer setting for real time
86 # HARQ connections
87 # Version 43 - Added config for out of HARQ order delivery feature
88 # Version 44 - Added config for enabling RPD 124 changes related to Tx power
89 # report
90 # Version 45 - Added flag in Wimax options to enable/disable GPIO 2
91 # signaling of Out of Wimax Coverage.
92 # Version 46 - Added flag to enable inclusion of Idlemode MAC Hash Skip
93 # Threshold TLV
94 # Version 47 - Added DP options
95 # Version 48 - Added flag in Wimax options to enable/disable GPIO 14 based
96 # low power mode (LPM) entry
97 # Version 49 - Added flag under ARQ ENable for disabling ARQ Cut Thru for
98 # Ack generation
99 # Version 50 - Added flag for handling partial nacking of PDUs, and retxing
100 # only nacked blocks */
101 uint32 m_u32CfgVersion;
102
103 /*
104 Scanning Parameters
105 Make center frequency as 0 to enable scanning
106 Or use: 2336, 2345, 2354, 2367.5, 2385.5
107 Choosing the center frequency non-zero will
108 disable scanning! */
109 uint32 m_u32CenterFrequency;
110 uint32 m_u32BandAScan;
111 uint32 m_u32BandBScan;
112 uint32 m_u32BandCScan;
113
114 // QoS Params
115 uint32 m_u32minGrantsize; // size of minimum grant is 0 or 6
116 uint32 m_u32PHSEnable;
117
118 // HO Params
119 uint32 m_u32HoEnable;
120 uint32 m_u32HoReserved1;
121 uint32 m_u32HoReserved2;
122
123 /*
124 MIMO Enable ==> 0xddccbbaa
125 aa = 0x01 Enables DL MIMO,
126 bb = 0x01 Enabled UL CSM ;
127 cc = 0x01 to disable MIMO B support
128 0xdd Reserved
129 0x0101 => Enables DL MIMO and UL CSM
130 0x010101 =? Enable DL MIMO, UL CSM, and disable MIMO B in DL */
131 uint32 m_u32MimoEnable;
132
133 /*
134 Security Parameters
135 bit 0 = Enable PKMV2 support (Auth support)
136 bit 1 = Enable index based SFID mapping for MS init SFs
137 bit 2 = Enable domain restriction for security
138 bit 3 = Disable encryption support
139 bit[31:4] = Unused. */
140 uint32 m_u32SecurityEnable;
141
142 /*
143 PowerSaving enable
144 bit 1 = 1 Idlemode enable
145 bit 2 = 1 Sleepmode Enable */
146 uint32 m_u32PowerSavingModesEnable;
147
148 /*
149 PowerSaving Mode Options
150 bit 0 = 1: CPE mode - to keep pcmcia if alive;
151 bit 1 = 1: CINR reporing in Idlemode Msg
152 bit 2 = 1: Default PSC Enable in sleepmode */
153 uint32 m_u32PowerSavingModeOptions;
154
155 /*
156 ARQ Enable ==> 0xddccbbaa
157 aa => 0x01 Enables ARQ
158 bb => 0x01 Disable the ARQ feature where MS combines ARQ FB and tranport
159 CID Bw Requests:
160 cc => 0x01 Enable ARQ FB BW req enh
161 dd => 0th bit Disable ARQ Cut thru for Ack Generation
162 dd => 1st bit enable handling of partial nacking of PDUs, and retxing */
163 uint32 m_u32ArqEnable;
164
165 /*
166 HARQ Enable ==> 0xddccbbaa
167 aa => 0x01 Enable HARQ on Transport;
168 bb => 0 bit Enable HARQ on Management
169 bb => 1 bit Enable Out of order delivery on non-ARQ Rx ERTPS
170 HARQ connections
171 bb => 2 bit Enable Out of order delivery on all non-ARQ RX
172 HARQ connections
173 dd => If set, used as the PDU purge timer on the non-ARQ Rx
174 HARQ RT connections ERTPS, RTPS, UGS and HARQ on Management
175 only is NOT Permitted.
176 Examples:
177 0x0101 Enable HARQ on Management and HARQ on Transport Connections
178 0x0301 Enable HARQ on Management and HARQ on Transport Connections
179 Enable out of deliver on the non-ARQ rx ERTPS HARQ connections
180 0x0501 Enable HARQ on Management and HARQ on Transport Connections
181 Enable out of deliver on the non-ARQ RX HARQ connections */
182 uint32 m_u32HarqEnable;
183
184 // EEPROM Param Location
185 uint32 m_u32EEPROMFlag;
186
187 /*
188 Customize
189 Normal Mode should be set to (0x00000100)
190 Set bit 0 for using D5 CQICH IE (WiBro NW)
191 Bit 26 should be set to disable the BEU */
192 uint32 m_u32Customize;
193
194 /*
195 Config Bandwidth
196 Should be in Hz i.e. 8750000, 10000000 */
197 uint32 m_u32ConfigBW;
198
199 /*
200 Shutdown Timer
201 number of frames (5 ms)
202 ShutDown Timer Value = 0x7fffffff */
203 uint32 m_u32ShutDownTimer;
204
205 /*
206 Radio Parameter
207 e.g. 0x000dccba
208 d = [19:16] Second/High Band Select
209 { 2->2.3 to 2.4G; 3->2.5 to 2.7G; 4->3.4 to 3.6G,
210 F-> Select from EEPROM if info available }
211 Do not fill for single band unit
212 cc = [15:8] Board Type, set to 0
213 b = [7:4] Primary/Low Band Select
214 { 2->2.3 to 2.4G; 3->2.5 to 2.7G; 4->3.4 to 3.6G,
215 F-> Select from EEPROM if info available }
216 a = [3:0] Set to 2
217
218 Examples:
219 # 2.3GHz MS120 single band unit needs 0x22
220 # 2.5GHz MS120 single band unit needs 0x32
221 # 3.5GHz MS120 single band unit needs 0x42
222 # 2.3G and/or 3.5G BCS200 unit needs 0x40022
223 # 2.5G and/or 3.5G BCS200 unit needs 0x40032 */
224 uint32 m_u32RadioParameter;
225
226 /*
227 PhyParameter1 e.g. 0xccccbbaa
228 cccc = [31:16] 80 * Value of TTG in us
229 bb = [15:8] Number of DL symbols
230 aa = [7:0] Number of UL symbols
231 Special value of 0xFFFFFFFF indicates use of embedded logic
232 PhyParameter1 = 0xFFFFFFFF */
233 uint32 m_u32PhyParameter1;
234
235 /*
236 PhyParameter2
237 [16] Set 1 for accurate CINR measurement on noise limited scenarios
238 If set to 1, note the BTS Link Adaptation tables may need change
239 [15:8] Backoff in 0.25dBm steps in Transmit power to be
240 applied for an uncalibrated unit */
241 uint32 m_u32PhyParameter2;
242
243 /*
244 PhyParameter3 = 0x0 */
245 uint32 m_u32PhyParameter3;
246
247 /*
248 TestOptions
249 in eval mode only;
250 -lower 16bits = basic cid for testing;
251 -then bit 16 is test cqich,
252 -bit 17 test init rang;
253 -bit 18 test periodic rang
254 -bit 19 is test harq ack/nack
255
256 in normal mode;
257 -#define ENABLE_RNG_REQ_RPD_R4 0x1
258 -#define ENABLE_RNG_REQ_RPD_R3 0x2
259 -#define TEST_HOCODE_IN_IM_REENTRY_RPD 0x4
260 -#define ENABLE_PHY_PARAMETERS_RPD 0x8
261 -#define ENABLE_INDEP_CONTROL_DATA_POW_SCALLING 0x10
262 -#define ENABLE_PTXIRMAX_FOR_ALL_CDMA_CODES 0x20
263 -#define ENABLE_EXT_BS_INITIATED_IDLE_MODE 0x40
264 -#define DISABLE_RNG_REQ_ANOMALY 0x100
265 -#define ENABLE_HARQ_TLVS_IN_DSA_RSP_IOPR 0x200
266 -#define ENABLE_TX_PWR_RPT_RPD_124 0x400
267 -#define INCLUDE_IM_MAC_HASH_SKIP_THRESH_TLV 0x800
268 -#define ENABLE_POLL_ME_BIT_USING_UGS 0x8000
269 -#define NW_ENTRY_DREG 0x100000
270 -#define TEST_DISABLE_DSX_FLOW_CONTROL_TLV 0x200000
271 -#define TEST_SBC_OPTIMIZATION 0x400000
272 -#define TEST_DISABLE_EARLY_TX_POWER_GEN 0x1000000
273 -#define LA_DISABLE_ECINR_SUPPORT 0x2000000
274 -#define ENABLE_NSP_SBC_DISCOVERY_METHOD 0x8000000
275 -#define ENABLE__BF_WA 0x20000000
276 -#define ENABLE_BR_PWR_INCR_AND_IGNORE_PC_IE_OUT_DYNAMIC_RNG 0x40000000
277 -#define ENABLE_BR_CODE_TIMEOUT_PWR_ADJ_PDUS 0x80000000*/
278 uint32 m_u32TestOptions;
279
280 /*
281 Max MAC Data per Frame to be sent in REG-REQ */
282 uint32 m_u32MaxMACDataperDLFrame;
283 uint32 m_u32MaxMACDataperULFrame;
284
285 uint32 m_u32Corr2MacFlags;
286
287 /*
288 HostDrvrConfig1/HostDrvrConfig2/HostDrvrConfig3
289 12 Bytes are required for setting the LED Configurations.
290 LED Type (This can be either RED/YELLOW/GREEN/FLUORESCENT)
291 ON State (This makes sure that the LED is ON till a state is achieved)
292 Blink State (This makes sure that the LED Keeps Blinking till a state is
293 achieved e.g. firmware download state)*/
294 uint32 HostDrvrConfig1;
295 uint32 HostDrvrConfig2;
296 uint32 HostDrvrConfig3;
297
298 /*
299 HostDrvrConfig4/HostDrvrConfig5
300 Used for "WiMAX Trigger" for out of WiMAX Coverage.
301 HostDrvrConfig4 [31:30]
302 To set WiMAX Trigger Type:
303 00 -"Not Defined", 01 -"RSSI", 10 -"CINR", 11 -"Reserved"
304 HostDrvrConfig5 [31:0]
305 To set WiMAX Trigger Threshold for the type
306 selected in HostDrvrConfig4 */
307 uint32 HostDrvrConfig4;
308 uint32 HostDrvrConfig5;
309
310 /*
311 HostDrvrConfig6:
312 Important device configuration data
313 Bit[3..0] Control Flags
314 Bit 0: Automatic Firmware Download 1: Enable, 0: Disable
315 Bit 1: Auto Linkup 1: Enable, 0: Disable
316 Bit 2: Reserved.
317 Bit 3: Reserved.
318 Bit[7..4] RESERVED
319 Bit[11..8] DDR Memory Clock Configuration
320 MEM_080_MHZ = 0x0
321 MEM_133_MHZ = 0x3
322 MEM_160_MHZ = 0x5
323 Bit[14..12] PowerSaveMethod
324 DEVICE_POWERSAVE_MODE_AS_MANUAL_CLOCK_GATING = 0x0
325 DEVICE_POWERSAVE_MODE_AS_PMU_CLOCK_GATING = 0x1
326 DEVICE_POWERSAVE_MODE_AS_PMU_SHUTDOWN = 0x2
327 Bit[15] Idlemode Auto correct mode.
328 0-Enable, 1- Disable. */
329 uint32 HostDrvrConfig6;
330
331 /*
332 Segmented PSUC
333 Option to enable support of Segmented PUSC.
334 If set to 0, only full reuse profiles are supported */
335 uint32 m_u32SegmentedPUSCenable;
336
337 /*
338 BAMC Related Parameters
339 4.x does not support this feature
340 This is added just to sync 4.x and 5.x CFGs
341 Bit[0..15] Band AMC signaling configuration:
342 Bit 0 = 1 Enable Band AMC signaling.
343 Bit[16..31] Band AMC Data configuration:
344 Bit 16 = 1 Band AMC 2x3 support.
345 Bit 0 is effective only if bit 16 is set. */
346 uint32 m_u32BandAMCEnable;
347
348 } VENDORCFG, *PSVENDORCFG;
349
350 /*Structure which stores the information of different LED types
351 * and corresponding LED state information of driver states*/
352 typedef struct _GPIO_LED_STATE
353 {
354 uint8_t LED_Type;
355 // specify GPIO number - use 0xFF if not used
356 uint8_t LED_On_State;
357 // Bits set or reset for different states
358 uint8_t LED_Blink_State;
359 // Bits set or reset for blinking LEDs for different states
360 uint8_t GPIO_Num;
361 // GPIO number (this is the bit offset and is 1<<n'ed)
362 uint8_t BitPolarity;
363 // Is hardware normal polarity or reverse polarity
364
365 } GPIO_LED_STATE, *PSGPIO_LED_STATE;
366
367 typedef struct _GPIO_LED_MAP
368 {
369 GPIO_LED_STATE LEDState[NUM_OF_LEDS];
370 // struct stores the state of the LED's
371 bool bIdleMode_tx_from_host;
372 // Store notification if driver came out of idle mode
373 // due to Host or target
374 bool bIdle_led_off;
375
376 // TODO : figure out how to handle these linux wait typedefs
377 // wait_queue_head_t notify_led_event;
378 // wait_queue_head_t idleModeSyncEvent;
379 bool notify_led_event;
380 bool idleModeSyncEvent;
381 // TODO END : figure out how to handle these linux wait typedefs
382
383 struct task_struct *led_cntrl_threadid;
384 int led_thread_running;
385 bool bLedInitDone;
386
387 }GPIO_LED_MAP, *PSGPIO_LED_MAP;
388
389 typedef struct _FLASH_CS_INFO
390 {
391 uint32 MagicNumber;
392 // 0xBECE - F1A5 for FLAS(H)
393
394 uint32 FlashLayoutVersion;
395 // Flash layout version
396
397 uint32 ISOImageVersion;
398 // ISO Image / Format / Eng version
399
400 uint32 SCSIFirmwareVersion;
401 // SCSI Firmware Version
402
403 uint32 OffsetFromZeroForPart1ISOImage;
404 // Normally 0
405
406 uint32 OffsetFromZeroForScsiFirmware;
407 // Normally 12MB
408
409 uint32 SizeOfScsiFirmware;
410 // Size of firmware, varies
411
412 uint32 OffsetFromZeroForPart2ISOImage;
413 // 1st word offset 12MB + sizeofScsiFirmware
414
415 uint32 OffsetFromZeroForCalibrationStart;
416 uint32 OffsetFromZeroForCalibrationEnd;
417
418 uint32 OffsetFromZeroForVSAStart;
419 uint32 OffsetFromZeroForVSAEnd;
420 // VSA0 offsets
421
422 uint32 OffsetFromZeroForControlSectionStart;
423 uint32 OffsetFromZeroForControlSectionData;
424 // Control Section offsets
425
426 uint32 CDLessInactivityTimeout;
427 // NO Data Activity timeout to switch from MSC to NW Mode
428
429 uint32 NewImageSignature;
430 // New ISO Image Signature
431
432 uint32 FlashSectorSizeSig;
433 // Signature to validate the sector size.
434
435 uint32 FlashSectorSize;
436 // Sector Size
437
438 uint32 FlashWriteSupportSize;
439 // Write Size Support
440
441 uint32 TotalFlashSize;
442 // Total Flash Size
443
444 uint32 FlashBaseAddr;
445 // Flash Base Address for offset specified
446
447 uint32 FlashPartMaxSize;
448 // Flash Part Max Size
449
450 uint32 IsCDLessDeviceBootSig;
451 // Is CDLess or Flash Bootloader
452
453 uint32 MassStorageTimeout;
454 // MSC Timeout after reset to switch from MSC to NW Mode
455
456 } FLASH_CS_INFO, *PFLASH_CS_INFO;
457
458 struct WIMAX_DEVICE
459 {
460 VENDORCFG vendorcfg;
461 // we memcpy the vendor cfg here
462 uint32 syscfgBefFw;
463 // SYS_CFG before firmware
464 bool CPUFlashBoot;
465 // Reverse MIPS
466 uint32 deviceChipID;
467 // Beceem interface chip model
468 volatile bool driverHalt;
469 // gets set to true when driver is being shutdown
470 volatile uint32 driverState;
471 // Driver state, defined in Driver.h
472 volatile bool driverDDRinit;
473 // has the DDR memory been initialized?
474 volatile bool driverFwPushed;
475 // has the firmware been pushed to the device?
476
477
478 GPIO_LED_MAP LEDMap;
479 // Map of LED's in GPIO
480 thread_id LEDThreadID;
481 // Thread ID of LED state handler
482
483 uint32 nvmType;
484 // NVM Type (FLASH|EEPROM|UNKNOWN)
485 uint32 nvmDSDSize;
486 // NVM DSD Size
487 uint32 nvmVerMajor;
488 // NVM Major
489 uint32 nvmVerMinor;
490 // NVM Minor
491
492 volatile uint32 nvmFlashBaseAddr;
493 // NVM Flash base address
494 unsigned long nvmFlashCalStart;
495 // NVM Flash calibrated start
496 unsigned long nvmFlashCSStart;
497 // NVM Flash CS start
498 PFLASH_CS_INFO nvmFlashCSInfo;
499 // NVM Flash CS info
500 unsigned long int nvmFlashID;
501 // ID of Flash chip
502 volatile bool nvmFlashCSDone;
503 // Has CS been read yet?
504 volatile bool nvmFlashRaw;
505 // Do we need raw access at the moment?
506
507 uint32 nvmFlashMajor;
508 // NVM Flash layout major version
509 uint32 nvmFlashMinor;
510 // NVM Flash layout major version
511
512 uint32 hwParamPtr;
513 // Pointer to the NVM Param section address
514 unsigned char gpioInfo[32];
515 // Stored GPIO information
516 uint32 gpioBitMap;
517 // GPIO LED bitmap
518 };
519
520
521 #endif // _USB_BECEEM_DEVICE_STRUCT_
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