headers/private/graphics/neomagic/DriverInterface.h

   1 /*
   2         Copyright 1999, Be Incorporated.   All Rights Reserved.
   3         This file may be used under the terms of the Be Sample Code License.
   4
   5         Other authors:
   6         Rudolf Cornelissen 4/2003-1/2006
   7 */
   8
   9 #ifndef DRIVERINTERFACE_H
  10 #define DRIVERINTERFACE_H
  11
  12 #include <Accelerant.h>
  13 #include "video_overlay.h"
  14 #include <Drivers.h>
  15 #include <PCI.h>
  16 #include <OS.h>
  17
  18 #define DRIVER_PREFIX "neomagic"
  19
  20 /*
  21         Internal driver state (also for sharing info between driver and accelerant)
  22 */
  23 #if defined(__cplusplus)
  24 extern "C" {
  25 #endif
  26
  27 typedef struct {
  28         sem_id  sem;
  29         int32   ben;
  30 } benaphore;
  31
  32 #define INIT_BEN(x)             x.sem = create_sem(0, "NM "#x" benaphore");  x.ben = 0;
  33 #define AQUIRE_BEN(x)   if((atomic_add(&(x.ben), 1)) >= 1) acquire_sem(x.sem);
  34 #define RELEASE_BEN(x)  if((atomic_add(&(x.ben), -1)) > 1) release_sem(x.sem);
  35 #define DELETE_BEN(x)   delete_sem(x.sem);
  36
  37
  38 #define NM_PRIVATE_DATA_MAGIC   0x0009 /* a private driver rev, of sorts */
  39
  40 /*dualhead extensions to flags*/
  41 #define DUALHEAD_OFF (0<<6)
  42 #define DUALHEAD_CLONE (1<<6)
  43 #define DUALHEAD_ON (2<<6)
  44 #define DUALHEAD_SWITCH (3<<6)
  45 #define DUALHEAD_BITS (3<<6)
  46 #define DUALHEAD_CAPABLE (1<<8)
  47 #define TV_BITS (3<<9)
  48 #define TV_MON (0<<9
  49 #define TV_PAL (1<<9)
  50 #define TV_NTSC (2<<9)
  51 #define TV_CAPABLE (1<<11)
  52 #define TV_VIDEO (1<<12)
  53 #define TV_PRIMARY (1<<13)
  54
  55 #define SKD_MOVE_CURSOR    0x00000001
  56 #define SKD_PROGRAM_CLUT   0x00000002
  57 #define SKD_SET_START_ADDR 0x00000004
  58 #define SKD_SET_CURSOR     0x00000008
  59 #define SKD_HANDLER_INSTALLED 0x80000000
  60
  61 enum {
  62         NM_GET_PRIVATE_DATA = B_DEVICE_OP_CODES_END + 1,
  63         NM_GET_PCI,
  64         NM_SET_PCI,
  65         NM_DEVICE_NAME,
  66         NM_RUN_INTERRUPTS,
  67         NM_ISA_OUT,
  68         NM_ISA_IN,
  69         NM_PGM_BES
  70 };
  71
  72 /* max. number of overlay buffers */
  73 #define MAXBUFFERS 3
  74
  75 /* internal used info on overlay buffers */
  76 typedef struct
  77 {
  78         uint16 slopspace;
  79         uint32 size;
  80 } int_buf_info;
  81
  82 typedef struct settings {  // apsed, see comments in nm.settings
  83         // for driver
  84         char   accelerant[B_FILE_NAME_LENGTH];
  85         bool   dumprom;
  86         // for accelerant
  87         uint32 logmask;
  88         uint32 memory;
  89         bool   usebios;
  90         bool   hardcursor;
  91 } settings;
  92
  93 /*shared info*/
  94 typedef struct {
  95   /*a few ID things*/
  96         uint16  vendor_id;      /* PCI vendor ID, from pci_info */
  97         uint16  device_id;      /* PCI device ID, from pci_info */
  98         uint8   revision;       /* PCI device revsion, from pci_info */
  99
 100   /* used to return status for INIT_ACCELERANT and CLONE_ACCELERANT */
 101         bool    accelerant_in_use;
 102
 103   /* bug workaround for 4.5.0 */
 104         uint32 use_clone_bugfix;        /*for 4.5.0, cloning of physical memory does not work*/
 105         uint32 * clone_bugfix_regs;
 106         uint32 * clone_bugfix_regs2;
 107
 108         /* old cards have their registers mapped inside the framebuffer area */
 109         bool regs_in_fb;
 110
 111   /*memory mappings*/
 112         area_id regs_area, regs2_area;  /* Kernel's area_id for the memory mapped registers.
 113                                                                                 It will be cloned into the accelerant's address
 114                                                                                 space. */
 115
 116         area_id fb_area;        /* Frame buffer's area_id.  The addresses are shared with all teams. */
 117         area_id pseudo_dma_area;        /* Pseudo dma area_id. Shared by all teams. */
 118         area_id dma_buffer_area;        /* Area assigned for dma*/
 119
 120         void    *framebuffer;           /* As viewed from virtual memory */
 121         void    *framebuffer_pci;       /* As viewed from the PCI bus (for DMA) */
 122
 123         void    *pseudo_dma;            /* As viewed from virtual memory */
 124
 125         void    *dma_buffer;            /* buffer for dma*/
 126         void    *dma_buffer_pci;        /* buffer for dma - from PCI bus*/
 127
 128   /*screenmode list*/
 129         area_id mode_area;              /* Contains the list of display modes the driver supports */
 130         uint32  mode_count;             /* Number of display modes in the list */
 131
 132   /*flags - used by driver*/
 133         uint32 flags;
 134
 135   /*vblank semaphore*/
 136         sem_id  vblank;                 /* The vertical blank semaphore. Ownership will be
 137                                                 transfered to the team opening the device first */
 138   /*cursor information*/
 139         struct {
 140                 uint16  hot_x;          /* Cursor hot spot. The top left corner of the cursor */
 141                 uint16  hot_y;          /* is 0,0 */
 142                 uint16  x;              /* The location of the cursor hot spot on the */
 143                 uint16  y;              /* desktop */
 144                 uint16  width;          /* Width and height of the cursor shape (always 16!) */
 145                 uint16  height;
 146                 bool    is_visible;     /* Is the cursor currently displayed? */
 147         } cursor;
 148
 149   /*colour lookup table*/
 150         uint8   color_data[3 * 256];    /* Colour lookup table - as used by DAC */
 151
 152   /*more display mode stuff*/
 153         display_mode dm;                /* current display mode configuration: head1 */
 154         uint32 dpms_flags;              /* current DPMS mode */
 155         bool acc_mode;                  /* signals (non)accelerated mode */
 156
 157   /*frame buffer config - for BDirectScreen*/
 158         frame_buffer_config fbc;        /* bytes_per_row and start of frame buffer: head1 */
 159         accelerant_device_info adi;     /* as returned by hook GET_ACCELERANT_DEVICE_INFO */
 160
 161   /*acceleration engine*/
 162         struct {
 163                 uint32          count;          /* last dwgsync slot used */
 164                 uint32          last_idle;      /* last dwgsync slot we *know* the engine was idle after */
 165                 benaphore       lock;           /* for serializing access to the acceleration engine */
 166                 uint32          control;        /* colordepth, memory pitch and other config stuff */
 167                 uint8           depth;          /* bytes per pixel used */
 168         } engine;
 169
 170   /* card info - information gathered from PINS (and other sources) */
 171         enum
 172         {       // card_type in order of date of nm chip design
 173             NM2070 = 0,
 174         NM2090,
 175                 NM2093,
 176         NM2097,
 177         NM2160,
 178         NM2200,
 179         NM2230,
 180         NM2360,
 181         NM2380
 182         } card_type;
 183         struct
 184         {
 185                 /* specialised registers for predefined cardspecs */
 186
 187                 /* general card information */
 188                 uint32 card_type;           /* see card_type enum above */
 189                 bool int_assigned;                      /* card has a useable INT assigned to it */
 190
 191                 /* PINS */
 192                 float f_ref;                            /* PLL reference-oscillator frequency (Mhz) */
 193                 uint32 max_system_vco;          /* graphics engine PLL VCO limits (Mhz) */
 194                 uint32 min_system_vco;
 195                 uint32 max_pixel_vco;           /* dac1 PLL VCO limits (Mhz) */
 196                 uint32 min_pixel_vco;
 197                 uint32 std_engine_clock;        /* graphics engine clock speed needed (Mhz) */
 198                 uint32 max_dac1_clock;          /* dac1 limits (Mhz) */
 199                 uint32 max_dac1_clock_8;        /* dac1 limits correlated to RAMspeed limits (Mhz) */
 200                 uint32 max_dac1_clock_16;
 201                 uint32 max_dac1_clock_24;
 202                 uint32 memory_size;                     /* memory (Kbytes) */
 203                 uint32 curmem_size;                     /* memory (bytes) */
 204                 uint16 max_crtc_width;          /* CRTC max constraints */
 205                 uint16 max_crtc_height;
 206                 uint8 panel_type;                       /* panel type */
 207                 uint16 panel_width;                     /* panel size */
 208                 uint16 panel_height;
 209                 uint8 outputs;                          /* in BIOS preselected output(s) */
 210         } ps;
 211
 212   /*mirror of the ROM (copied in driver, because may not be mapped permanently - only over fb)*/
 213         uint8 rom_mirror[65536];
 214
 215   /* apsed: some configuration settings from ~/config/settings/kernel/drivers/nm.settings if exists */
 216         settings settings;
 217
 218         struct
 219         {
 220                 overlay_buffer myBuffer[MAXBUFFERS];/* scaler input buffers */
 221                 int_buf_info myBufInfo[MAXBUFFERS];     /* extra info on scaler input buffers */
 222                 overlay_token myToken;                          /* scaler is free/in use */
 223                 benaphore lock;                                         /* for creating buffers and aquiring overlay unit routines */
 224                 /* variables needed for virtualscreens (move_overlay()): */
 225                 bool active;                                            /* true is overlay currently in use */
 226                 overlay_window ow;                                      /* current position of overlay output window */
 227                 overlay_buffer ob;                                      /* current inputbuffer in use */
 228                 overlay_view my_ov;                                     /* current corrected view in inputbuffer */
 229                 uint32 h_ifactor;                                       /* current 'unclipped' horizontal inverse scaling factor */
 230                 uint32 v_ifactor;                                       /* current 'unclipped' vertical inverse scaling factor */
 231         } overlay;
 232 } shared_info;
 233
 234 /* Read or write a value in PCI configuration space */
 235 typedef struct {
 236         uint32  magic;          /* magic number to make sure the caller groks us */
 237         uint32  offset;         /* Offset to read/write */
 238         uint32  size;           /* Number of bytes to transfer */
 239         uint32  value;          /* The value read or written */
 240 } nm_get_set_pci;
 241
 242 /* Read or write a value in ISA I/O space */
 243 typedef struct {
 244         uint32  magic;          /* magic number to make sure the caller groks us */
 245         uint16  adress;         /* Offset to read/write */
 246         uint8   size;           /* Number of bytes to transfer */
 247         uint16  data;           /* The value read or written */
 248 } nm_in_out_isa;
 249
 250 /* move_overlay related info */
 251 typedef struct {
 252         uint32 hcoordv;         /* left and right edges of video output window */
 253         uint32 vcoordv;         /* top and bottom edges of video output window */
 254         uint32 hsrcendv;        /* horizontal source end in source buffer (clipping) */
 255         uint32 a1orgv;          /* vertical source clipping via startadress of source buffer */
 256 } move_overlay_info;
 257
 258 /* setup ISA BES registers for overlay on ISA cards */
 259 typedef struct {
 260         uint32  magic;          /* magic number to make sure the caller groks us */
 261         uint32  card_type;  /* see card_type enum above */
 262         uint32  hiscalv;
 263         uint32  viscalv;
 264         uint32  globctlv;
 265         uint32  weight;
 266         uint8   colkey_r;
 267         uint8   colkey_g;
 268         uint8   colkey_b;
 269         uint16  ob_width;
 270         move_overlay_info moi;
 271         bool    move_only;
 272 } nm_bes_data;
 273
 274 /* Set some boolean condition (like enabling or disabling interrupts) */
 275 typedef struct {
 276         uint32  magic;          /* magic number to make sure the caller groks us */
 277         bool    do_it;          /* state to set */
 278 } nm_set_bool_state;
 279
 280 /* Retrieve the area_id of the kernel/accelerant shared info */
 281 typedef struct {
 282         uint32  magic;          /* magic number to make sure the caller groks us */
 283         area_id shared_info_area;       /* area_id containing the shared information */
 284 } nm_get_private_data;
 285
 286 /* Retrieve the device name.  Usefull for when we have a file handle, but want
 287 to know the device name (like when we are cloning the accelerant) */
 288 typedef struct {
 289         uint32  magic;          /* magic number to make sure the caller groks us */
 290         char    *name;          /* The name of the device, less the /dev root */
 291 } nm_device_name;
 292
 293 enum {
 294
 295         _WAIT_FOR_VBLANK = (1 << 0)
 296 };
 297
 298 #if defined(__cplusplus)
 299 }
 300 #endif
 301
 302
 303 #endif