2 Copyright (c) 2002, Thomas Kurschel
7 BusMemory Control registers
10 #ifndef _MEMCNTRL_REGS_H
11 #define _MEMCNTRL_REGS_H
13 #define RADEON_AGP_BASE 0x0170
14 #define RADEON_MEM_CNTL 0x0140
15 # define RADEON_MEM_NUM_CHANNELS_MASK 0x01
16 # define RADEON_MEM_USE_B_CH_ONLY (1<<1)
17 # define RV100_HALF_MODE (1<<3)
18 # define R300_MEM_NUM_CHANNELS_MASK 0x03
19 # define R300_MEM_USE_CD_CH_ONLY (1<<2)
20 #define RADEON_MC_AGP_LOCATION 0x014c
21 #define RADEON_MC_FB_LOCATION 0x0148
22 #define RADEON_MEM_INIT_LAT_TIMER 0x0154
23 #define RADEON_MEM_SDRAM_MODE_REG 0x0158
24 # define RADEON_MEM_CFG_TYPE_MASK (1 << 30)
25 # define RADEON_MEM_CFG_SDR (0 << 30)
26 # define RADEON_MEM_CFG_DDR (1 << 30)
27 #define RADEON_NB_TOM 0x015c
28 #define RADEON_DISPLAY_BASE_ADDRESS 0x023c
29 #define RADEON_CRTC2_DISPLAY_BASE_ADDRESS 0x033c
30 #define RADEON_OV0_BASE_ADDRESS 0x043c
32 #define RADEON_GRPH_BUFFER_CNTL 0x02f0
33 # define RADEON_GRPH_START_REQ_MASK (0x7f)
34 # define RADEON_GRPH_START_REQ_SHIFT 0
35 # define RADEON_GRPH_STOP_REQ_MASK (0x7f<<8)
36 # define RADEON_GRPH_STOP_REQ_SHIFT 8
37 # define RADEON_GRPH_CRITICAL_POINT_MASK (0x7f<<16)
38 # define RADEON_GRPH_CRITICAL_POINT_SHIFT 16
39 # define RADEON_GRPH_CRITICAL_CNTL (1<<28)
40 # define RADEON_GRPH_BUFFER_SIZE (1<<29)
41 # define RADEON_GRPH_CRITICAL_AT_SOF (1<<30)
42 # define RADEON_GRPH_STOP_CNTL (1<<31)
43 #define RADEON_GRPH2_BUFFER_CNTL 0x03f0
44 # define RADEON_GRPH2_START_REQ_MASK (0x7f)
45 # define RADEON_GRPH2_START_REQ_SHIFT 0
46 # define RADEON_GRPH2_STOP_REQ_MASK (0x7f<<8)
47 # define RADEON_GRPH2_STOP_REQ_SHIFT 8
48 # define RADEON_GRPH2_CRITICAL_POINT_MASK (0x7f<<16)
49 # define RADEON_GRPH2_CRITICAL_POINT_SHIFT 16
50 # define RADEON_GRPH2_CRITICAL_CNTL (1<<28)
51 # define RADEON_GRPH2_BUFFER_SIZE (1<<29)
52 # define RADEON_GRPH2_CRITICAL_AT_SOF (1<<30)
53 # define RADEON_GRPH2_STOP_CNTL (1<<31)