headers/private/graphics/radeon/vip_regs.h

   1 /*
   2         Copyright (c) 2002, Thomas Kurschel
   3
   4
   5         Part of Radeon driver
   6
   7         VIP host port registers
   8 */
   9
  10 #ifndef _VIP_REGS_H
  11 #define _VIP_REGS_H
  12
  13 #define RADEON_VIPH_TIMEOUT_STAT                                                0xc50
  14 #               define RADEON_VIPH_TIMEOUT_STAT_VIPH_REG_STAT   (1 << 4)
  15 #               define RADEON_VIPH_TIMEOUT_STAT_VIPH_REG_AK             (1 << 4)
  16 #               define RADEON_VIPH_TIMEOUT_STAT_AK_MASK                 0xff
  17 #               define RADEON_VIPH_TIMEOUT_STAT_VIPH_REGR_DIS   (1 << 24)
  18
  19 #define RADEON_VIPH_CONTROL                                                             0xc40
  20 #               define RADEON_VIPH_CONTROL_VIPH_REG_RDY                 (1 << 13)
  21 #               define RADEON_VIPH_CONTROL_VIPH_MAX_WAIT_SHIFT  16
  22 #               define RADEON_VIPH_CONTROL_VIPH_DMA_MODE                (1 << 20)
  23 #               define RADEON_VIPH_CONTROL_VIPH_EN                              (1 << 21)
  24
  25 #define RADEON_VIPH_REG_ADDR                                                    0x80
  26 #define RADEON_VIPH_REG_DATA                                                    0x84
  27
  28 #define RADEON_VIPH_DV_LAT                                                              0xc44
  29 #               define RADEON_VIPH_DV_LAT_VIPH_DV0_LAT_SHIFT    16
  30 #               define RADEON_VIPH_DV_LAT_VIPH_DV1_LAT_SHIFT    20
  31 #               define RADEON_VIPH_DV_LAT_VIPH_DV2_LAT_SHIFT    24
  32 #               define RADEON_VIPH_DV_LAT_VIPH_DV3_LAT_SHIFT    28
  33
  34 #define RADEON_VIPH_DMA_CHUNK                                                   0xc48
  35 #               define RADEON_VIPH_DMA_CHUNK_VIPH_CH0_CHUNK_SHIFT       0
  36 #               define RADEON_VIPH_DMA_CHUNK_VIPH_CH1_CHUNK_SHIFT       4
  37 #               define RADEON_VIPH_DMA_CHUNK_VIPH_CH2_CHUNK_SHIFT       6
  38 #               define RADEON_VIPH_DMA_CHUNK_VIPH_CH3_CHUNK_SHIFT       8
  39
  40 #define RADEON_VIP_VENDOR_DEVICE_ID                     0x0000
  41
  42
  43 #endif