Make UEFI boot-platform build again
[haiku.git] / headers / private / usb_vision / nt100x.h
blobd19262b6355ff2b6db4fe0800aa9ec180254e73b
1 /*
2 * This file is a part of BeOS USBVision driver project.
3 * Copyright (c) 2003 by Siarzuk Zharski <imker@gmx.li>
5 * This file may be used under the terms of the BSD License
6 * Look into the file "License" for details.
8 * Skeletal part of this code was inherired from original BeOS sample code,
9 * that is distributed under the terms of the Be Sample Code License.
10 * Look into the file "Be License" for details.
12 * $Source: /cvsroot/sis4be/usbvision/include/nt100x.h,v $
13 * $Author: zharik $
14 * $Revision: 1.1 $
15 * $Date: 2003/07/15 18:58:05 $
19 #ifndef _NT100X_H_
20 #define _NT100X_H_
22 #define READ_CMD_PREFIX 0x33C2
23 #define WRITE_CMD_PREFIX 0x3342
25 #define COMMAND_DATA_LENGTH 0x08
26 typedef struct{
27 uint8 reg;
28 uint8 data_length;
29 uint8 data[COMMAND_DATA_LENGTH];
30 }xet_nt100x_reg;
32 #define NT_IOCTL_READ_REGISTER B_DEVICE_OP_CODES_END + 1
33 #define NT_IOCTL_WRITE_REGISTER B_DEVICE_OP_CODES_END + 2
35 /*General Control Registers (Power, Restart EP, USB, IO­pins, Camera Control)*/
36 #define PWR_REG 0x00 /*0*/
37 #define CONFIG_REG 0x01 /*1*/
38 #define ADRS_REG 0x02 /*2*/
39 #define ALTER_REG 0x03 /*3*/
40 #define FORCE_ALTER_REG 0x04 /*4*/
41 #define STATUS_REG 0x05 /*5*/
42 #define IOPIN_REG 0x06 /*6*/
43 #define SER_MODE 0x07 /*7*/
44 #define SER_ADRS 0x08 /*8*/
45 #define SER_CONT 0x09 /*9*/
46 #define SER_DAT1 0x0a /*10*/
47 #define SER_DAT2 0x0b /*11*/
48 #define SER_DAT3 0x0c /*12*/
49 #define SER_DAT4 0x0d /*13*/
51 /*EEPROM Read/Write Registers*/
52 #define EE_DATA 0x0e /*14*/
53 #define EE_LSBAD 0x0f /*15*/
54 #define EE_CONT 0x10 /*16*/
56 /*17: 0x11*/
58 /*DRAM and Memory Buffers Setup Registers*/
59 #define DRM_CONT 0x12 /*18*/
60 #define DRM_PRM1 0x13 /*19*/
61 #define DRM_PRM2 0x14 /*20*/
62 #define DRM_PRM3 0x15 /*21*/
63 #define DRM_PRM4 0x16 /*22*/
64 #define DRM_PRM5 0x17 /*23*/
65 #define DRM_PRM6 0x18 /*24*/
66 #define DRM_PRM7 0x19 /*25*/
67 #define DRM_PRM8 0x1a /*26*/
69 /*Video Setup and Control Registers*/
70 #define VIN_REG1 0x1b /*27*/
71 #define VIN_REG2 0x1c /*28*/
72 #define LXSIZE_IN 0x1d /*29*/
73 #define MXSIZE_IN 0x1e /*30*/
74 #define LYSIZE_IN 0x1f /*31*/
75 #define MYSIZE_IN 0x20 /*32*/
76 #define LX_OFFST 0x21 /*33*/
77 #define MX_OFFST 0x22 /*34*/
78 #define LY_OFFST 0x23 /*35*/
79 #define MY_OFFST 0x24 /*36*/
80 #define FRM_RATE 0x25 /*37*/
81 #define LXSIZE_O 0x26 /*38*/
82 #define MXSIZE_O 0x27 /*39*/
83 #define LYSIZE_O 0x28 /*40*/
84 #define MYSIZE_O 0x29 /*41*/
85 #define FILT_CONT 0x2a /*42*/
86 #define VO_MODE 0x2b /*43*/
87 #define INTRA_CYC 0x2c /*44*/
88 #define STRIP_SZ 0x2d /*45*/
89 #define FORCE_INTRA 0x2e /*46*/
90 #define FORCE_UP 0x2f /*47*/
91 #define BUF_THR 0x30 /*48*/
92 #define DVI_YUV 0x31 /*49*/
93 #define AUDIO_CONT 0x32 /*50*/
94 #define AUD_PK_LEN 0x33 /*51*/
95 #define BLK_PK_LEN 0x34 /*52*/
97 /*USB WatchDog Register*/
98 #define WD_COUNT 0x35 /*53*/
100 /*54 0x36*/
101 /*55 0x37*/
103 /*Compression Ratio Management Registers*/
104 #define PCM_THR1 0x38 /*56*/
105 #define PCM_THR2 0x39 /*57*/
106 #define DIST_THR_I 0x3a /*58*/
107 #define DIST_THR_A 0x3b /*59*/
108 #define MAX_DIST_I 0x3c /*60*/
109 #define MAX_DIST_A 0x3d /*61*/
110 #define VID_BUF_ 0x3e /*62*/
111 #define LFP_LSB 0x3f /*63*/
112 #define LFP_MSB 0x40 /*64*/
113 #define VID_LPF 0x41 /*65*/
115 #endif //_NT100X_H_