src/add-ons/kernel/busses/ide/legacy_sata/legacy_sata.c

   1 /*
   2  * Copyright 2007, Ithamar R. Adema. All rights reserved.
   3  * Distributed under the terms of the MIT License.
   4  */
   5
   6 #include <KernelExport.h>
   7 #include <stdlib.h>
   8 #include <string.h>
   9 #include <device_manager.h>
  10 #include <bus/IDE.h>
  11 #include <ide_adapter.h>
  12
  13
  14 #define DRIVER_PRETTY_NAME      "Legacy SATA"
  15 #define CONTROLLER_NAME         DRIVER_PRETTY_NAME
  16 #define CONTROLLER_MODULE_NAME  "busses/ide/legacy_sata/driver_v1"
  17 #define CHANNEL_MODULE_NAME     "busses/ide/legacy_sata/channel/v1"
  18
  19 #define TRACE(a...)             dprintf(DRIVER_PRETTY_NAME ": " a)
  20 #define FLOW(a...)              dprintf(DRIVER_PRETTY_NAME ": " a)
  21
  22 #define PCI_vendor_VIA          0x1106
  23 #define PCI_device_VIA6420      0x3149
  24 #define PCI_device_VIA6421      0x3249
  25 #define PCI_device_VIA8237A     0x0591
  26
  27 #define PCI_vendor_ALI          0x10b9
  28 #define PCI_device_ALI5289      0x5289
  29 #define PCI_device_ALI5287      0x5287
  30 #define PCI_device_ALI5281      0x5281
  31
  32 #define PCI_vendor_NVIDIA       0x10de
  33 #define PCI_device_NF2PROS1     0x008e
  34 #define PCI_device_NF3PROS1     0x00e3
  35 #define PCI_device_NF3PROS2     0x00ee
  36 #define PCI_device_MCP4S1       0x0036
  37 #define PCI_device_MCP4S2       0x003e
  38 #define PCI_device_CK804S1      0x0054
  39 #define PCI_device_CK804S2      0x0055
  40 #define PCI_device_MCP51S1      0x0266
  41 #define PCI_device_MCP51S2      0x0267
  42 #define PCI_device_MCP55S1      0x037e
  43 #define PCI_device_MCP55S2      0x037f
  44 #define PCI_device_MCP61S1      0x03e7
  45 #define PCI_device_MCP61S2      0x03f6
  46 #define PCI_device_MCP61S3      0x03f7
  47
  48 #define ID(v,d) (((v)<< 16) | (d))
  49
  50 /* XXX: To be moved to PCI.h */
  51 #define PCI_command_interrupt   0x400
  52
  53 static const char * const kChannelNames[] = {
  54         "Primary Channel", "Secondary Channel",
  55         "Tertiary Channel", "Quaternary Channel"
  56 };
  57
  58 static ide_for_controller_interface* ide;
  59 static ide_adapter_interface* ide_adapter;
  60 static device_manager_info* dm;
  61
  62
  63 static float
  64 controller_supports(device_node *parent)
  65 {
  66         uint16 vendor_id;
  67         uint16 device_id;
  68         status_t res;
  69         const char *bus = NULL;
  70
  71         // get the bus (should be PCI)
  72         if (dm->get_attr_string(parent, B_DEVICE_BUS, &bus, false) != B_OK)
  73                 return B_ERROR;
  74         if (strcmp(bus, "pci") != 0) {
  75                 return B_ERROR;
  76         }
  77
  78         // get vendor and device ID
  79         if ((res=dm->get_attr_uint16(parent, B_DEVICE_VENDOR_ID, &vendor_id, false)) != B_OK
  80                 || (res=dm->get_attr_uint16(parent, B_DEVICE_ID, &device_id, false)) != B_OK) {
  81                 return res;
  82         }
  83
  84         switch (ID(vendor_id, device_id)) {
  85                 /* VIA SATA chipsets */
  86                 case ID(PCI_vendor_VIA, PCI_device_VIA6420):
  87                 case ID(PCI_vendor_VIA, PCI_device_VIA6421):
  88                 case ID(PCI_vendor_VIA, PCI_device_VIA8237A):
  89                         break;
  90
  91                 /* ALI SATA chipsets */
  92                 case ID(PCI_vendor_ALI, PCI_device_ALI5281):
  93                 case ID(PCI_vendor_ALI, PCI_device_ALI5287):
  94                 case ID(PCI_vendor_ALI, PCI_device_ALI5289):
  95                         break;
  96
  97                 /* NVidia NForce chipsets */
  98                 case ID(PCI_vendor_NVIDIA, PCI_device_NF2PROS1):
  99                 case ID(PCI_vendor_NVIDIA, PCI_device_NF3PROS1):
 100                 case ID(PCI_vendor_NVIDIA, PCI_device_NF3PROS2):
 101                 case ID(PCI_vendor_NVIDIA, PCI_device_MCP4S1):
 102                 case ID(PCI_vendor_NVIDIA, PCI_device_MCP4S2):
 103                 case ID(PCI_vendor_NVIDIA, PCI_device_CK804S1):
 104                 case ID(PCI_vendor_NVIDIA, PCI_device_CK804S2):
 105                 case ID(PCI_vendor_NVIDIA, PCI_device_MCP51S1):
 106                 case ID(PCI_vendor_NVIDIA, PCI_device_MCP51S2):
 107                 case ID(PCI_vendor_NVIDIA, PCI_device_MCP55S1):
 108                 case ID(PCI_vendor_NVIDIA, PCI_device_MCP55S2):
 109                 case ID(PCI_vendor_NVIDIA, PCI_device_MCP61S1):
 110                 case ID(PCI_vendor_NVIDIA, PCI_device_MCP61S2):
 111                 case ID(PCI_vendor_NVIDIA, PCI_device_MCP61S3):
 112                         break;
 113
 114                 default:
 115                         return 0.0f;
 116         }
 117
 118         TRACE("controller found! vendor 0x%04x, device 0x%04x\n", vendor_id, device_id);
 119
 120         return 0.8f;
 121 }
 122
 123
 124 static status_t
 125 controller_probe(device_node *parent)
 126 {
 127         device_node *controller_node;
 128         device_node *channels[4];
 129         uint16 command_block_base[4];
 130         uint16 control_block_base[4];
 131         pci_device_module_info *pci;
 132         uint8 num_channels = 2;
 133         uint32 bus_master_base;
 134         pci_device *device = NULL;
 135         uint16 device_id;
 136         uint16 vendor_id;
 137         uint8 int_num;
 138         status_t res;
 139         uint8 index;
 140
 141         TRACE("controller_probe\n");
 142
 143         dm->get_driver(parent, (driver_module_info **)&pci, (void **)&device);
 144
 145         device_id = pci->read_pci_config(device, PCI_device_id, 2);
 146         vendor_id = pci->read_pci_config(device, PCI_vendor_id, 2);
 147         int_num = pci->read_pci_config(device, PCI_interrupt_line, 1);
 148         bus_master_base = pci->read_pci_config(device, PCI_base_registers + 16, 4);
 149
 150         /* Default PCI assigments */
 151         command_block_base[0] = pci->read_pci_config(device, PCI_base_registers + 0, 4);
 152         control_block_base[0] = pci->read_pci_config(device, PCI_base_registers + 4, 4);
 153         command_block_base[1] = pci->read_pci_config(device, PCI_base_registers + 8, 4);
 154         control_block_base[1] = pci->read_pci_config(device, PCI_base_registers + 12, 4);
 155
 156         /* enable PCI interrupt */
 157         pci->write_pci_config(device, PCI_command, 2,
 158                 pci->read_pci_config(device, PCI_command, 2) & ~PCI_command_interrupt);
 159
 160         if (vendor_id == PCI_vendor_NVIDIA) {
 161                 /* enable control access */
 162                 pci->write_pci_config(device, 0x50, 1,
 163                         pci->read_pci_config(device, 0x50, 1) | 0x04);
 164         }
 165
 166         switch (ID(vendor_id, device_id)) {
 167                 case ID(PCI_vendor_VIA,PCI_device_VIA6421):
 168                         /* newer SATA chips has resources in one BAR for each channel */
 169                         num_channels = 4;
 170                         command_block_base[0] = pci->read_pci_config(device, PCI_base_registers + 0, 4);
 171                         control_block_base[0] = command_block_base[0] + 8;
 172                         command_block_base[1] = pci->read_pci_config(device, PCI_base_registers + 4, 4);
 173                         control_block_base[1] = command_block_base[1] + 8;
 174                         command_block_base[2] = pci->read_pci_config(device, PCI_base_registers + 8, 4);
 175                         control_block_base[2] = command_block_base[2] + 8;
 176                         command_block_base[3] = pci->read_pci_config(device, PCI_base_registers + 12, 4);
 177                         control_block_base[3] = command_block_base[3] + 8;
 178                         break;
 179
 180                 case ID(PCI_vendor_ALI, PCI_device_ALI5287):
 181                         num_channels = 4;
 182                         command_block_base[2] = pci->read_pci_config(device, PCI_base_registers + 0, 4) + 8;
 183                         control_block_base[2] = pci->read_pci_config(device, PCI_base_registers + 4, 4) + 4;
 184                         command_block_base[3] = pci->read_pci_config(device, PCI_base_registers + 8, 4) + 8;
 185                         control_block_base[3] = pci->read_pci_config(device, PCI_base_registers + 12, 4) + 4;
 186                         break;
 187         }
 188
 189         bus_master_base &= PCI_address_io_mask;
 190         for (index = 0; index < num_channels; index++) {
 191                 command_block_base[index] &= PCI_address_io_mask;
 192                 control_block_base[index] &= PCI_address_io_mask;
 193         }
 194
 195         res = ide_adapter->detect_controller(pci, device, parent, bus_master_base,
 196                 CONTROLLER_MODULE_NAME, "" /* XXX: unused: controller_driver_type*/, CONTROLLER_NAME, true,
 197                 true, 1, 0xffff, 0x10000, &controller_node);
 198         // don't register if controller is already registered!
 199         // (happens during rescan; registering new channels would kick out old channels)
 200         if (res != B_OK)
 201                 goto err;
 202         if (controller_node == NULL) {
 203                 res = B_IO_ERROR;
 204                 goto err;
 205         }
 206
 207         // ignore errors during registration of channels - could be a simple rescan collision
 208
 209         for (index = 0; index < num_channels; index++) {
 210                 res = ide_adapter->detect_channel(pci, device, controller_node, CHANNEL_MODULE_NAME,
 211                         true, command_block_base[index], control_block_base[index], bus_master_base,
 212                         int_num, index, kChannelNames[index], &channels[index], false);
 213
 214                 dprintf("%s: %s\n", kChannelNames[index], strerror(res));
 215         }
 216
 217
 218         TRACE("controller_probe success\n");
 219         return B_OK;
 220
 221 err:
 222         TRACE("controller_probe failed (%s)\n", strerror(res));
 223         return res;
 224 }
 225
 226
 227 static status_t
 228 controller_init(device_node *node, void **controller_cookie)
 229 {
 230         return ide_adapter->init_controller(
 231                 node, (ide_adapter_controller_info**)controller_cookie,
 232                 sizeof(ide_adapter_controller_info));
 233 }
 234
 235
 236 static void
 237 controller_uninit(void *controller_cookie)
 238 {
 239         ide_adapter->uninit_controller(controller_cookie);
 240 }
 241
 242
 243 static void
 244 controller_removed(void *controller_cookie)
 245 {
 246         ide_adapter->controller_removed(
 247                 (ide_adapter_controller_info*)controller_cookie);
 248 }
 249
 250
 251 static status_t
 252 channel_init(device_node *node, void **channel_cookie)
 253 {
 254         return ide_adapter->init_channel(node,
 255                 (ide_adapter_channel_info**)channel_cookie,
 256                 sizeof(ide_adapter_channel_info),
 257                 ide_adapter->inthand);
 258 }
 259
 260
 261 static void
 262 channel_uninit(void *channel_cookie)
 263 {
 264         ide_adapter->uninit_channel(channel_cookie);
 265 }
 266
 267
 268 static void
 269 channel_removed(void *channel_cookie)
 270 {
 271         ide_adapter->channel_removed(channel_cookie);
 272 }
 273
 274
 275 static void
 276 channel_set(void *cookie, ide_channel channel)
 277 {
 278         ide_adapter->set_channel((ide_adapter_channel_info *)cookie, channel);
 279 }
 280
 281
 282 static status_t
 283 task_file_write(void *channel_cookie, ide_task_file *tf, ide_reg_mask mask)
 284 {
 285         return ide_adapter->write_command_block_regs(channel_cookie,tf,mask);
 286 }
 287
 288
 289 static status_t
 290 task_file_read(void *channel_cookie, ide_task_file *tf, ide_reg_mask mask)
 291 {
 292         return ide_adapter->read_command_block_regs(channel_cookie,tf,mask);
 293 }
 294
 295
 296 static uint8
 297 altstatus_read(void *channel_cookie)
 298 {
 299         return ide_adapter->get_altstatus(channel_cookie);
 300 }
 301
 302
 303 static status_t
 304 device_control_write(void *channel_cookie, uint8 val)
 305 {
 306         return ide_adapter->write_device_control(channel_cookie,val);
 307 }
 308
 309
 310 static status_t
 311 pio_write(void *channel_cookie, uint16 *data, int count, bool force_16bit)
 312 {
 313         return ide_adapter->write_pio(channel_cookie,data,count,force_16bit);
 314 }
 315
 316
 317 static status_t
 318 pio_read(void *channel_cookie, uint16 *data, int count, bool force_16bit)
 319 {
 320         return ide_adapter->read_pio(channel_cookie,data,count,force_16bit);
 321 }
 322
 323
 324 static status_t
 325 dma_prepare(void *channel_cookie, const physical_entry *sg_list, size_t sg_list_count, bool write)
 326 {
 327         return ide_adapter->prepare_dma(channel_cookie,sg_list,sg_list_count,write);
 328 }
 329
 330
 331 static status_t
 332 dma_start(void *channel_cookie)
 333 {
 334         return ide_adapter->start_dma(channel_cookie);
 335 }
 336
 337
 338 static status_t
 339 dma_finish(void *channel_cookie)
 340 {
 341         return ide_adapter->finish_dma(channel_cookie);
 342 }
 343
 344
 345 module_dependency module_dependencies[] = {
 346         { IDE_FOR_CONTROLLER_MODULE_NAME, (module_info **)&ide },
 347         { B_DEVICE_MANAGER_MODULE_NAME, (module_info **)&dm },
 348         { IDE_ADAPTER_MODULE_NAME, (module_info **)&ide_adapter },
 349         {}
 350 };
 351
 352 static ide_controller_interface sChannelInterface = {
 353         {
 354                 {
 355                         CHANNEL_MODULE_NAME,
 356                         0,
 357                         NULL
 358                 },
 359
 360                 NULL,
 361                 NULL,
 362                 channel_init,
 363                 channel_uninit,
 364                 NULL,
 365                 NULL,
 366                 channel_removed,
 367         },
 368
 369         channel_set,
 370
 371         task_file_write,
 372         task_file_read,
 373
 374         altstatus_read,
 375         device_control_write,
 376
 377         pio_write,
 378         pio_read,
 379
 380         dma_prepare,
 381         dma_start,
 382         dma_finish,
 383 };
 384
 385 static driver_module_info sControllerInterface = {
 386         {
 387                 CONTROLLER_MODULE_NAME,
 388                 0,
 389                 NULL
 390         },
 391
 392         .init_driver            = &controller_init,
 393         .uninit_driver          = &controller_uninit,
 394         .supports_device        = &controller_supports,
 395         .register_device        = &controller_probe,
 396         .device_removed         = &controller_removed,
 397 };
 398
 399 module_info *modules[] = {
 400         (module_info *)&sControllerInterface,
 401         (module_info *)&sChannelInterface,
 402         NULL
 403 };