1 /* Copyright (c) 2003-2004
2 * Stefano Ceccherini <burton666@libero.it>. All rights reserved.
3 * This file is released under the MIT license
12 #define IO_PORT_PCI_ACCESS true
13 //#define MEMORY_MAPPED_PCI_ACCESS true
15 #if IO_PORT_PCI_ACCESS
16 # define write8(address,value) (*gPci->write_io_8)((address),(value))
17 # define write16(address,value) (*gPci->write_io_16)((address),(value))
18 # define write32(address,value) (*gPci->write_io_32)((address),(value))
19 # define read8(address) ((*gPci->read_io_8)(address))
20 # define read16(address) ((*gPci->read_io_16)(address))
21 # define read32(address) ((*gPci->read_io_32)(address))
22 #else /* MEMORY_MAPPED_PCI_ACCESS */
23 # define read8(address) (*((volatile uint8*)(address)))
24 # define read16(address) (*((volatile uint16*)(address)))
25 # define read32(address) (*((volatile uint32*)(address)))
26 # define write8(address,data) (*((volatile uint8 *)(address)) = data)
27 # define write16(address,data) (*((volatile uint16 *)(address)) = (data))
28 # define write32(address,data) (*((volatile uint32 *)(address)) = (data))
31 extern pci_module_info
* gPci
;