headers/private/drivers/ata_adapter.h

   1 /*
   2  * Copyright 2005-2015, Axel Dörfler, axeld@pinc-software.de. All rights reserved.
   3  * Copyright 2002-04, Thomas Kurschel. All rights reserved.
   4  *
   5  * Distributed under the terms of the MIT License.
   6  */
   7 #ifndef _ATA_PCI_H
   8 #define _ATA_PCI_H
   9
  10
  11 /*!     ATA adapter library
  12
  13         Module to simplify writing an ATA adapter driver.
  14
  15         The interface is not very abstract, i.e. the actual driver is
  16         free to access any controller or channel data of this library.
  17 */
  18
  19
  20 #include <bus/ATA.h>
  21 #include <bus/PCI.h>
  22 #include <ata_types.h>
  23
  24
  25 // one Physical Region Descriptor (PRD)
  26 // (one region must not cross 64K boundary;
  27 //  the PRD table must not cross a 64K boundary)
  28 typedef struct prd_entry {
  29         uint32 address;                         // physical address of block (must be even)
  30         uint16 count;                           // size of block, 0 stands for 65536 (must be even)
  31         uint8 res6;
  32         B_LBITFIELD8_2(
  33                 res7_0 : 7,
  34                 EOT : 1                                 // 1 for last entry
  35         );
  36 } prd_entry;
  37
  38 // IDE bus master command register
  39 #define ATA_BM_COMMAND_START_STOP               0x01
  40 #define ATA_BM_COMMAND_READ_FROM_DEVICE 0x08
  41
  42 // IDE bus master status register
  43 #define ATA_BM_STATUS_ACTIVE            0x01
  44 #define ATA_BM_STATUS_ERROR                     0x02
  45 #define ATA_BM_STATUS_INTERRUPT         0x04
  46 #define ATA_BM_STATUS_MASTER_DMA        0x20
  47 #define ATA_BM_STATUS_SLAVE_DMA         0x40
  48 #define ATA_BM_STATUS_SIMPLEX_DMA       0x80
  49
  50 // offset of bus master registers
  51 enum {
  52         ATA_BM_COMMAND_REG      = 0,
  53         ATA_BM_STATUS_REG       = 2,
  54         ATA_BM_PRDT_ADDRESS     = 4
  55                 // offset of PRDT register; content must be dword-aligned
  56 };
  57
  58
  59 // (maximum) size of S/G table
  60 // there are so many restrictions that we want to keep it inside one page
  61 // to be sure that we fulfill them all
  62 #define ATA_ADAPTER_MAX_SG_COUNT (B_PAGE_SIZE / sizeof( prd_entry ))
  63
  64
  65 // channel node items
  66 // io address of command block (uint16)
  67 #define ATA_ADAPTER_COMMAND_BLOCK_BASE "ata_adapter/command_block_base"
  68 // io address of control block (uint16)
  69 #define ATA_ADAPTER_CONTROL_BLOCK_BASE "ata_adapter/control_block_base"
  70 // interrupt number (uint8)
  71 // can also be defined in controller node if both channels use same IRQ!
  72 #define ATA_ADAPTER_INTNUM "ata_adapter/irq"
  73 // 0 if primary channel, 1 if secondary channel, 2 if tertiary, ... (uint8)
  74 #define ATA_ADAPTER_CHANNEL_INDEX "ata_adapter/channel_index"
  75
  76 // controller node items
  77 // io address of bus master registers (uint16)
  78 #define ATA_ADAPTER_BUS_MASTER_BASE "ata_adapter/bus_master_base"
  79
  80
  81 // info about one channel
  82 typedef struct ata_adapter_channel_info {
  83         pci_device_module_info *pci;
  84         pci_device *device;
  85
  86         uint16 command_block_base;      // io address command block
  87         uint16 control_block_base; // io address control block
  88         uint16 bus_master_base;
  89         int intnum;                             // interrupt number
  90
  91         uint32 lost;                    // != 0 if device got removed, i.e. if it must not
  92                                                         // be accessed anymore
  93
  94         ata_channel ataChannel;
  95         device_node *node;
  96
  97         int32 (*inthand)( void *arg );
  98
  99         area_id prd_area;
 100         prd_entry *prdt;
 101         uint32 prdt_phys;
 102         uint32 dmaing;
 103 } ata_adapter_channel_info;
 104
 105
 106 // info about controller
 107 typedef struct ata_adapter_controller_info {
 108         pci_device_module_info *pci;
 109         pci_device *device;
 110
 111         uint16 bus_master_base;
 112
 113         uint32 lost;                    // != 0 if device got removed, i.e. if it must not
 114                                                         // be accessed anymore
 115
 116         device_node *node;
 117 } ata_adapter_controller_info;
 118
 119
 120 // interface of IDE adapter library
 121 typedef struct {
 122         module_info info;
 123
 124         void (*set_channel)(ata_adapter_channel_info *channel,
 125                                         ata_channel ataChannel);
 126
 127         // function calls that can be forwarded from actual driver
 128         status_t (*write_command_block_regs)(ata_adapter_channel_info *channel,
 129                                         ata_task_file *tf, ata_reg_mask mask);
 130         status_t (*read_command_block_regs)(ata_adapter_channel_info *channel,
 131                                         ata_task_file *tf, ata_reg_mask mask);
 132
 133         uint8 (*get_altstatus) (ata_adapter_channel_info *channel);
 134         status_t (*write_device_control) (ata_adapter_channel_info *channel, uint8 val);
 135
 136         status_t (*write_pio)(ata_adapter_channel_info *channel, uint16 *data, int count, bool force_16bit);
 137         status_t (*read_pio)(ata_adapter_channel_info *channel, uint16 *data, int count, bool force_16bit);
 138
 139         status_t (*prepare_dma)(ata_adapter_channel_info *channel, const physical_entry *sg_list,
 140                                         size_t sg_list_count, bool to_device);
 141         status_t (*start_dma)(ata_adapter_channel_info *channel);
 142         status_t (*finish_dma)(ata_adapter_channel_info *channel);
 143
 144         // default functions that should be replaced by a more specific version
 145         // (copy them from source code of this library and modify them at will)
 146         int32 (*inthand)(void *arg);
 147
 148         // functions that must be called by init/uninit etc. of channel driver
 149         status_t (*init_channel)(device_node *node,
 150                                         ata_adapter_channel_info **cookie, size_t total_data_size,
 151                                         int32 (*inthand)(void *arg));
 152         void (*uninit_channel)(ata_adapter_channel_info *channel);
 153         void (*channel_removed)(ata_adapter_channel_info *channel);
 154
 155         // publish channel node
 156         status_t (*publish_channel)(device_node *controller_node,
 157                                         const char *channel_module_name, uint16 command_block_base,
 158                                         uint16 control_block_base, uint8 intnum, bool can_dma,
 159                                         uint8 channel_index, const char *name,
 160                                         const io_resource *resources, device_node **node);
 161         // verify channel configuration and publish node on success
 162         status_t (*detect_channel)(pci_device_module_info *pci, pci_device *pciDevice,
 163                                         device_node *controller_node, const char *channel_module_name,
 164                                         bool controller_can_dma, uint16 command_block_base,
 165                                         uint16 control_block_base, uint16 bus_master_base,
 166                                         uint8 intnum, uint8 channel_index, const char *name,
 167                                         device_node **node, bool supports_compatibility_mode);
 168
 169         // functions that must be called by init/uninit etc. of controller driver
 170         status_t (*init_controller)(device_node *node,
 171                                         ata_adapter_controller_info **cookie, size_t total_data_size);
 172         void (*uninit_controller)(ata_adapter_controller_info *controller);
 173         void (*controller_removed)(ata_adapter_controller_info *controller);
 174
 175         // publish controller node
 176         status_t (*publish_controller)(device_node *parent, uint16 bus_master_base,
 177                                         io_resource *resources, const char *controller_driver,
 178                                         const char *controller_driver_type, const char *controller_name,
 179                                         bool can_dma, bool can_cq, uint32 dma_alignment, uint32 dma_boundary,
 180                                         uint32 max_sg_block_size, device_node **node);
 181         // verify controller configuration and publish node on success
 182         status_t (*detect_controller)(pci_device_module_info *pci, pci_device *pciDevice,
 183                                         device_node *parent, uint16 bus_master_base,
 184                                         const char *controller_driver, const char *controller_driver_type,
 185                                         const char *controller_name, bool can_dma, bool can_cq,
 186                                         uint32 dma_alignment, uint32 dma_boundary, uint32 max_sg_block_size,
 187                                         device_node **node);
 188         // standard master probe for controller that registers controller and channel nodes
 189         status_t (*probe_controller)(device_node *parent, const char *controller_driver,
 190                                         const char *controller_driver_type, const char *controller_name,
 191                                         const char *channel_module_name, bool can_dma, bool can_cq,
 192                                         uint32 dma_alignment, uint32 dma_boundary, uint32 max_sg_block_size,
 193                                         bool supports_compatibility_mode);
 194 } ata_adapter_interface;
 195
 196
 197 #define ATA_ADAPTER_MODULE_NAME "generic/ata_adapter/v1"
 198
 199 #endif  /* _ATA_PCI_H */